From 3517b6941c30c3bd72135e13c0983a69942c3642 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 5 May 2015 10:06:26 +0300 Subject: [PATCH] adv7511:kcu105, axi_hdmi_tx, axi_spdif_tx constraints modified so they apply to ultrascale --- library/axi_hdmi_tx/axi_hdmi_tx_constr.xdc | 64 ++++++++++---------- library/axi_spdif_tx/axi_spdif_tx_constr.xdc | 8 +-- projects/adv7511/kcu105/system_bd.tcl | 0 projects/adv7511/kcu105/system_project.tcl | 3 + 4 files changed, 39 insertions(+), 36 deletions(-) mode change 100755 => 100644 projects/adv7511/kcu105/system_bd.tcl mode change 100755 => 100644 projects/adv7511/kcu105/system_project.tcl diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_constr.xdc b/library/axi_hdmi_tx/axi_hdmi_tx_constr.xdc index 710a803f5..17b5b036b 100644 --- a/library/axi_hdmi_tx/axi_hdmi_tx_constr.xdc +++ b/library/axi_hdmi_tx/axi_hdmi_tx_constr.xdc @@ -9,67 +9,67 @@ set_property ASYNC_REG TRUE \ [get_cells -hier *state_m2_reg*] set_false_path \ - -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_false_path \ - -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier up_xfer_state_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier up_xfer_state_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_max_delay -datapath_only \ - -from [get_cells -hier up_xfer_data_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_data_cntrl_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier up_xfer_data_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_data_cntrl_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $hdmi_clk] set_false_path \ - -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier up_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier up_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_false_path \ - -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_xfer_state_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_xfer_state_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_max_delay -datapath_only \ - -from [get_cells -hier d_xfer_data_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier up_data_status_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier d_xfer_data_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier up_data_status_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $up_clk] set_false_path \ - -from [get_cells -hier hdmi_fs_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier vdma_fs_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier hdmi_fs_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier vdma_fs_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_false_path \ - -from [get_cells -hier vdma_fs_ret_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier hdmi_fs_ret_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier vdma_fs_ret_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier hdmi_fs_ret_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_max_delay -datapath_only \ - -from [get_cells -hier vdma_fs_waddr* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier hdmi_fs_waddr* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier vdma_fs_waddr* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier hdmi_fs_waddr* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $hdmi_clk] set_false_path \ - -from [get_cells -hier up_count_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_count_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier up_count_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_count_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_false_path \ - -from [get_cells -hier d_count_toggle_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier up_count_toggle_m1_reg* -filter {primitive_subgroup == flop}] + -from [get_cells -hier d_count_toggle_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier up_count_toggle_m1_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] set_max_delay -datapath_only \ - -from [get_cells -hier d_count_hold_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier up_d_count_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier d_count_hold_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier up_d_count_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $up_clk] set_max_delay -datapath_only \ - -from [get_cells -hier hdmi_raddr_g* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier vdma_raddr_g_m1* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier hdmi_raddr_g* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier vdma_raddr_g_m1* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $vdma_clk] set_max_delay -datapath_only \ - -from [get_cells -hier vdma_tpm_oos_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier vdma_tpm_oos_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $up_clk] set_max_delay -datapath_only \ - -from [get_cells -hier vdma_ovf_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier vdma_ovf_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $up_clk] set_max_delay -datapath_only \ - -from [get_cells -hier vdma_unf_reg* -filter {primitive_subgroup == flop}] \ - -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop}] \ + -from [get_cells -hier vdma_unf_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier d_acc_data_reg* -filter {primitive_subgroup == flop || primitive_subgroup == SDR}] \ [get_property PERIOD $up_clk] set_false_path \ diff --git a/library/axi_spdif_tx/axi_spdif_tx_constr.xdc b/library/axi_spdif_tx/axi_spdif_tx_constr.xdc index 7cb959144..c874131d7 100644 --- a/library/axi_spdif_tx/axi_spdif_tx_constr.xdc +++ b/library/axi_spdif_tx/axi_spdif_tx_constr.xdc @@ -3,9 +3,9 @@ set_property ASYNC_REG TRUE \ [get_cells -hier cdc_sync_stage2_*_reg] set_false_path \ - -from [get_cells -hier cdc_sync_stage0_*_reg -filter {PRIMITIVE_SUBGROUP == flop}] \ - -to [get_cells -hier cdc_sync_stage1_*_reg -filter {PRIMITIVE_SUBGROUP == flop}] + -from [get_cells -hier cdc_sync_stage0_*_reg -filter {PRIMITIVE_SUBGROUP == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier cdc_sync_stage1_*_reg -filter {PRIMITIVE_SUBGROUP == flop || primitive_subgroup == SDR}] set_false_path \ - -from [get_cells -hier spdif_out_reg -filter {PRIMITIVE_SUBGROUP == flop}] \ - -to [get_cells -hier spdif_tx_o_reg -filter {PRIMITIVE_SUBGROUP == flop}] + -from [get_cells -hier spdif_out_reg -filter {PRIMITIVE_SUBGROUP == flop || primitive_subgroup == SDR}] \ + -to [get_cells -hier spdif_tx_o_reg -filter {PRIMITIVE_SUBGROUP == flop || primitive_subgroup == SDR}] diff --git a/projects/adv7511/kcu105/system_bd.tcl b/projects/adv7511/kcu105/system_bd.tcl old mode 100755 new mode 100644 diff --git a/projects/adv7511/kcu105/system_project.tcl b/projects/adv7511/kcu105/system_project.tcl old mode 100755 new mode 100644 index 6b1475205..b66326b79 --- a/projects/adv7511/kcu105/system_project.tcl +++ b/projects/adv7511/kcu105/system_project.tcl @@ -10,6 +10,9 @@ adi_project_files adv7511_kcu105 [list \ "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/kcu105/kcu105_system_constr.xdc" ] +set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kcu105/kcu105_system_constr.xdc] +set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc] + adi_project_run adv7511_kcu105