parent
74221eb42c
commit
341221dc91
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@ -112,10 +112,7 @@ always @(posedge clk) begin
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if (cgs_enable == 1'b1) begin
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phy_data <= {DATA_PATH_WIDTH{8'hbc}};
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end else begin
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case (tx_ready)
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1'b0: phy_data <= ilas_data;
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default: phy_data <= scrambled_data;
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endcase
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phy_data <= (tx_ready) ? scrambled_data : ilas_data;
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end
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end
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