projects- ultrascale+
parent
6b956066ef
commit
33f9ed33c7
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@ -86,8 +86,8 @@ proc adi_project_create {project_name {mode 0}} {
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set sys_zynq 1
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}
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if [regexp "_zcu102$" $project_name] {
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set p_device "xczu9eg-ffvb1156-1-i-EVAL"
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set p_board "not-applicable"
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set p_device "xczu9eg-ffvb1156-1-i-es1"
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set p_board "xilinx.com:zcu102:part0:1.2"
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set sys_zynq 2
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}
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