From 3351ff607e55574f30c90942398fa17d83ddfd54 Mon Sep 17 00:00:00 2001
From: Rejeesh Kutty <rejeesh.kutty@analog.com>
Date: Thu, 2 Jun 2016 16:22:40 -0400
Subject: [PATCH] adrv9371x- need to investigate merge with avalon

---
 projects/adrv9371x/a10soc/system_bd.qsys     | 53 +--------------
 projects/adrv9371x/a10soc/system_constr.sdc  | 32 +++++++++
 projects/adrv9371x/a10soc/system_project.tcl | 32 ++++-----
 projects/adrv9371x/common/adrv9371x_bd.qsys  | 70 ++++----------------
 4 files changed, 63 insertions(+), 124 deletions(-)

diff --git a/projects/adrv9371x/a10soc/system_bd.qsys b/projects/adrv9371x/a10soc/system_bd.qsys
index bbab402c3..5ead260a9 100644
--- a/projects/adrv9371x/a10soc/system_bd.qsys
+++ b/projects/adrv9371x/a10soc/system_bd.qsys
@@ -57,22 +57,6 @@
          type = "String";
       }
    }
-   element adrv9371x.avl_rx_os_xcvr
-   {
-      datum baseAddress
-      {
-         value = "204800";
-         type = "String";
-      }
-   }
-   element adrv9371x.avl_rx_xcvr
-   {
-      datum baseAddress
-      {
-         value = "196608";
-         type = "String";
-      }
-   }
    element adrv9371x.avl_tx_jesd
    {
       datum baseAddress
@@ -89,14 +73,6 @@
          type = "String";
       }
    }
-   element adrv9371x.avl_tx_xcvr
-   {
-      datum baseAddress
-      {
-         value = "180224";
-         type = "String";
-      }
-   }
    element adrv9371x.avl_xcvr_pll
    {
       datum baseAddress
@@ -477,7 +453,7 @@
   <parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="5" />
   <parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="100000000" />
   <parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="5" />
-  <parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_MAP"><![CDATA[<address-map><slave name='adrv9371x_axi_os_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='adrv9371x_axi_jesd_xcvr.s_axi' start='0x10000' end='0x20000' /><slave name='adrv9371x_axi_dac_dma.s_axi' start='0x20000' end='0x24000' /><slave name='adrv9371x_axi_os_adc_dma.s_axi' start='0x24000' end='0x28000' /><slave name='adrv9371x_axi_adc_dma.s_axi' start='0x28000' end='0x2C000' /><slave name='adrv9371x_xcvr_tx_core.reconfig_avmm' start='0x2C000' end='0x30000' /><slave name='adrv9371x_xcvr_rx_core.reconfig_avmm' start='0x30000' end='0x32000' /><slave name='adrv9371x_xcvr_rx_os_core.reconfig_avmm' start='0x32000' end='0x34000' /><slave name='adrv9371x_xcvr_tx_lane_pll.reconfig_avmm0' start='0x34000' end='0x35000' /><slave name='adrv9371x_xcvr_pll_reconfig.mgmt_avalon_slave' start='0x35000' end='0x35800' /><slave name='adrv9371x_xcvr_tx_core.jesd204_tx_avs' start='0x35800' end='0x35C00' /><slave name='adrv9371x_xcvr_rx_os_core.jesd204_rx_avs' start='0x35C00' end='0x36000' /><slave name='adrv9371x_xcvr_rx_core.jesd204_rx_avs' start='0x36000' end='0x36400' /><slave name='adrv9371x_ad9371_gpio.s1' start='0x36400' end='0x36420' /></address-map>]]></parameter>
+  <parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_MAP"><![CDATA[<address-map><slave name='adrv9371x_axi_os_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='adrv9371x_axi_jesd_xcvr.s_axi' start='0x10000' end='0x20000' /><slave name='adrv9371x_axi_dac_dma.s_axi' start='0x20000' end='0x24000' /><slave name='adrv9371x_axi_os_adc_dma.s_axi' start='0x24000' end='0x28000' /><slave name='adrv9371x_axi_adc_dma.s_axi' start='0x28000' end='0x2C000' /><slave name='adrv9371x_xcvr_tx_lane_pll.reconfig_avmm0' start='0x34000' end='0x35000' /><slave name='adrv9371x_xcvr_pll_reconfig.mgmt_avalon_slave' start='0x35000' end='0x35800' /><slave name='adrv9371x_xcvr_tx_core.jesd204_tx_avs' start='0x35800' end='0x35C00' /><slave name='adrv9371x_xcvr_rx_os_core.jesd204_rx_avs' start='0x35C00' end='0x36000' /><slave name='adrv9371x_xcvr_rx_core.jesd204_rx_avs' start='0x36000' end='0x36400' /><slave name='adrv9371x_ad9371_gpio.s1' start='0x36400' end='0x36420' /></address-map>]]></parameter>
   <parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_WIDTH" value="AddressWidth = 18" />
   <parameter name="AUTO_UNIQUE_ID" value="$${FILENAME}_a10soc" />
  </module>
@@ -560,24 +536,6 @@
   <parameter name="baseAddress" value="0x00035c00" />
   <parameter name="defaultConnection" value="false" />
  </connection>
- <connection
-   kind="avalon"
-   version="15.1"
-   start="a10soc.sys_cpu_m_avl"
-   end="adrv9371x.avl_rx_os_xcvr">
-  <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x00032000" />
-  <parameter name="defaultConnection" value="false" />
- </connection>
- <connection
-   kind="avalon"
-   version="15.1"
-   start="a10soc.sys_cpu_m_avl"
-   end="adrv9371x.avl_rx_xcvr">
-  <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x00030000" />
-  <parameter name="defaultConnection" value="false" />
- </connection>
  <connection
    kind="avalon"
    version="15.1"
@@ -596,15 +554,6 @@
   <parameter name="baseAddress" value="0x00034000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
- <connection
-   kind="avalon"
-   version="15.1"
-   start="a10soc.sys_cpu_m_avl"
-   end="adrv9371x.avl_tx_xcvr">
-  <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x0002c000" />
-  <parameter name="defaultConnection" value="false" />
- </connection>
  <connection
    kind="avalon"
    version="15.1"
diff --git a/projects/adrv9371x/a10soc/system_constr.sdc b/projects/adrv9371x/a10soc/system_constr.sdc
index ddbb2743c..ed6d0cc7e 100644
--- a/projects/adrv9371x/a10soc/system_constr.sdc
+++ b/projects/adrv9371x/a10soc/system_constr.sdc
@@ -6,3 +6,35 @@ create_clock -period  "8.139 ns"  -name ref_clk1_122mhz     [get_ports {ref_clk1
 derive_pll_clocks
 derive_clock_uncertainty
 
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_tx_csr_inst*]\
+  -to [get_clocks {i_system_bd|adrv9371x|xcvr_pll|tx_dac_clk}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_tx_ctl_inst*]\
+  -to [get_clocks {i_system_bd|adrv9371x|xcvr_pll|tx_dac_clk}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {i_system_bd|adrv9371x|xcvr_pll|rx_adc_clk}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {i_system_bd|adrv9371x|xcvr_pll|rx_adc_os_clk}]
+
+set_false_path -from [get_clocks {i_system_bd|adrv9371x|xcvr_pll|tx_dac_clk}]\
+  -through [get_nets *altera_jesd204_tx_csr_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
+set_false_path -from [get_clocks {i_system_bd|adrv9371x|xcvr_pll|tx_dac_clk}]\
+  -through [get_nets *altera_jesd204_tx_ctl_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
+set_false_path -from [get_clocks {i_system_bd|adrv9371x|xcvr_pll|rx_adc_clk}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
+set_false_path -from [get_clocks {i_system_bd|adrv9371x|xcvr_pll|rx_adc_os_clk}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
diff --git a/projects/adrv9371x/a10soc/system_project.tcl b/projects/adrv9371x/a10soc/system_project.tcl
index d095a5245..49e6487e8 100644
--- a/projects/adrv9371x/a10soc/system_project.tcl
+++ b/projects/adrv9371x/a10soc/system_project.tcl
@@ -17,22 +17,22 @@ set_location_assignment PIN_N29   -to ref_clk0              ; ## D04  FMC_HPC_GB
 set_location_assignment PIN_N28   -to "ref_clk0(n)"         ; ## D05  FMC_HPC_GBTCLK0_M2C_N (NC)
 set_location_assignment PIN_R29   -to ref_clk1              ; ## B20  FMC_HPC_GBTCLK1_M2C_P
 set_location_assignment PIN_R28   -to "ref_clk1(n)"         ; ## B21  FMC_HPC_GBTCLK1_M2C_N
-set_location_assignment PIN_R32   -to rx_data[0]            ; ## A02  FMC_HPC_DP1_M2C_P
-set_location_assignment PIN_R33   -to "rx_data[0](n)"       ; ## A03  FMC_HPC_DP1_M2C_N
-set_location_assignment PIN_P34   -to rx_data[1]            ; ## A06  FMC_HPC_DP2_M2C_P
-set_location_assignment PIN_P35   -to "rx_data[1](n)"       ; ## A07  FMC_HPC_DP2_M2C_N
-set_location_assignment PIN_T30   -to rx_data[2]            ; ## C06  FMC_HPC_DP0_M2C_P
-set_location_assignment PIN_T31   -to "rx_data[2](n)"       ; ## C07  FMC_HPC_DP0_M2C_N
-set_location_assignment PIN_P30   -to rx_data[3]            ; ## A10  FMC_HPC_DP3_M2C_P
-set_location_assignment PIN_P31   -to "rx_data[3](n)"       ; ## A11  FMC_HPC_DP3_M2C_N
-set_location_assignment PIN_M38   -to tx_data[0]            ; ## A22  FMC_HPC_DP1_C2M_P (tx_data_p[3])
-set_location_assignment PIN_M39   -to "tx_data[0](n)"       ; ## A23  FMC_HPC_DP1_C2M_N (tx_data_n[3])
-set_location_assignment PIN_L36   -to tx_data[1]            ; ## A26  FMC_HPC_DP2_C2M_P (tx_data_p[0])
-set_location_assignment PIN_L37   -to "tx_data[1](n)"       ; ## A27  FMC_HPC_DP2_C2M_N (tx_data_n[0])
-set_location_assignment PIN_N36   -to tx_data[2]            ; ## C02  FMC_HPC_DP0_C2M_P (tx_data_p[1])
-set_location_assignment PIN_N37   -to "tx_data[2](n)"       ; ## C03  FMC_HPC_DP0_C2M_N (tx_data_n[1])
-set_location_assignment PIN_K38   -to tx_data[3]            ; ## A30  FMC_HPC_DP3_C2M_P (tx_data_p[2])
-set_location_assignment PIN_K39   -to "tx_data[3](n)"       ; ## A31  FMC_HPC_DP3_C2M_N (tx_data_n[2])
+set_location_assignment PIN_R33   -to rx_data[0]            ; ## A02  FMC_HPC_DP1_M2C_P
+set_location_assignment PIN_R32   -to "rx_data[0](n)"       ; ## A03  FMC_HPC_DP1_M2C_N
+set_location_assignment PIN_P35   -to rx_data[1]            ; ## A06  FMC_HPC_DP2_M2C_P
+set_location_assignment PIN_P34   -to "rx_data[1](n)"       ; ## A07  FMC_HPC_DP2_M2C_N
+set_location_assignment PIN_T31   -to rx_data[2]            ; ## C06  FMC_HPC_DP0_M2C_P
+set_location_assignment PIN_T30   -to "rx_data[2](n)"       ; ## C07  FMC_HPC_DP0_M2C_N
+set_location_assignment PIN_P31   -to rx_data[3]            ; ## A10  FMC_HPC_DP3_M2C_P
+set_location_assignment PIN_P30   -to "rx_data[3](n)"       ; ## A11  FMC_HPC_DP3_M2C_N
+set_location_assignment PIN_M39   -to tx_data[0]            ; ## A22  FMC_HPC_DP1_C2M_P (tx_data_p[3])
+set_location_assignment PIN_M38   -to "tx_data[0](n)"       ; ## A23  FMC_HPC_DP1_C2M_N (tx_data_n[3])
+set_location_assignment PIN_L37   -to tx_data[1]            ; ## A26  FMC_HPC_DP2_C2M_P (tx_data_p[0])
+set_location_assignment PIN_L36   -to "tx_data[1](n)"       ; ## A27  FMC_HPC_DP2_C2M_N (tx_data_n[0])
+set_location_assignment PIN_N37   -to tx_data[2]            ; ## C02  FMC_HPC_DP0_C2M_P (tx_data_p[1])
+set_location_assignment PIN_N36   -to "tx_data[2](n)"       ; ## C03  FMC_HPC_DP0_C2M_N (tx_data_n[1])
+set_location_assignment PIN_K39   -to tx_data[3]            ; ## A30  FMC_HPC_DP3_C2M_P (tx_data_p[2])
+set_location_assignment PIN_K38   -to "tx_data[3](n)"       ; ## A31  FMC_HPC_DP3_C2M_N (tx_data_n[2])
 
 set_instance_assignment -name IO_STANDARD LVDS -to ref_clk0
 set_instance_assignment -name IO_STANDARD LVDS -to ref_clk1
diff --git a/projects/adrv9371x/common/adrv9371x_bd.qsys b/projects/adrv9371x/common/adrv9371x_bd.qsys
index 56f0877a7..8f1721be9 100755
--- a/projects/adrv9371x/common/adrv9371x_bd.qsys
+++ b/projects/adrv9371x/common/adrv9371x_bd.qsys
@@ -323,16 +323,8 @@
    internal="xcvr_rx_os_core.jesd204_rx_avs"
    type="avalon"
    dir="end" />
- <interface
-   name="avl_rx_os_xcvr"
-   internal="xcvr_rx_os_core.reconfig_avmm"
-   type="avalon"
-   dir="end" />
- <interface
-   name="avl_rx_xcvr"
-   internal="xcvr_rx_core.reconfig_avmm"
-   type="avalon"
-   dir="end" />
+ <interface name="avl_rx_os_xcvr" internal="xcvr_rx_os_core.reconfig_avmm" />
+ <interface name="avl_rx_xcvr" internal="xcvr_rx_core.reconfig_avmm" />
  <interface
    name="avl_tx_jesd"
    internal="xcvr_tx_core.jesd204_tx_avs"
@@ -343,11 +335,7 @@
    internal="xcvr_tx_lane_pll.reconfig_avmm0"
    type="avalon"
    dir="end" />
- <interface
-   name="avl_tx_xcvr"
-   internal="xcvr_tx_core.reconfig_avmm"
-   type="avalon"
-   dir="end" />
+ <interface name="avl_tx_xcvr" internal="xcvr_tx_core.reconfig_avmm" />
  <interface
    name="avl_xcvr_pll"
    internal="xcvr_pll_reconfig.mgmt_avalon_slave"
@@ -922,7 +910,7 @@
   <parameter name="N" value="16" />
   <parameter name="N_PRIME" value="16" />
   <parameter name="OPTIMIZE" value="0" />
-  <parameter name="PCS_CONFIG" value="JESD_PCS_CFG2" />
+  <parameter name="PCS_CONFIG" value="JESD_PCS_CFG1" />
   <parameter name="PHADJ" value="0" />
   <parameter name="REFCLK_FREQ" value="122.88" />
   <parameter name="RES1" value="0" />
@@ -937,12 +925,12 @@
   <parameter name="lane_rate" value="4915.2" />
   <parameter name="part_trait_bd" value="NIGHTFURY4" />
   <parameter name="part_trait_dp" value="10AS066N3F40E2SGE2" />
-  <parameter name="pll_reconfig_enable" value="true" />
+  <parameter name="pll_reconfig_enable" value="false" />
   <parameter name="pll_type" value="CMU" />
   <parameter name="rcfg_jtag_enable" value="false" />
   <parameter name="sdc_constraint" value="1.0" />
-  <parameter name="set_capability_reg_enable" value="true" />
-  <parameter name="set_csr_soft_logic_enable" value="true" />
+  <parameter name="set_capability_reg_enable" value="false" />
+  <parameter name="set_csr_soft_logic_enable" value="false" />
   <parameter name="set_prbs_soft_logic_enable" value="false" />
   <parameter name="set_user_identifier" value="0" />
   <parameter name="wrapper_opt" value="base_phy" />
@@ -1000,16 +988,16 @@
   <parameter name="TERMINATE_RECONFIG_EN" value="false" />
   <parameter name="TEST_COMPONENTS_EN" value="false" />
   <parameter name="bitrev_en" value="false" />
-  <parameter name="bonded_mode" value="bonded" />
+  <parameter name="bonded_mode" value="non_bonded" />
   <parameter name="lane_rate" value="4915.2" />
   <parameter name="part_trait_bd" value="NIGHTFURY4" />
   <parameter name="part_trait_dp" value="10AS066N3F40E2SGE2" />
-  <parameter name="pll_reconfig_enable" value="true" />
+  <parameter name="pll_reconfig_enable" value="false" />
   <parameter name="pll_type" value="CMU" />
   <parameter name="rcfg_jtag_enable" value="false" />
   <parameter name="sdc_constraint" value="1.0" />
-  <parameter name="set_capability_reg_enable" value="true" />
-  <parameter name="set_csr_soft_logic_enable" value="true" />
+  <parameter name="set_capability_reg_enable" value="false" />
+  <parameter name="set_csr_soft_logic_enable" value="false" />
   <parameter name="set_prbs_soft_logic_enable" value="false" />
   <parameter name="set_user_identifier" value="0" />
   <parameter name="wrapper_opt" value="base_phy" />
@@ -1108,7 +1096,7 @@
   <parameter name="N" value="16" />
   <parameter name="N_PRIME" value="16" />
   <parameter name="OPTIMIZE" value="0" />
-  <parameter name="PCS_CONFIG" value="JESD_PCS_CFG2" />
+  <parameter name="PCS_CONFIG" value="JESD_PCS_CFG1" />
   <parameter name="PHADJ" value="0" />
   <parameter name="REFCLK_FREQ" value="125.0" />
   <parameter name="RES1" value="0" />
@@ -1123,12 +1111,12 @@
   <parameter name="lane_rate" value="4915.2" />
   <parameter name="part_trait_bd" value="NIGHTFURY4" />
   <parameter name="part_trait_dp" value="10AS066N3F40E2SGE2" />
-  <parameter name="pll_reconfig_enable" value="true" />
+  <parameter name="pll_reconfig_enable" value="false" />
   <parameter name="pll_type" value="CMU" />
   <parameter name="rcfg_jtag_enable" value="false" />
   <parameter name="sdc_constraint" value="1.0" />
   <parameter name="set_capability_reg_enable" value="false" />
-  <parameter name="set_csr_soft_logic_enable" value="true" />
+  <parameter name="set_csr_soft_logic_enable" value="false" />
   <parameter name="set_prbs_soft_logic_enable" value="false" />
   <parameter name="set_user_identifier" value="0" />
   <parameter name="wrapper_opt" value="base_phy" />
@@ -1317,21 +1305,6 @@
    version="15.1"
    start="xcvr_ref_clk.out_clk"
    end="xcvr_tx_lane_pll.pll_refclk0" />
- <connection
-   kind="clock"
-   version="15.1"
-   start="sys_clk.out_clk"
-   end="xcvr_rx_os_core.reconfig_clk" />
- <connection
-   kind="clock"
-   version="15.1"
-   start="sys_clk.out_clk"
-   end="xcvr_tx_core.reconfig_clk" />
- <connection
-   kind="clock"
-   version="15.1"
-   start="sys_clk.out_clk"
-   end="xcvr_rx_core.reconfig_clk" />
  <connection
    kind="clock"
    version="15.1"
@@ -2131,21 +2104,6 @@
    version="15.1"
    start="sys_rst.out_reset"
    end="xcvr_pll_reconfig.mgmt_reset" />
- <connection
-   kind="reset"
-   version="15.1"
-   start="sys_rst.out_reset"
-   end="xcvr_rx_os_core.reconfig_reset" />
- <connection
-   kind="reset"
-   version="15.1"
-   start="sys_rst.out_reset"
-   end="xcvr_tx_core.reconfig_reset" />
- <connection
-   kind="reset"
-   version="15.1"
-   start="sys_rst.out_reset"
-   end="xcvr_rx_core.reconfig_reset" />
  <connection
    kind="reset"
    version="15.1"