From 30c3f8244cb9fbb7918ef34785fc8036850ff733 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 5 Apr 2018 13:08:02 +0200 Subject: [PATCH] jesd204_soft_pcs_rx: Add support for lane polarity inversion Some designs choose to swap the positive and negative side of the of the JESD204 lanes. One reason for this would be because it can simplify the PCB layout. To support this add a parameter to the jesd204_soft_pcs_rx module that allows to specify whether the lane polarity is inverted or not. The way the polarity inversion is implemented it is for free since it will only invert the input mapping of the 8b10b decoder LUT tables. The pattern align module does not care whether the polarity is inverted or not since the pattern align symbols look the same in both cases. Signed-off-by: Lars-Peter Clausen --- library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v | 8 +++++--- .../jesd204_soft_pcs_rx/jesd204_soft_pcs_rx_hw.tcl | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v b/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v index 09127eac4..09b20298a 100644 --- a/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v +++ b/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v @@ -45,7 +45,8 @@ module jesd204_soft_pcs_rx #( parameter NUM_LANES = 1, parameter DATA_PATH_WIDTH = 4, - parameter REGISTER_INPUTS = 0 + parameter REGISTER_INPUTS = 0, + parameter INVERT_INPUTS = 0 ) ( input clk, input reset, @@ -94,7 +95,6 @@ if (REGISTER_INPUTS == 1) begin end assign patternalign_en_s = patternalign_en_r; assign data_s = data_r; - end else begin assign patternalign_en_s = patternalign_en; assign data_s = data; @@ -125,9 +125,11 @@ for (lane = 0; lane < NUM_LANES; lane = lane + 1) begin: gen_lane for (i = 0; i < DATA_PATH_WIDTH; i = i + 1) begin: gen_dpw localparam j = DATA_PATH_WIDTH * lane + i; + wire [9:0] in_char = INVERT_INPUTS ? ~data_aligned[j*10+:10] : + data_aligned[j*10+:10]; jesd204_8b10b_decoder i_dec ( - .in_char(data_aligned[j*10+:10]), + .in_char(in_char), .out_char(char_s[j*8+:8]), .out_charisk(charisk_s[j]), .out_notintable(notintable_s[j]), diff --git a/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx_hw.tcl b/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx_hw.tcl index fd78bc82b..20d1eecef 100644 --- a/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx_hw.tcl +++ b/library/jesd204/jesd204_soft_pcs_rx/jesd204_soft_pcs_rx_hw.tcl @@ -50,6 +50,7 @@ source $ad_hdl_dir/library/scripts/adi_ip_alt.tcl ad_ip_create jesd204_soft_pcs_rx "ADI JESD204 Transmit Soft PCS" ad_ip_parameter REGISTER_INPUTS INTEGER 0 +ad_ip_parameter INVERT_INPUTS INTEGER 0 set_module_property INTERNAL true