From 81f0e417d46004e3ea6ec4b0b0ae35f2d9d45fc1 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 25 Nov 2014 18:34:44 +0100 Subject: [PATCH 01/24] Add Vivado version check to adi_project_create The scripts generating the projects files typically only work correctly with one specific version of Vivado. If a incorrect version is used the script may fail at some point with a cryptic error message or may not fail but create a bitstream that is not working as expected, e.g. unconnected signals, etc. This patch adds a version check to adi_project_create that will error out early on stating that the wrong version of Vivado was used and which is the right version to use. By default the required version will be the version that is required by the common scripts. Individual projects can overwrite the required version by setting the REQUIRED_VIVADO_VERSION variable to the required version or can bypass the version check completely by setting the IGNORE_VERSION_CHECK variable to 1. Callers of the script can also disable the version check by setting the ADI_IGNORE_VERSION_CHECK environment variable. Signed-off-by: Lars-Peter Clausen --- projects/scripts/adi_project.tcl | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/projects/scripts/adi_project.tcl b/projects/scripts/adi_project.tcl index 94c6c7d87..9459aed4e 100644 --- a/projects/scripts/adi_project.tcl +++ b/projects/scripts/adi_project.tcl @@ -1,11 +1,23 @@ set xl_board "none" +if {![info exists REQUIRED_VIVADO_VERSION]} { + set REQUIRED_VIVADO_VERSION "2014.2" +} + +if {[info exists ::env(ADI_IGNORE_VERSION_CHECK)]} { + set IGNORE_VERSION_CHECK 1 +} elseif {![info exists IGNORE_VERSION_CHECK]} { + set IGNORE_VERSION_CHECK 0 +} + proc adi_project_create {project_name} { global ad_hdl_dir global ad_phdl_dir global xl_board + global REQUIRED_VIVADO_VERSION + global IGNORE_VERSION_CHECK set xl_board "none" set project_part "none" @@ -78,6 +90,10 @@ proc adi_project_create {project_name} { # vivado - 7 and up + if {!$IGNORE_VERSION_CHECK && [string compare [version -short] $REQUIRED_VIVADO_VERSION] != 0} { + return -code error [format "ERROR: This project requires Vivado %s." $REQUIRED_VIVADO_VERSION] + } + set project_system_dir "./$project_name.srcs/sources_1/bd/system" create_project $project_name . -part $project_part -force From 67f82c9e3e90f46d9485f51500dc5e8770c7283e Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 10:45:00 +0200 Subject: [PATCH 02/24] ad6676_fmc: Fix GT lane number definition --- projects/ad6676evb/common/ad6676evb_bd.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/ad6676evb/common/ad6676evb_bd.tcl b/projects/ad6676evb/common/ad6676evb_bd.tcl index 30a5b5cf0..1fa016a4b 100644 --- a/projects/ad6676evb/common/ad6676evb_bd.tcl +++ b/projects/ad6676evb/common/ad6676evb_bd.tcl @@ -46,7 +46,7 @@ set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad6676_jesd set_property -dict [list CONFIG.C_LANES {2}] $axi_ad6676_jesd set axi_ad6676_gt [create_bd_cell -type ip -vlnv analog.com:user:axi_jesd_gt:1.0 axi_ad6676_gt] -set_property -dict [list CONFIG.PCORE_NUM_OF_LANES {2}] $axi_ad6676_gt +set_property -dict [list CONFIG.PCORE_NUM_OF_RX_LANES {2}] $axi_ad6676_gt set_property -dict [list CONFIG.PCORE_CPLL_FBDIV {2}] $axi_ad6676_gt set_property -dict [list CONFIG.PCORE_RX_OUT_DIV {1}] $axi_ad6676_gt set_property -dict [list CONFIG.PCORE_TX_OUT_DIV {1}] $axi_ad6676_gt From 322324b89103fda97d162ed7bc8eb6c723f738c0 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 10:48:27 +0200 Subject: [PATCH 03/24] ad6676evb_vc707: Add support for linear flash --- projects/ad6676evb/vc707/system_top.v | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/projects/ad6676evb/vc707/system_top.v b/projects/ad6676evb/vc707/system_top.v index b1bec65f7..f2c595631 100644 --- a/projects/ad6676evb/vc707/system_top.v +++ b/projects/ad6676evb/vc707/system_top.v @@ -77,6 +77,13 @@ module system_top ( fan_pwm, + linear_flash_addr, + linear_flash_adv_ldn, + linear_flash_ce_n, + linear_flash_oen, + linear_flash_wen, + linear_flash_dq_io, + gpio_lcd, gpio_led, gpio_sw, @@ -149,6 +156,14 @@ module system_top ( output fan_pwm; + output [26:1] linear_flash_addr; + output linear_flash_adv_ldn; + output linear_flash_ce_n; + output linear_flash_oen; + output linear_flash_wen; + inout [15:0] linear_flash_dq_io; + + output [ 6:0] gpio_lcd; output [ 7:0] gpio_led; input [12:0] gpio_sw; @@ -244,6 +259,8 @@ module system_top ( .T (gpio_t[0]), .IO (adc_agc4)); + assign fan_pwm = 1'b1; + system_wrapper i_system_wrapper ( .ddr3_addr (ddr3_addr), .ddr3_ba (ddr3_ba), @@ -260,7 +277,12 @@ module system_top ( .ddr3_ras_n (ddr3_ras_n), .ddr3_reset_n (ddr3_reset_n), .ddr3_we_n (ddr3_we_n), - .fan_pwm (fan_pwm), + .linear_flash_addr (linear_flash_addr), + .linear_flash_adv_ldn (linear_flash_adv_ldn), + .linear_flash_ce_n (linear_flash_ce_n), + .linear_flash_oen (linear_flash_oen), + .linear_flash_wen (linear_flash_wen), + .linear_flash_dq_io(linear_flash_dq_io), .gpio_lcd_tri_o (gpio_lcd), .gpio_led_tri_o (gpio_led), .gpio_sw_tri_i (gpio_sw), From 626b719ad8f777224dc7b139d5d8b01573c70e8f Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 10:49:14 +0200 Subject: [PATCH 04/24] ad6676ebv_vc707: Update the interrupts --- projects/ad6676evb/vc707/system_top.v | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/projects/ad6676evb/vc707/system_top.v b/projects/ad6676evb/vc707/system_top.v index f2c595631..76f146059 100644 --- a/projects/ad6676evb/vc707/system_top.v +++ b/projects/ad6676evb/vc707/system_top.v @@ -210,6 +210,8 @@ module system_top ( wire rx_sysref; wire rx_sync; + wire [31:0] mb_intrs; + // instantiations IBUFDS_GTE2 i_ibufds_rx_ref_clk ( @@ -294,6 +296,31 @@ module system_top ( .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), .iic_rstn (iic_rstn), + .mb_intr_10 (mb_intrs[10]), + .mb_intr_11 (mb_intrs[11]), + .mb_intr_12 (mb_intrs[12]), + .mb_intr_13 (mb_intrs[13]), + .mb_intr_14 (mb_intrs[14]), + .mb_intr_15 (mb_intrs[15]), + .mb_intr_16 (mb_intrs[16]), + .mb_intr_17 (mb_intrs[17]), + .mb_intr_18 (mb_intrs[18]), + .mb_intr_19 (mb_intrs[19]), + .mb_intr_20 (mb_intrs[20]), + .mb_intr_21 (mb_intrs[21]), + .mb_intr_22 (mb_intrs[22]), + .mb_intr_23 (mb_intrs[23]), + .mb_intr_24 (mb_intrs[24]), + .mb_intr_25 (mb_intrs[25]), + .mb_intr_26 (mb_intrs[26]), + .mb_intr_27 (mb_intrs[27]), + .mb_intr_28 (mb_intrs[28]), + .mb_intr_29 (mb_intrs[29]), + .mb_intr_30 (mb_intrs[30]), + .mb_intr_31 (mb_intrs[31]), + .ad6676_spi_intr (mb_intrs[13]), + .ad6676_gpio_intr (mb_intrs[14]), + .ad6676_dma_intr (mb_intrs[10]), .mdio_mdc (mdio_mdc), .mdio_mdio_io (mdio_mdio), .mgt_clk_clk_n (mgt_clk_n), From 40c5816bd705ee566898f23ed1e093c5094a8a8e Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Wed, 26 Nov 2014 11:21:20 +0200 Subject: [PATCH 05/24] fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts --- projects/fmcomms2/mitx045/system_constr.xdc | 5 ----- projects/fmcomms2/mitx045/system_top.v | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/projects/fmcomms2/mitx045/system_constr.xdc b/projects/fmcomms2/mitx045/system_constr.xdc index b07e93b8e..8797f68b9 100644 --- a/projects/fmcomms2/mitx045/system_constr.xdc +++ b/projects/fmcomms2/mitx045/system_constr.xdc @@ -62,8 +62,3 @@ set_property -dict {PACKAGE_PIN W28 IOSTANDARD LVCMOS25} [get_ports spi_miso create_clock -name rx_clk -period 4.00 [get_ports rx_clk_in_p] create_clock -name ad9361_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_ad9361/clk] -create_clock -name fmc_dma_clk -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK2] - -set_clock_groups -asynchronous -group {ad9361_clk} -set_clock_groups -asynchronous -group {fmc_dma_clk} - diff --git a/projects/fmcomms2/mitx045/system_top.v b/projects/fmcomms2/mitx045/system_top.v index 9a4302dd0..6139f4045 100644 --- a/projects/fmcomms2/mitx045/system_top.v +++ b/projects/fmcomms2/mitx045/system_top.v @@ -183,6 +183,7 @@ module system_top ( wire [48:0] gpio_o; wire [48:0] gpio_t; wire [19:0] gpio_wire; + wire [15:0] ps_intrs; // instantiations @@ -237,6 +238,22 @@ module system_top ( .i2s_sdata_out (i2s_sdata_out), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .ps_intr_0 (ps_intrs[0]), + .ps_intr_1 (ps_intrs[1]), + .ps_intr_10 (ps_intrs[10]), + .ps_intr_11 (ps_intrs[11]), + .ps_intr_12 (ps_intrs[12]), + .ps_intr_13 (ps_intrs[13]), + .ps_intr_2 (ps_intrs[2]), + .ps_intr_3 (ps_intrs[3]), + .ps_intr_4 (ps_intrs[4]), + .ps_intr_5 (ps_intrs[5]), + .ps_intr_6 (ps_intrs[6]), + .ps_intr_7 (ps_intrs[7]), + .ps_intr_8 (ps_intrs[8]), + .ps_intr_9 (ps_intrs[9]), + .ad9361_dac_dma_irq (ps_intrs[12]), + .ad9361_adc_dma_irq (ps_intrs[13]), .rx_clk_in_n (rx_clk_in_n), .rx_clk_in_p (rx_clk_in_p), .rx_data_in_n (rx_data_in_n), From 03751827cb2599774663bfc875217314a34ee676 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Wed, 26 Nov 2014 11:25:19 +0200 Subject: [PATCH 06/24] fmcomms2: Updated vc707 project - updated constraints - updated interrupts - used ad_iobuf - added linear_flash --- projects/fmcomms2/vc707/system_constr.xdc | 7 +- projects/fmcomms2/vc707/system_project.tcl | 1 + projects/fmcomms2/vc707/system_top.v | 151 +++++++++++---------- 3 files changed, 84 insertions(+), 75 deletions(-) diff --git a/projects/fmcomms2/vc707/system_constr.xdc b/projects/fmcomms2/vc707/system_constr.xdc index 70663e915..d4ab66b79 100644 --- a/projects/fmcomms2/vc707/system_constr.xdc +++ b/projects/fmcomms2/vc707/system_constr.xdc @@ -60,8 +60,5 @@ set_property -dict {PACKAGE_PIN H31 IOSTANDARD LVCMOS18} [get_ports spi_miso] # clocks -create_clock -name rx_clk -period 5 [get_ports rx_clk_in_p] -create_clock -name ad9361_clk -period 5 [get_pins i_system_wrapper/system_i/axi_ad9361/clk] - -set_clock_groups -asynchronous -group {ad9361_clk} - +create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p] +create_clock -name ad9361_clk -period 4 [get_pins i_system_wrapper/system_i/axi_ad9361/clk] diff --git a/projects/fmcomms2/vc707/system_project.tcl b/projects/fmcomms2/vc707/system_project.tcl index 933021cf2..b7bff3f85 100644 --- a/projects/fmcomms2/vc707/system_project.tcl +++ b/projects/fmcomms2/vc707/system_project.tcl @@ -8,6 +8,7 @@ adi_project_create fmcomms2_vc707 adi_project_files fmcomms2_vc707 [list \ "system_top.v" \ "system_constr.xdc"\ + "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/vc707/vc707_system_constr.xdc" ] adi_project_run fmcomms2_vc707 diff --git a/projects/fmcomms2/vc707/system_top.v b/projects/fmcomms2/vc707/system_top.v index 55ff34f40..5d2c7b9b4 100644 --- a/projects/fmcomms2/vc707/system_top.v +++ b/projects/fmcomms2/vc707/system_top.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** @@ -63,6 +63,13 @@ module system_top ( ddr3_reset_n, ddr3_we_n, + linear_flash_addr, + linear_flash_adv_ldn, + linear_flash_ce_n, + linear_flash_oen, + linear_flash_wen, + linear_flash_dq_io, + sgmii_rxp, sgmii_rxn, sgmii_txp, @@ -91,21 +98,21 @@ module system_top ( hdmi_data, spdif, - + rx_clk_in_p, rx_clk_in_n, rx_frame_in_p, rx_frame_in_n, rx_data_in_p, rx_data_in_n, - + tx_clk_out_p, tx_clk_out_n, tx_frame_out_p, tx_frame_out_n, tx_data_out_p, - tx_data_out_n, - + tx_data_out_n, + gpio_txnrx, gpio_enable, gpio_resetb, @@ -117,7 +124,7 @@ module system_top ( spi_csn, spi_clk, spi_mosi, - spi_miso + spi_miso ); input sys_rst; @@ -143,6 +150,7 @@ module system_top ( output ddr3_reset_n; output ddr3_we_n; + input sgmii_rxp; input sgmii_rxn; output sgmii_txp; @@ -156,6 +164,13 @@ module system_top ( output fan_pwm; + output [26:1] linear_flash_addr; + output linear_flash_adv_ldn; + output linear_flash_ce_n; + output linear_flash_oen; + output linear_flash_wen; + inout [15:0] linear_flash_dq_io; + output [ 6:0] gpio_lcd; output [ 7:0] gpio_led; input [12:0] gpio_sw; @@ -171,14 +186,14 @@ module system_top ( output [35:0] hdmi_data; output spdif; - + input rx_clk_in_p; input rx_clk_in_n; input rx_frame_in_p; input rx_frame_in_n; input [ 5:0] rx_data_in_p; input [ 5:0] rx_data_in_n; - + output tx_clk_out_p; output tx_clk_out_n; output tx_frame_out_p; @@ -193,67 +208,33 @@ module system_top ( inout gpio_en_agc; inout [ 3:0] gpio_ctl; inout [ 7:0] gpio_status; - + output spi_csn; output spi_clk; output spi_mosi; - input spi_miso; - + input spi_miso; + // internal signals wire [16:0] gpio_i; wire [16:0] gpio_o; - wire [16:0] gpio_t; + wire [16:0] gpio_t; + wire [31:0] mb_intrs; + + assign fan_pwm = 1'b1; // instantiations - - IOBUF i_iobuf_gpio_txnrx ( - .I (gpio_o[16]), - .O (gpio_i[16]), - .T (gpio_t[16]), - .IO (gpio_txnrx)); - IOBUF i_iobuf_gpio_enable ( - .I (gpio_o[15]), - .O (gpio_i[15]), - .T (gpio_t[15]), - .IO (gpio_enable)); - - IOBUF i_iobuf_gpio_resetb ( - .I (gpio_o[14]), - .O (gpio_i[14]), - .T (gpio_t[14]), - .IO (gpio_resetb)); - - IOBUF i_iobuf_gpio_sync ( - .I (gpio_o[13]), - .O (gpio_i[13]), - .T (gpio_t[13]), - .IO (gpio_sync)); - - IOBUF i_iobuf_gpio_en_agc ( - .I (gpio_o[12]), - .O (gpio_i[12]), - .T (gpio_t[12]), - .IO (gpio_en_agc)); - - genvar n; - generate - for (n = 0; n <= 3; n = n + 1) begin: g_iobuf_gpio_ctl - IOBUF i_iobuf_gpio_ctl ( - .I (gpio_o[8+n]), - .O (gpio_i[8+n]), - .T (gpio_t[8+n]), - .IO (gpio_ctl[n])); - end - for (n = 0; n <= 7; n = n + 1) begin: g_iobuf_gpio_status - IOBUF i_iobuf_gpio_status ( - .I (gpio_o[0+n]), - .O (gpio_i[0+n]), - .T (gpio_t[0+n]), - .IO (gpio_status[n])); - end - - endgenerate + ad_iobuf #(.DATA_WIDTH(17)) i_iobuf ( + .dt (gpio_t[16:0]), + .di (gpio_o[16:0]), + .do (gpio_i[16:0]), + .dio({ gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status})); system_wrapper i_system_wrapper ( .ddr3_addr (ddr3_addr), @@ -271,7 +252,12 @@ module system_top ( .ddr3_ras_n (ddr3_ras_n), .ddr3_reset_n (ddr3_reset_n), .ddr3_we_n (ddr3_we_n), - .fan_pwm (fan_pwm), + .linear_flash_addr (linear_flash_addr), + .linear_flash_adv_ldn (linear_flash_adv_ldn), + .linear_flash_ce_n (linear_flash_ce_n), + .linear_flash_oen (linear_flash_oen), + .linear_flash_wen (linear_flash_wen), + .linear_flash_dq_io(linear_flash_dq_io), .gpio_lcd_tri_o (gpio_lcd), .gpio_led_tri_o (gpio_led), .gpio_sw_tri_i (gpio_sw), @@ -286,6 +272,32 @@ module system_top ( .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), .iic_rstn (iic_rstn), + .mb_intr_10 (mb_intrs[10]), + .mb_intr_11 (mb_intrs[11]), + .mb_intr_12 (mb_intrs[12]), + .mb_intr_13 (mb_intrs[13]), + .mb_intr_14 (mb_intrs[14]), + .mb_intr_15 (mb_intrs[15]), + .mb_intr_16 (mb_intrs[16]), + .mb_intr_17 (mb_intrs[17]), + .mb_intr_18 (mb_intrs[18]), + .mb_intr_19 (mb_intrs[19]), + .mb_intr_20 (mb_intrs[20]), + .mb_intr_21 (mb_intrs[21]), + .mb_intr_22 (mb_intrs[22]), + .mb_intr_23 (mb_intrs[23]), + .mb_intr_24 (mb_intrs[24]), + .mb_intr_25 (mb_intrs[25]), + .mb_intr_26 (mb_intrs[26]), + .mb_intr_27 (mb_intrs[27]), + .mb_intr_28 (mb_intrs[28]), + .mb_intr_29 (mb_intrs[29]), + .mb_intr_30 (mb_intrs[30]), + .mb_intr_31 (mb_intrs[31]), + .fmcomms2_spi_irq(mb_intrs[10]), + .fmcomms2_gpio_irq(mb_intrs[11]), + .ad9361_adc_dma_irq (mb_intrs[12]), + .ad9361_dac_dma_irq (mb_intrs[13]), .mdio_mdc (mdio_mdc), .mdio_mdio_io (mdio_mdio), .mgt_clk_clk_n (mgt_clk_n), @@ -300,7 +312,7 @@ module system_top ( .sys_clk_p (sys_clk_p), .sys_rst (sys_rst), .spi_csn_i (1'b1), - .spi_csn_o (spi_csn), + .spi_csn_o (spi_csn), .spi_miso_i (spi_miso), .spi_mosi_i (1'b0), .spi_mosi_o (spi_mosi), @@ -311,16 +323,15 @@ module system_top ( .rx_data_in_n (rx_data_in_n), .rx_data_in_p (rx_data_in_p), .rx_frame_in_n (rx_frame_in_n), - .rx_frame_in_p (rx_frame_in_p), + .rx_frame_in_p (rx_frame_in_p), .tx_clk_out_n (tx_clk_out_n), .tx_clk_out_p (tx_clk_out_p), .tx_data_out_n (tx_data_out_n), .tx_data_out_p (tx_data_out_p), .tx_frame_out_n (tx_frame_out_n), - .tx_frame_out_p (tx_frame_out_p), + .tx_frame_out_p (tx_frame_out_p), .uart_sin (uart_sin), - .uart_sout (uart_sout), - .unc_int4 (1'b0)); + .uart_sout (uart_sout)); endmodule From 199e86d7154a786fca01d969eecbdbf115bfa202 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Wed, 26 Nov 2014 11:26:58 +0200 Subject: [PATCH 07/24] fmcomms2: Added iic_fmc_intr to the zed top file --- projects/fmcomms2/zed/system_top.v | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/fmcomms2/zed/system_top.v b/projects/fmcomms2/zed/system_top.v index d3ce94e17..51411a1b3 100644 --- a/projects/fmcomms2/zed/system_top.v +++ b/projects/fmcomms2/zed/system_top.v @@ -294,6 +294,7 @@ module system_top ( .ps_intr_9 (ps_intrs[9]), .ad9361_dac_dma_irq (ps_intrs[12]), .ad9361_adc_dma_irq (ps_intrs[13]), + .iic_fmc_intr(ps_intrs[11]), .otg_vbusoc (otg_vbusoc), .rx_clk_in_n (rx_clk_in_n), .rx_clk_in_p (rx_clk_in_p), From 00c7b23b21fcc1af8e72b6cc48f413ad45cb2dd4 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 13:48:48 +0200 Subject: [PATCH 08/24] daq2_fmc: Cosmetic changes Delete trailing whitespaces, no functional changes. --- projects/daq2/kc705/system_constr.xdc | 124 +++++++++++++------------- projects/daq2/kc705/system_top.v | 30 +++---- projects/daq2/zc706/system_constr.xdc | 8 +- projects/daq2/zc706/system_top.v | 34 +++---- 4 files changed, 98 insertions(+), 98 deletions(-) diff --git a/projects/daq2/kc705/system_constr.xdc b/projects/daq2/kc705/system_constr.xdc index 56ffb0499..0ce9413f1 100644 --- a/projects/daq2/kc705/system_constr.xdc +++ b/projects/daq2/kc705/system_constr.xdc @@ -1,62 +1,62 @@ - -# daq2 - -set_property -dict {PACKAGE_PIN E8} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P -set_property -dict {PACKAGE_PIN E7} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N -set_property -dict {PACKAGE_PIN A8} [get_ports rx_data_p[0]] ; ## A10 FMC_HPC_DP3_M2C_P -set_property -dict {PACKAGE_PIN A7} [get_ports rx_data_n[0]] ; ## A11 FMC_HPC_DP3_M2C_N -set_property -dict {PACKAGE_PIN E4} [get_ports rx_data_p[1]] ; ## C06 FMC_HPC_DP0_M2C_P -set_property -dict {PACKAGE_PIN E3} [get_ports rx_data_n[1]] ; ## C07 FMC_HPC_DP0_M2C_N -set_property -dict {PACKAGE_PIN B6} [get_ports rx_data_p[2]] ; ## A06 FMC_HPC_DP2_M2C_P -set_property -dict {PACKAGE_PIN B5} [get_ports rx_data_n[2]] ; ## A07 FMC_HPC_DP2_M2C_N -set_property -dict {PACKAGE_PIN D6} [get_ports rx_data_p[3]] ; ## A02 FMC_HPC_DP1_M2C_P -set_property -dict {PACKAGE_PIN D5} [get_ports rx_data_n[3]] ; ## A03 FMC_HPC_DP1_M2C_N -set_property -dict {PACKAGE_PIN D26 IOSTANDARD LVDS_25} [get_ports rx_sync_p] ; ## D08 FMC_HPC_LA01_CC_P -set_property -dict {PACKAGE_PIN C26 IOSTANDARD LVDS_25} [get_ports rx_sync_n] ; ## D09 FMC_HPC_LA01_CC_N -set_property -dict {PACKAGE_PIN H26 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## G09 FMC_HPC_LA03_P -set_property -dict {PACKAGE_PIN H27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## G10 FMC_HPC_LA03_N - -set_property -dict {PACKAGE_PIN C8} [get_ports tx_ref_clk_p] ; ## D04 FMC_HPC_GBTCLK0_M2C_P -set_property -dict {PACKAGE_PIN C7} [get_ports tx_ref_clk_n] ; ## D05 FMC_HPC_GBTCLK0_M2C_N -set_property -dict {PACKAGE_PIN A4} [get_ports tx_data_p[0]] ; ## A30 FMC_HPC_DP3_C2M_P (tx_data_p[0]) -set_property -dict {PACKAGE_PIN A3} [get_ports tx_data_n[0]] ; ## A31 FMC_HPC_DP3_C2M_N (tx_data_n[0]) -set_property -dict {PACKAGE_PIN D2} [get_ports tx_data_p[1]] ; ## C02 FMC_HPC_DP0_C2M_P (tx_data_p[3]) -set_property -dict {PACKAGE_PIN D1} [get_ports tx_data_n[1]] ; ## C03 FMC_HPC_DP0_C2M_N (tx_data_n[3]) -set_property -dict {PACKAGE_PIN B2} [get_ports tx_data_p[2]] ; ## A26 FMC_HPC_DP2_C2M_P (tx_data_p[1]) -set_property -dict {PACKAGE_PIN B1} [get_ports tx_data_n[2]] ; ## A27 FMC_HPC_DP2_C2M_N (tx_data_n[1]) -set_property -dict {PACKAGE_PIN C4} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2]) -set_property -dict {PACKAGE_PIN C3} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2]) -set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_p] ; ## H07 FMC_HPC_LA02_P -set_property -dict {PACKAGE_PIN H25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_n] ; ## H08 FMC_HPC_LA02_N -set_property -dict {PACKAGE_PIN G28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_p] ; ## H10 FMC_HPC_LA04_P -set_property -dict {PACKAGE_PIN F28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_n] ; ## H11 FMC_HPC_LA04_N - -set_property -dict {PACKAGE_PIN G29 IOSTANDARD LVCMOS25} [get_ports spi_csn_clk] ; ## D11 FMC_HPC_LA05_P -set_property -dict {PACKAGE_PIN D29 IOSTANDARD LVCMOS25} [get_ports spi_csn_dac] ; ## C14 FMC_HPC_LA10_P -set_property -dict {PACKAGE_PIN A30 IOSTANDARD LVCMOS25} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N -set_property -dict {PACKAGE_PIN F30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N -set_property -dict {PACKAGE_PIN B30 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P -set_property -dict {PACKAGE_PIN E30 IOSTANDARD LVCMOS25} [get_ports spi_dir] ; ## G13 FMC_HPC_LA08_N - -set_property -dict {PACKAGE_PIN E29 IOSTANDARD LVCMOS25} [get_ports clkd_sync] ; ## G12 FMC_HPC_LA08_P -set_property -dict {PACKAGE_PIN C30 IOSTANDARD LVCMOS25} [get_ports dac_reset] ; ## C15 FMC_HPC_LA10_N -set_property -dict {PACKAGE_PIN B29 IOSTANDARD LVCMOS25} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N -set_property -dict {PACKAGE_PIN H30 IOSTANDARD LVCMOS25} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P - -set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P -set_property -dict {PACKAGE_PIN A26 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N -set_property -dict {PACKAGE_PIN C29 IOSTANDARD LVCMOS25} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P -set_property -dict {PACKAGE_PIN G27 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P -set_property -dict {PACKAGE_PIN F27 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N - -set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P -set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N - -# clocks - -create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p] -create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p] -create_clock -name tx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_tx_clk] -create_clock -name rx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_rx_clk] - - + +# daq2 + +set_property -dict {PACKAGE_PIN E8} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P +set_property -dict {PACKAGE_PIN E7} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N +set_property -dict {PACKAGE_PIN A8} [get_ports rx_data_p[0]] ; ## A10 FMC_HPC_DP3_M2C_P +set_property -dict {PACKAGE_PIN A7} [get_ports rx_data_n[0]] ; ## A11 FMC_HPC_DP3_M2C_N +set_property -dict {PACKAGE_PIN E4} [get_ports rx_data_p[1]] ; ## C06 FMC_HPC_DP0_M2C_P +set_property -dict {PACKAGE_PIN E3} [get_ports rx_data_n[1]] ; ## C07 FMC_HPC_DP0_M2C_N +set_property -dict {PACKAGE_PIN B6} [get_ports rx_data_p[2]] ; ## A06 FMC_HPC_DP2_M2C_P +set_property -dict {PACKAGE_PIN B5} [get_ports rx_data_n[2]] ; ## A07 FMC_HPC_DP2_M2C_N +set_property -dict {PACKAGE_PIN D6} [get_ports rx_data_p[3]] ; ## A02 FMC_HPC_DP1_M2C_P +set_property -dict {PACKAGE_PIN D5} [get_ports rx_data_n[3]] ; ## A03 FMC_HPC_DP1_M2C_N +set_property -dict {PACKAGE_PIN D26 IOSTANDARD LVDS_25} [get_ports rx_sync_p] ; ## D08 FMC_HPC_LA01_CC_P +set_property -dict {PACKAGE_PIN C26 IOSTANDARD LVDS_25} [get_ports rx_sync_n] ; ## D09 FMC_HPC_LA01_CC_N +set_property -dict {PACKAGE_PIN H26 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## G09 FMC_HPC_LA03_P +set_property -dict {PACKAGE_PIN H27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## G10 FMC_HPC_LA03_N + +set_property -dict {PACKAGE_PIN C8} [get_ports tx_ref_clk_p] ; ## D04 FMC_HPC_GBTCLK0_M2C_P +set_property -dict {PACKAGE_PIN C7} [get_ports tx_ref_clk_n] ; ## D05 FMC_HPC_GBTCLK0_M2C_N +set_property -dict {PACKAGE_PIN A4} [get_ports tx_data_p[0]] ; ## A30 FMC_HPC_DP3_C2M_P (tx_data_p[0]) +set_property -dict {PACKAGE_PIN A3} [get_ports tx_data_n[0]] ; ## A31 FMC_HPC_DP3_C2M_N (tx_data_n[0]) +set_property -dict {PACKAGE_PIN D2} [get_ports tx_data_p[1]] ; ## C02 FMC_HPC_DP0_C2M_P (tx_data_p[3]) +set_property -dict {PACKAGE_PIN D1} [get_ports tx_data_n[1]] ; ## C03 FMC_HPC_DP0_C2M_N (tx_data_n[3]) +set_property -dict {PACKAGE_PIN B2} [get_ports tx_data_p[2]] ; ## A26 FMC_HPC_DP2_C2M_P (tx_data_p[1]) +set_property -dict {PACKAGE_PIN B1} [get_ports tx_data_n[2]] ; ## A27 FMC_HPC_DP2_C2M_N (tx_data_n[1]) +set_property -dict {PACKAGE_PIN C4} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2]) +set_property -dict {PACKAGE_PIN C3} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2]) +set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_p] ; ## H07 FMC_HPC_LA02_P +set_property -dict {PACKAGE_PIN H25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_n] ; ## H08 FMC_HPC_LA02_N +set_property -dict {PACKAGE_PIN G28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_p] ; ## H10 FMC_HPC_LA04_P +set_property -dict {PACKAGE_PIN F28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_n] ; ## H11 FMC_HPC_LA04_N + +set_property -dict {PACKAGE_PIN G29 IOSTANDARD LVCMOS25} [get_ports spi_csn_clk] ; ## D11 FMC_HPC_LA05_P +set_property -dict {PACKAGE_PIN D29 IOSTANDARD LVCMOS25} [get_ports spi_csn_dac] ; ## C14 FMC_HPC_LA10_P +set_property -dict {PACKAGE_PIN A30 IOSTANDARD LVCMOS25} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N +set_property -dict {PACKAGE_PIN F30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N +set_property -dict {PACKAGE_PIN B30 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P +set_property -dict {PACKAGE_PIN E30 IOSTANDARD LVCMOS25} [get_ports spi_dir] ; ## G13 FMC_HPC_LA08_N + +set_property -dict {PACKAGE_PIN E29 IOSTANDARD LVCMOS25} [get_ports clkd_sync] ; ## G12 FMC_HPC_LA08_P +set_property -dict {PACKAGE_PIN C30 IOSTANDARD LVCMOS25} [get_ports dac_reset] ; ## C15 FMC_HPC_LA10_N +set_property -dict {PACKAGE_PIN B29 IOSTANDARD LVCMOS25} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N +set_property -dict {PACKAGE_PIN H30 IOSTANDARD LVCMOS25} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P + +set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P +set_property -dict {PACKAGE_PIN A26 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N +set_property -dict {PACKAGE_PIN C29 IOSTANDARD LVCMOS25} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P +set_property -dict {PACKAGE_PIN G27 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P +set_property -dict {PACKAGE_PIN F27 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N + +set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P +set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N + +# clocks + +create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p] +create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p] +create_clock -name tx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_tx_clk] +create_clock -name rx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_rx_clk] + + diff --git a/projects/daq2/kc705/system_top.v b/projects/daq2/kc705/system_top.v index 7fbf014a8..766333314 100644 --- a/projects/daq2/kc705/system_top.v +++ b/projects/daq2/kc705/system_top.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** @@ -105,7 +105,7 @@ module system_top ( rx_sync_n, rx_data_p, rx_data_n, - + tx_ref_clk_p, tx_ref_clk_n, tx_sysref_p, @@ -114,7 +114,7 @@ module system_top ( tx_sync_n, tx_data_p, tx_data_n, - + trig_p, trig_n, @@ -122,12 +122,12 @@ module system_top ( adc_fda, dac_irq, clkd_status, - + adc_pd, dac_txen, dac_reset, clkd_sync, - + spi_csn_clk, spi_csn_dac, spi_csn_adc, @@ -199,7 +199,7 @@ module system_top ( output rx_sync_n; input [ 3:0] rx_data_p; input [ 3:0] rx_data_n; - + input tx_ref_clk_p; input tx_ref_clk_n; input tx_sysref_p; @@ -208,27 +208,27 @@ module system_top ( input tx_sync_n; output [ 3:0] tx_data_p; output [ 3:0] tx_data_n; - + input trig_p; input trig_n; - + inout adc_fdb; inout adc_fda; inout dac_irq; inout [ 1:0] clkd_status; - + inout adc_pd; inout dac_txen; inout dac_reset; inout clkd_sync; - + output spi_csn_clk; output spi_csn_dac; output spi_csn_adc; output spi_clk; inout spi_sdio; output spi_dir; - + // internal registers reg dac_drd = 'd0; diff --git a/projects/daq2/zc706/system_constr.xdc b/projects/daq2/zc706/system_constr.xdc index ee9aeae89..e741d45d3 100644 --- a/projects/daq2/zc706/system_constr.xdc +++ b/projects/daq2/zc706/system_constr.xdc @@ -43,14 +43,14 @@ set_property -dict {PACKAGE_PIN AG25 IOSTANDARD LVCMOS25} [get_ports dac_rese set_property -dict {PACKAGE_PIN AF24 IOSTANDARD LVCMOS25} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS25} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P -set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P -set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N +set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P +set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS25} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N -set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P -set_property -dict {PACKAGE_PIN AJ24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N +set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P +set_property -dict {PACKAGE_PIN AJ24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N # clocks diff --git a/projects/daq2/zc706/system_top.v b/projects/daq2/zc706/system_top.v index 405f7b1eb..192820725 100644 --- a/projects/daq2/zc706/system_top.v +++ b/projects/daq2/zc706/system_top.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** @@ -90,7 +90,7 @@ module system_top ( hdmi_hsync, hdmi_data_e, hdmi_data, - + spdif, iic_scl, @@ -104,7 +104,7 @@ module system_top ( rx_sync_n, rx_data_p, rx_data_n, - + tx_ref_clk_p, tx_ref_clk_n, tx_sysref_p, @@ -113,7 +113,7 @@ module system_top ( tx_sync_n, tx_data_p, tx_data_n, - + trig_p, trig_n, @@ -121,12 +121,12 @@ module system_top ( adc_fda, dac_irq, clkd_status, - + adc_pd, dac_txen, dac_reset, clkd_sync, - + spi_csn_clk, spi_csn_dac, spi_csn_adc, @@ -183,7 +183,7 @@ module system_top ( output hdmi_hsync; output hdmi_data_e; output [23:0] hdmi_data; - + output spdif; inout iic_scl; @@ -197,7 +197,7 @@ module system_top ( output rx_sync_n; input [ 3:0] rx_data_p; input [ 3:0] rx_data_n; - + input tx_ref_clk_p; input tx_ref_clk_n; input tx_sysref_p; @@ -206,20 +206,20 @@ module system_top ( input tx_sync_n; output [ 3:0] tx_data_p; output [ 3:0] tx_data_n; - + input trig_p; input trig_n; - + inout adc_fdb; inout adc_fda; inout dac_irq; inout [ 1:0] clkd_status; - + inout adc_pd; inout dac_txen; inout dac_reset; inout clkd_sync; - + output spi_csn_clk; output spi_csn_dac; output spi_csn_adc; @@ -237,7 +237,7 @@ module system_top ( reg adc_dsync = 'd0; reg adc_dwr = 'd0; reg [127:0] adc_ddata = 'd0; - + // internal signals wire trig; From 630f26442a92a850ab342956b2e89af51eea35a9 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 13:50:42 +0200 Subject: [PATCH 09/24] daq2_kc705: Instantiate dmafifo module --- projects/daq2/kc705/system_bd.tcl | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/projects/daq2/kc705/system_bd.tcl b/projects/daq2/kc705/system_bd.tcl index ad00363e9..d3be505ad 100644 --- a/projects/daq2/kc705/system_bd.tcl +++ b/projects/daq2/kc705/system_bd.tcl @@ -1,5 +1,9 @@ source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl source $ad_hdl_dir/projects/common/xilinx/sys_dmafifo.tcl + +p_sys_dmafifo [current_bd_instance .] axi_ad9680_fifo 128 16 + source ../common/daq2_bd.tcl + From bfd89dc9c7cb1cc0fdd529f00994d2a65d22a991 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 13:51:46 +0200 Subject: [PATCH 10/24] daq2_kc705: Fix constraint file I/O standard for trig_[p/n] is LVDS_25 --- projects/daq2/kc705/system_constr.xdc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/daq2/kc705/system_constr.xdc b/projects/daq2/kc705/system_constr.xdc index 0ce9413f1..503f7720b 100644 --- a/projects/daq2/kc705/system_constr.xdc +++ b/projects/daq2/kc705/system_constr.xdc @@ -49,8 +49,8 @@ set_property -dict {PACKAGE_PIN C29 IOSTANDARD LVCMOS25} [get_ports dac_irq] set_property -dict {PACKAGE_PIN G27 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P set_property -dict {PACKAGE_PIN F27 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N -set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P -set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N +set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P +set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N # clocks From 6fd2f8c91338a2b7d2c703c0b7247eb95d13f234 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 13:53:18 +0200 Subject: [PATCH 11/24] daq2_fmc: Update interrupts Update interrupts for ZC706 and KC705 carrier. --- projects/daq2/kc705/system_top.v | 32 ++++++++++++++++++++++++++++---- projects/daq2/zc706/system_top.v | 17 +++++++++++++++++ 2 files changed, 45 insertions(+), 4 deletions(-) diff --git a/projects/daq2/kc705/system_top.v b/projects/daq2/kc705/system_top.v index 766333314..f7a48ad9a 100644 --- a/projects/daq2/kc705/system_top.v +++ b/projects/daq2/kc705/system_top.v @@ -275,6 +275,7 @@ module system_top ( wire [ 4:0] gpio_status_i; wire [ 4:0] gpio_status_o; wire [ 4:0] gpio_status_t; + wire [31:0] mb_intrs; // adc-dac data @@ -516,6 +517,32 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .mb_intr_10 (mb_intrs[10]), + .mb_intr_11 (mb_intrs[11]), + .mb_intr_12 (mb_intrs[12]), + .mb_intr_13 (mb_intrs[13]), + .mb_intr_14 (mb_intrs[14]), + .mb_intr_15 (mb_intrs[15]), + .mb_intr_16 (mb_intrs[16]), + .mb_intr_17 (mb_intrs[17]), + .mb_intr_18 (mb_intrs[18]), + .mb_intr_19 (mb_intrs[19]), + .mb_intr_20 (mb_intrs[20]), + .mb_intr_21 (mb_intrs[21]), + .mb_intr_22 (mb_intrs[22]), + .mb_intr_23 (mb_intrs[23]), + .mb_intr_24 (mb_intrs[24]), + .mb_intr_25 (mb_intrs[25]), + .mb_intr_26 (mb_intrs[26]), + .mb_intr_27 (mb_intrs[27]), + .mb_intr_28 (mb_intrs[28]), + .mb_intr_29 (mb_intrs[29]), + .mb_intr_30 (mb_intrs[30]), + .mb_intr_31 (mb_intrs[31]), + .axi_ad9144_dma_intr (mb_intrs[13]), + .axi_ad9680_dma_intr (mb_intrs[12]), + .axi_daq2_gpio_intr (mb_intrs[11]), + .axi_daq2_spi_intr (mb_intrs[10]), .iic_rstn (iic_rstn), .mdio_mdc (mdio_mdc), .mdio_mdio_io (mdio_mdio_io), @@ -551,10 +578,7 @@ module system_top ( .tx_sync (tx_sync), .tx_sysref (tx_sysref), .uart_sin (uart_sin), - .uart_sout (uart_sout), - .unc_int0 (1'b0), - .unc_int1 (1'b0), - .unc_int4 (1'b0)); + .uart_sout (uart_sout)); endmodule diff --git a/projects/daq2/zc706/system_top.v b/projects/daq2/zc706/system_top.v index 192820725..14b535aa5 100644 --- a/projects/daq2/zc706/system_top.v +++ b/projects/daq2/zc706/system_top.v @@ -270,6 +270,7 @@ module system_top ( wire adc_enable_1; wire adc_valid_0; wire adc_valid_1; + wire [15:0] ps_intrs; // adc-dac data @@ -521,6 +522,22 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .ps_intr_0 (ps_intrs[0]), + .ps_intr_1 (ps_intrs[1]), + .ps_intr_10 (ps_intrs[10]), + .ps_intr_11 (ps_intrs[11]), + .ps_intr_12 (ps_intrs[12]), + .ps_intr_13 (ps_intrs[13]), + .ps_intr_2 (ps_intrs[2]), + .ps_intr_3 (ps_intrs[3]), + .ps_intr_4 (ps_intrs[4]), + .ps_intr_5 (ps_intrs[5]), + .ps_intr_6 (ps_intrs[6]), + .ps_intr_7 (ps_intrs[7]), + .ps_intr_8 (ps_intrs[8]), + .ps_intr_9 (ps_intrs[9]), + .axi_ad9144_dma_intr (ps_intrs[12]), + .axi_ad9680_dma_intr (ps_intrs[13]), .rx_data_n (rx_data_n), .rx_data_p (rx_data_p), .rx_ref_clk (rx_ref_clk), From 419d38b9f69717fcb849a0201827fd858cb48fcd Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 26 Nov 2014 15:08:55 +0200 Subject: [PATCH 12/24] kc705_base: Define sys_addr_mem_seg for dmafifo --- projects/common/kc705/kc705_system_bd.tcl | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/common/kc705/kc705_system_bd.tcl b/projects/common/kc705/kc705_system_bd.tcl index d3ca9d61b..0b84e02d5 100644 --- a/projects/common/kc705/kc705_system_bd.tcl +++ b/projects/common/kc705/kc705_system_bd.tcl @@ -435,6 +435,7 @@ connect_bd_net -net spdif_s [get_bd_ports spdif] [get_bd_pins axi_spdif_tx_core/ set sys_zynq 0 set sys_mem_size 0x40000000 set sys_addr_cntrl_space [get_bd_addr_spaces sys_mb/Data] +set sys_addr_mem_seg [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] create_bd_addr_seg -range 0x00002000 -offset 0x00000000 $sys_addr_cntrl_space [get_bd_addr_segs sys_dlmb_cntlr/SLMB/Mem] SEG_data_dlmb_cntlr create_bd_addr_seg -range 0x00001000 -offset 0x41400000 $sys_addr_cntrl_space [get_bd_addr_segs sys_mb_debug/S_AXI/Reg] SEG_data_mb_debug From ee7d427123d71423e994fcf9df08b446e9389f3f Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 27 Nov 2014 14:00:35 +0200 Subject: [PATCH 13/24] ad9671_fmc: Cosmetic changes Delete trailing whitespaces. --- projects/ad9671_fmc/common/ad9671_fmc_bd.tcl | 36 ++++++++++---------- projects/ad9671_fmc/zc706/system_top.v | 10 +++--- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl index 3363e46c9..42b3bf3ac 100755 --- a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl +++ b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl @@ -99,17 +99,17 @@ connect_bd_net -net spi_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins sys_ps7 # connections (gt) -connect_bd_net -net axi_ad9671_gt_ref_clk_c [get_bd_pins axi_ad9671_gt/ref_clk_c] [get_bd_ports rx_ref_clk] -connect_bd_net -net axi_ad9671_gt_rx_data_p [get_bd_pins axi_ad9671_gt/rx_data_p] [get_bd_ports rx_data_p] -connect_bd_net -net axi_ad9671_gt_rx_data_n [get_bd_pins axi_ad9671_gt/rx_data_n] [get_bd_ports rx_data_n] -connect_bd_net -net axi_ad9671_gt_rx_sync [get_bd_pins axi_ad9671_gt/rx_sync] [get_bd_ports rx_sync] -connect_bd_net -net axi_ad9671_gt_rx_sysref [get_bd_pins axi_ad9671_gt/rx_sysref] [get_bd_ports rx_sysref] +connect_bd_net -net axi_ad9671_gt_ref_clk_c [get_bd_pins axi_ad9671_gt/ref_clk_c] [get_bd_ports rx_ref_clk] +connect_bd_net -net axi_ad9671_gt_rx_data_p [get_bd_pins axi_ad9671_gt/rx_data_p] [get_bd_ports rx_data_p] +connect_bd_net -net axi_ad9671_gt_rx_data_n [get_bd_pins axi_ad9671_gt/rx_data_n] [get_bd_ports rx_data_n] +connect_bd_net -net axi_ad9671_gt_rx_sync [get_bd_pins axi_ad9671_gt/rx_sync] [get_bd_ports rx_sync] +connect_bd_net -net axi_ad9671_gt_rx_sysref [get_bd_pins axi_ad9671_gt/rx_sysref] [get_bd_ports rx_sysref] # connections (adc) connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_pins axi_ad9671_gt/rx_clk_g] connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_pins axi_ad9671_gt/rx_clk] -connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_pins axi_ad9671_core/rx_clk] +connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_pins axi_ad9671_core/rx_clk] connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_pins axi_ad9671_jesd/rx_core_clk] connect_bd_net -net axi_ad9671_gt_rx_clk [get_bd_ports adc_clk] @@ -132,8 +132,8 @@ connect_bd_net -net axi_ad9671_core_adc_valid [get_bd_pins axi_ad9671_core connect_bd_net -net axi_ad9671_core_adc_data [get_bd_pins axi_ad9671_core/adc_data] [get_bd_ports adc_data] connect_bd_net -net axi_ad9671_core_sof [get_bd_pins axi_ad9671_core/rx_data_sof] [get_bd_ports ad9671_sof] connect_bd_net -net axi_ad9671_core_adc_dwr [get_bd_ports dma_wr] [get_bd_pins axi_ad9671_dma/fifo_wr_en] -connect_bd_net -net axi_ad9671_core_adc_dsync [get_bd_ports dma_sync] [get_bd_pins axi_ad9671_dma/fifo_wr_sync] -connect_bd_net -net axi_ad9671_core_adc_ddata [get_bd_ports dma_data] [get_bd_pins axi_ad9671_dma/fifo_wr_din] +connect_bd_net -net axi_ad9671_core_adc_dsync [get_bd_ports dma_sync] [get_bd_pins axi_ad9671_dma/fifo_wr_sync] +connect_bd_net -net axi_ad9671_core_adc_ddata [get_bd_ports dma_data] [get_bd_pins axi_ad9671_dma/fifo_wr_din] connect_bd_net -net axi_ad9671_core_adc_dovf [get_bd_pins axi_ad9671_core/adc_dovf] [get_bd_pins axi_ad9671_dma/fifo_wr_overflow] connect_bd_net -net axi_ad9671_dma_irq [get_bd_pins axi_ad9671_dma/irq] [get_bd_pins sys_concat_intc/In13] @@ -147,18 +147,18 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sy connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M10_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_gt/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_jesd/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_dma/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_gt/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_jesd/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_dma/s_axi_aclk] connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M10_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_gt/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_jesd/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_dma/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_gt/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_jesd/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_dma/s_axi_aresetn] # interconnect (gt es) @@ -184,7 +184,7 @@ connect_bd_net -net sys_fmc_dma_clk $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_resetn $sys_fmc_dma_resetn_source connect_bd_intf_net -intf_net axi_ad9671_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9671_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] -connect_bd_intf_net -intf_net axi_ad9671_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9671_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9671_dma/m_dest_axi] +connect_bd_intf_net -intf_net axi_ad9671_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9671_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9671_dma/m_dest_axi] connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9671_dma_interconnect/ACLK] $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9671_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9671_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source @@ -193,7 +193,7 @@ connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9671_dma/m_dest_axi_aclk] connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma_interconnect/ARESETN] $sys_fmc_dma_resetn_source connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma_interconnect/S00_ARESETN] $sys_fmc_dma_resetn_source connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma_interconnect/M00_ARESETN] $sys_fmc_dma_resetn_source -connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma/m_dest_axi_aresetn] +connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_ad9671_dma/m_dest_axi_aresetn] # ila diff --git a/projects/ad9671_fmc/zc706/system_top.v b/projects/ad9671_fmc/zc706/system_top.v index 94abad5ff..1ec0e5a38 100644 --- a/projects/ad9671_fmc/zc706/system_top.v +++ b/projects/ad9671_fmc/zc706/system_top.v @@ -1,9 +1,9 @@ // *************************************************************************** // *************************************************************************** // Copyright 2011(c) Analog Devices, Inc. -// +// // All rights reserved. -// +// // Redistribution and use in source and binary forms, with or without modification, // are permitted provided that the following conditions are met: // - Redistributions of source code must retain the above copyright @@ -21,16 +21,16 @@ // patent holders to use this software. // - Use of the software either in source or binary form, must be run // on or directly connected to an Analog Devices Inc. component. -// +// // THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, // INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A // PARTICULAR PURPOSE ARE DISCLAIMED. // // IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR // BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // *************************************************************************** // *************************************************************************** From 0ccc546aeba24a756dc86528e4bae22e334d69ba Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 27 Nov 2014 14:01:36 +0200 Subject: [PATCH 14/24] ad9671_fmc: Fix GT lane number definition --- projects/ad9671_fmc/common/ad9671_fmc_bd.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl index 42b3bf3ac..7381ae131 100755 --- a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl +++ b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl @@ -39,7 +39,7 @@ set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9671_jesd set_property -dict [list CONFIG.C_LANES {2}] $axi_ad9671_jesd set axi_ad9671_gt [create_bd_cell -type ip -vlnv analog.com:user:axi_jesd_gt:1.0 axi_ad9671_gt] -set_property -dict [list CONFIG.PCORE_NUM_OF_LANES {2}] [get_bd_cells axi_ad9671_gt] +set_property -dict [list CONFIG.PCORE_NUM_OF_RX_LANES {2}] [get_bd_cells axi_ad9671_gt] set_property -dict [list CONFIG.PCORE_CPLL_FBDIV {4}] $axi_ad9671_gt set_property -dict [list CONFIG.PCORE_RX_OUT_DIV {1}] $axi_ad9671_gt set_property -dict [list CONFIG.PCORE_TX_OUT_DIV {1}] $axi_ad9671_gt From a576f7dc98e321331a3e5ea279fde6fec798d86a Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 27 Nov 2014 14:02:18 +0200 Subject: [PATCH 15/24] ad9671_zc706: Update interrupts --- projects/ad9671_fmc/common/ad9671_fmc_bd.tcl | 5 ++++- projects/ad9671_fmc/zc706/system_top.v | 16 ++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl index 7381ae131..d542e1db9 100755 --- a/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl +++ b/projects/ad9671_fmc/common/ad9671_fmc_bd.tcl @@ -28,6 +28,9 @@ set dma_wr [create_bd_port -dir I dma_wr] set dma_sync [create_bd_port -dir I dma_sync] set dma_data [create_bd_port -dir I -from 127 -to 0 dma_data] +# interrupts + +set ad9671_dma_irq [create_bd_port -dir O ad9671_dma_irq] # adc peripherals @@ -135,7 +138,7 @@ connect_bd_net -net axi_ad9671_core_adc_dwr [get_bd_ports dma_wr] connect_bd_net -net axi_ad9671_core_adc_dsync [get_bd_ports dma_sync] [get_bd_pins axi_ad9671_dma/fifo_wr_sync] connect_bd_net -net axi_ad9671_core_adc_ddata [get_bd_ports dma_data] [get_bd_pins axi_ad9671_dma/fifo_wr_din] connect_bd_net -net axi_ad9671_core_adc_dovf [get_bd_pins axi_ad9671_core/adc_dovf] [get_bd_pins axi_ad9671_dma/fifo_wr_overflow] -connect_bd_net -net axi_ad9671_dma_irq [get_bd_pins axi_ad9671_dma/irq] [get_bd_pins sys_concat_intc/In13] +connect_bd_net -net axi_ad9671_dma_irq [get_bd_pins axi_ad9671_dma/irq] [get_bd_ports ad9671_dma_irq] # interconnect (cpu) diff --git a/projects/ad9671_fmc/zc706/system_top.v b/projects/ad9671_fmc/zc706/system_top.v index 1ec0e5a38..02983d9dd 100644 --- a/projects/ad9671_fmc/zc706/system_top.v +++ b/projects/ad9671_fmc/zc706/system_top.v @@ -195,6 +195,7 @@ module system_top ( wire [ 7:0] adc_enable; wire [ 7:0] adc_valid; wire [127:0] adc_data; + wire [15:0] ps_intrs; assign ad9671_sof = |gt_rx_data_sof; @@ -301,6 +302,21 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .ps_intr_0 (ps_intrs[0]), + .ps_intr_1 (ps_intrs[1]), + .ps_intr_2 (ps_intrs[2]), + .ps_intr_3 (ps_intrs[3]), + .ps_intr_4 (ps_intrs[4]), + .ps_intr_5 (ps_intrs[5]), + .ps_intr_6 (ps_intrs[6]), + .ps_intr_7 (ps_intrs[7]), + .ps_intr_8 (ps_intrs[8]), + .ps_intr_9 (ps_intrs[9]), + .ps_intr_10 (ps_intrs[10]), + .ps_intr_11 (ps_intrs[11]), + .ps_intr_12 (ps_intrs[12]), + .ps_intr_13 (ps_intrs[13]), + .ad9671_dma_irq (ps_intrs[13]), .rx_data_n (rx_data_n), .rx_data_p (rx_data_p), .rx_ref_clk (rx_ref_clk), From eed1981edebb89b656fea23f2d657a27fa98c7f2 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 27 Nov 2014 14:03:10 +0200 Subject: [PATCH 16/24] usdrx1_fmc: Fix GT lane number definition. --- projects/usdrx1/common/usdrx1_bd.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/usdrx1/common/usdrx1_bd.tcl b/projects/usdrx1/common/usdrx1_bd.tcl index 3dceef010..38d3b8918 100644 --- a/projects/usdrx1/common/usdrx1_bd.tcl +++ b/projects/usdrx1/common/usdrx1_bd.tcl @@ -68,7 +68,7 @@ set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_usdrx1_jesd set_property -dict [list CONFIG.C_LANES {8}] $axi_usdrx1_jesd set axi_usdrx1_gt [create_bd_cell -type ip -vlnv analog.com:user:axi_jesd_gt:1.0 axi_usdrx1_gt] -set_property -dict [list CONFIG.PCORE_NUM_OF_LANES {8}] [get_bd_cells axi_usdrx1_gt] +set_property -dict [list CONFIG.PCORE_NUM_OF_RX_LANES {8}] [get_bd_cells axi_usdrx1_gt] set_property -dict [list CONFIG.PCORE_CPLL_FBDIV {4}] $axi_usdrx1_gt set_property -dict [list CONFIG.PCORE_RX_OUT_DIV {1}] $axi_usdrx1_gt set_property -dict [list CONFIG.PCORE_TX_OUT_DIV {1}] $axi_usdrx1_gt From d5a1df2fe659a4ab584e5e5506c0f0ef1cf2091a Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 27 Nov 2014 14:03:54 +0200 Subject: [PATCH 17/24] usdrx1_zc706: Update interrupts. --- projects/usdrx1/common/usdrx1_bd.tcl | 8 ++++++-- projects/usdrx1/zc706/system_top.v | 17 +++++++++++++++++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/projects/usdrx1/common/usdrx1_bd.tcl b/projects/usdrx1/common/usdrx1_bd.tcl index 38d3b8918..88b0de329 100644 --- a/projects/usdrx1/common/usdrx1_bd.tcl +++ b/projects/usdrx1/common/usdrx1_bd.tcl @@ -45,6 +45,10 @@ set adc_data [create_bd_port -dir I -from 511 -to 0 adc_data] set adc_wr_en [create_bd_port -dir I adc_wr_en] set adc_dovf [create_bd_port -dir O adc_dovf] +# interrupts +set usdrx1_dma_irq [create_bd_port -dir O usdrx1_dma_irq] +set usdrx1_spi_irq [create_bd_port -dir O usdrx1_spi_irq] + # adc peripherals set axi_ad9671_core_0 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9671:1.0 axi_ad9671_core_0] @@ -132,7 +136,7 @@ connect_bd_net -net axi_spi_1_sdo_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_u connect_bd_net -net axi_spi_1_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_usdrx1_spi/io1_i] connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_spi/ext_spi_clk] -connect_bd_net -net axi_spi_1_irq [get_bd_pins axi_usdrx1_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In12] +connect_bd_net -net axi_spi_1_irq [get_bd_pins axi_usdrx1_spi/ip2intc_irpt] [get_bd_ports usdrx1_spi_irq] # connections (gt) @@ -193,7 +197,7 @@ connect_bd_net -net axi_ad9671_core_adc_dovf_3 [get_bd_pins axi_ad9671_core connect_bd_net -net axi_ad9671_dma_wr_en [get_bd_pins axi_usdrx1_dma/fifo_wr_en] [get_bd_ports adc_wr_en] connect_bd_net -net axi_ad9671_dma_adc_data [get_bd_pins axi_usdrx1_dma/fifo_wr_din] [get_bd_ports adc_data] connect_bd_net -net axi_ad9671_dma_adc_dovf [get_bd_pins axi_usdrx1_dma/fifo_wr_overflow] [get_bd_ports adc_dovf] -connect_bd_net -net axi_usdrx1_dma_irq [get_bd_pins axi_usdrx1_dma/irq] [get_bd_pins sys_concat_intc/In13] +connect_bd_net -net axi_usdrx1_dma_irq [get_bd_pins axi_usdrx1_dma/irq] [get_bd_ports usdrx1_dma_irq] connect_bd_net -net axi_ad9671_adc_raddr [get_bd_pins axi_ad9671_core_0/adc_raddr_out] connect_bd_net -net axi_ad9671_adc_raddr [get_bd_pins axi_ad9671_core_1/adc_raddr_in] connect_bd_net -net axi_ad9671_adc_raddr [get_bd_pins axi_ad9671_core_2/adc_raddr_in] diff --git a/projects/usdrx1/zc706/system_top.v b/projects/usdrx1/zc706/system_top.v index 84a2dea72..662b2bfae 100644 --- a/projects/usdrx1/zc706/system_top.v +++ b/projects/usdrx1/zc706/system_top.v @@ -238,6 +238,7 @@ module system_top ( wire [58:0] gpio_i; wire [58:0] gpio_o; wire [58:0] gpio_t; + wire [15:0] ps_intrs; // spi assignments @@ -419,6 +420,22 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .ps_intr_0 (ps_intrs[0]), + .ps_intr_1 (ps_intrs[1]), + .ps_intr_2 (ps_intrs[2]), + .ps_intr_3 (ps_intrs[3]), + .ps_intr_4 (ps_intrs[4]), + .ps_intr_5 (ps_intrs[5]), + .ps_intr_6 (ps_intrs[6]), + .ps_intr_7 (ps_intrs[7]), + .ps_intr_8 (ps_intrs[8]), + .ps_intr_9 (ps_intrs[9]), + .ps_intr_10 (ps_intrs[10]), + .ps_intr_11 (ps_intrs[11]), + .ps_intr_12 (ps_intrs[12]), + .ps_intr_13 (ps_intrs[13]), + .usdrx1_dma_irq (ps_intrs[13]), + .usdrx1_spi_irq (ps_intrs[12]), .rx_data_n (rx_data_n), .rx_data_p (rx_data_p), .rx_ref_clk (rx_ref_clk), From d5422c2ecc3d4c4ff3cd30f215c0752e8c30ed82 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Fri, 28 Nov 2014 14:17:09 +0200 Subject: [PATCH 18/24] fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections --- projects/fmcomms2/zed/system_top.v | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/projects/fmcomms2/zed/system_top.v b/projects/fmcomms2/zed/system_top.v index 51411a1b3..1f08eb0bb 100644 --- a/projects/fmcomms2/zed/system_top.v +++ b/projects/fmcomms2/zed/system_top.v @@ -225,14 +225,14 @@ module system_top ( ad_iobuf #(.DATA_WIDTH(2)) i_iobuf_iic_scl ( .dt ({iic_mux_scl_t_s,iic_mux_scl_t_s}), - .di (iic_mux_scl_i_s), - .do (iic_mux_scl_o_s), + .di (iic_mux_scl_o_s), + .do (iic_mux_scl_i_s), .dio(iic_mux_scl)); ad_iobuf #(.DATA_WIDTH(2)) i_iobuf_iic_sda ( .dt ({iic_mux_sda_t_s,iic_mux_sda_t_s}), - .di (iic_mux_sda_i_s), - .do (iic_mux_sda_o_s), + .di (iic_mux_sda_o_s), + .do (iic_mux_sda_i_s), .dio(iic_mux_sda)); system_wrapper i_system_wrapper ( From 6197563506bcc9e0878fc783ded019fcaba7e92d Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 1 Dec 2014 13:05:58 +0100 Subject: [PATCH 19/24] up_axi: Fix up_raddr/up_waddr port width Make sure that the port declaration width matches with the reg declaration later on. Signed-off-by: Lars-Peter Clausen --- library/common/up_axi.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/library/common/up_axi.v b/library/common/up_axi.v index e06c47e2b..b2a12bf9a 100644 --- a/library/common/up_axi.v +++ b/library/common/up_axi.v @@ -110,11 +110,11 @@ module up_axi ( // pcore interface output up_wreq; - output [13:0] up_waddr; + output [AW:0] up_waddr; output [31:0] up_wdata; input up_wack; output up_rreq; - output [13:0] up_raddr; + output [AW:0] up_raddr; input [31:0] up_rdata; input up_rack; From 5b68b79dec1f72ff9a370993d3a0c3163f086603 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 1 Dec 2014 13:07:25 +0100 Subject: [PATCH 20/24] ad9467_fmc: Set ila type to native With version 4.0 ila defaults to the AXI monitor type, so explicitly configure it for native. Signed-off-by: Lars-Peter Clausen --- projects/ad9467_fmc/common/ad9467_bd.tcl | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/ad9467_fmc/common/ad9467_bd.tcl b/projects/ad9467_fmc/common/ad9467_bd.tcl index b00d6705a..7a04f1008 100644 --- a/projects/ad9467_fmc/common/ad9467_bd.tcl +++ b/projects/ad9467_fmc/common/ad9467_bd.tcl @@ -199,6 +199,7 @@ if {$sys_zynq == 0} { set_property -dict [list CONFIG.Reset_Pin {false}] $ila_fifo set ila_ad9467_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_ad9467_mon] + set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_ad9467_mon set_property -dict [list CONFIG.C_NUM_OF_PROBES {1}] $ila_ad9467_mon set_property -dict [list CONFIG.C_PROBE0_WIDTH {32}] $ila_ad9467_mon From 45fc7bb7e2e21f626d762a50c547df21d9dc9eda Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 1 Dec 2014 13:06:58 +0100 Subject: [PATCH 21/24] fmcomms6: Set ila type to native With version 4.0 ila defaults to the AXI monitor type, so explicitly configure it for native. Signed-off-by: Lars-Peter Clausen --- projects/fmcomms6/common/fmcomms6_bd.tcl | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/fmcomms6/common/fmcomms6_bd.tcl b/projects/fmcomms6/common/fmcomms6_bd.tcl index 79c561f97..f90bd33f0 100644 --- a/projects/fmcomms6/common/fmcomms6_bd.tcl +++ b/projects/fmcomms6/common/fmcomms6_bd.tcl @@ -234,6 +234,7 @@ if {$sys_zynq == 0} { # ila (adc) set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_adc] +set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc From 95e113e1a31971e17c9a158343b74c757e2afd60 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 1 Dec 2014 13:08:29 +0100 Subject: [PATCH 22/24] fmcomms6: Connect DMA directly to the HP port The axi_dmac supports native AXI3, there is no need to add a interconnect for protocol conversion between it and the HP port. Signed-off-by: Lars-Peter Clausen --- projects/fmcomms6/common/fmcomms6_bd.tcl | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/projects/fmcomms6/common/fmcomms6_bd.tcl b/projects/fmcomms6/common/fmcomms6_bd.tcl index f90bd33f0..e4c88d03a 100644 --- a/projects/fmcomms6/common/fmcomms6_bd.tcl +++ b/projects/fmcomms6/common/fmcomms6_bd.tcl @@ -66,11 +66,6 @@ set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_ad9652_dma set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_ad9652_dma set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9652_dma -if {$sys_zynq == 1} { - set axi_ad9652_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9652_dma_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9652_dma_interconnect -} - if {$sys_zynq == 0} { set axi_fmcomms6_gpio [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_fmcomms6_gpio] @@ -204,6 +199,7 @@ if {$sys_zynq == 0} { if {$sys_zynq == 1} { set sys_fmc_dma_clk_source [get_bd_pins sys_ps7/FCLK_CLK2] connect_bd_net -net sys_fmc_dma_clk $sys_fmc_dma_clk_source + set_property -dict [list CONFIG.C_DMA_AXI_PROTOCOL_DEST {1}] $axi_ad9652_dma } # interconnect (mem/adc) @@ -218,16 +214,9 @@ if {$sys_zynq == 0} { } else { - connect_bd_intf_net -intf_net axi_ad9652_dma_interconnect_s00_axi [get_bd_intf_pins axi_ad9652_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9652_dma/m_dest_axi] - connect_bd_intf_net -intf_net axi_ad9652_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9652_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source - connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source + connect_bd_intf_net -intf_net axi_ad9652_dma_axi [get_bd_intf_pins axi_ad9652_dma/m_dest_axi] [get_bd_intf_pins sys_ps7/S_AXI_HP1] connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_ad9652_dma/m_dest_axi_aclk] connect_bd_net -net sys_fmc_dma_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9652_dma/m_dest_axi_aresetn] } From f01d1aae2d6fe019ceb8149daf3f527be54770fe Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Tue, 2 Dec 2014 10:38:44 -0500 Subject: [PATCH 23/24] fmcomms7: compilation fixes on plddr3 --- projects/fmcomms7/common/fmcomms7_bd.tcl | 34 ++---------------------- 1 file changed, 2 insertions(+), 32 deletions(-) diff --git a/projects/fmcomms7/common/fmcomms7_bd.tcl b/projects/fmcomms7/common/fmcomms7_bd.tcl index 11859111c..fde2b5d42 100644 --- a/projects/fmcomms7/common/fmcomms7_bd.tcl +++ b/projects/fmcomms7/common/fmcomms7_bd.tcl @@ -77,12 +77,6 @@ if {$sys_zynq == 0} { set adc_dsync [create_bd_port -dir I adc_dsync] set adc_ddata [create_bd_port -dir I -from 127 -to 0 adc_ddata] -if {$sys_zynq == 1} { - - set DDR3 [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR3] - set sys_clk [create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 sys_clk] -} - set axi_ad9144_dma_intr [create_bd_port -dir O axi_ad9144_dma_intr] set axi_ad9680_dma_intr [create_bd_port -dir O axi_ad9680_dma_intr] set axi_fmcomms7_spi_intr [create_bd_port -dir O axi_fmcomms7_spi_intr ] @@ -139,15 +133,6 @@ if {$sys_zynq == 1} { set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $axi_ad9680_dma set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9680_dma -if {$sys_zynq == 1} { - - p_plddr3_fifo [current_bd_instance .] axi_ad9680_fifo 128 - -} else { - - p_sys_dmafifo [current_bd_instance .] axi_ad9680_fifo 128 -} - if {$sys_zynq == 1} { set axi_ad9680_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9680_dma_interconnect] @@ -157,7 +142,7 @@ if {$sys_zynq == 1} { # dac/adc common gt/gpio set axi_fmcomms7_gt [create_bd_cell -type ip -vlnv analog.com:user:axi_jesd_gt:1.0 axi_fmcomms7_gt] - set_property -dict [list CONFIG.PCORE_NUM_OF_LANES {8}] $axi_fmcomms7_gt + set_property -dict [list CONFIG.PCORE_NUM_OF_TX_LANES {8}] $axi_fmcomms7_gt set_property -dict [list CONFIG.PCORE_NUM_OF_RX_LANES {4}] $axi_fmcomms7_gt set_property -dict [list CONFIG.PCORE_TX_LANE_SEL_0 {0}] $axi_fmcomms7_gt set_property -dict [list CONFIG.PCORE_TX_LANE_SEL_1 {3}] $axi_fmcomms7_gt @@ -228,14 +213,6 @@ if {$sys_zynq == 1} { set_property LEFT 63 [get_bd_ports GPIO_T] } - # connections (pl ddr3) - -if {$sys_zynq == 1} { - - connect_bd_intf_net -intf_net DDR3 [get_bd_intf_ports DDR3] [get_bd_intf_pins axi_ad9680_fifo/DDR3] - connect_bd_intf_net -intf_net sys_clk [get_bd_intf_ports sys_clk] [get_bd_intf_pins axi_ad9680_fifo/sys_clk] -} - # connections (spi and gpio) if {$sys_zynq == 0} { @@ -345,8 +322,8 @@ if {$sys_zynq == 0} { connect_bd_net -net axi_fmcomms7_gt_rx_ip_sof [get_bd_pins axi_fmcomms7_gt/rx_ip_sof] [get_bd_pins axi_ad9680_jesd/rx_start_of_frame] connect_bd_net -net axi_fmcomms7_gt_rx_ip_data [get_bd_pins axi_fmcomms7_gt/rx_ip_data] [get_bd_pins axi_ad9680_jesd/rx_tdata] connect_bd_net -net axi_fmcomms7_gt_rx_data [get_bd_pins axi_fmcomms7_gt/rx_data] [get_bd_pins axi_ad9680_core/rx_data] + connect_bd_net -net axi_fmcomms7_gt_rx_rst [get_bd_pins axi_ad9680_fifo/adc_rst] [get_bd_pins axi_fmcomms7_gt/rx_rst] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9680_fifo/dma_rstn] $sys_100m_resetn_source connect_bd_net -net axi_ad9680_adc_clk [get_bd_pins axi_ad9680_core/adc_clk] [get_bd_pins axi_ad9680_fifo/adc_clk] connect_bd_net -net axi_ad9680_adc_dovf [get_bd_pins axi_ad9680_core/adc_dovf] [get_bd_pins axi_ad9680_fifo/adc_wovf] connect_bd_net -net axi_ad9680_adc_enable_0 [get_bd_pins axi_ad9680_core/adc_enable_0] [get_bd_ports adc_enable_0] @@ -369,11 +346,6 @@ if {$sys_zynq == 0} { connect_bd_net -net axi_ad9144_dac_clk [get_bd_ports dac_clk] connect_bd_net -net axi_ad9680_adc_clk [get_bd_ports adc_clk] -if {$sys_zynq == 0} { - - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9680_fifo/axi_clk] $sys_200m_clk_source -} - # interconnect (cpu) connect_bd_intf_net -intf_net axi_cpu_interconnect_m07_axi [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins axi_ad9144_dma/s_axi] @@ -551,7 +523,5 @@ if {$sys_zynq == 0} { create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9144_dma/m_src_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9680_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_fmcomms7_gt/m_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP3/HP3_DDR_LOWOCM] SEG_sys_ps7_hp3_ddr_lowocm - - create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces axi_ad9680_fifo/axi_fifo2s/axi] [get_bd_addr_segs axi_ad9680_fifo/axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl_memaddr } From 805d52346cbc9535d09af35a668f3f8f196ad94e Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Tue, 2 Dec 2014 10:39:01 -0500 Subject: [PATCH 24/24] fmcomms7: compilation fixes on plddr3 --- projects/fmcomms7/zc706/system_bd.tcl | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/projects/fmcomms7/zc706/system_bd.tcl b/projects/fmcomms7/zc706/system_bd.tcl index 34795d15a..a4bf1b618 100644 --- a/projects/fmcomms7/zc706/system_bd.tcl +++ b/projects/fmcomms7/zc706/system_bd.tcl @@ -1,5 +1,15 @@ source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl source $ad_hdl_dir/projects/common/zc706/zc706_system_plddr3.tcl + +p_plddr3_fifo [current_bd_instance .] axi_ad9680_fifo 128 + +create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR3 +create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 sys_clk +connect_bd_intf_net -intf_net DDR3 [get_bd_intf_ports DDR3] [get_bd_intf_pins axi_ad9680_fifo/DDR3] +connect_bd_intf_net -intf_net sys_clk [get_bd_intf_ports sys_clk] [get_bd_intf_pins axi_ad9680_fifo/sys_clk] +create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces axi_ad9680_fifo/axi_fifo2s/axi] \ + [get_bd_addr_segs axi_ad9680_fifo/axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl_memaddr + source ../common/fmcomms7_bd.tcl