zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ad9625_fmc/zc706: ps7 interrupt updates

main
Rejeesh Kutty 2014-10-29 12:13:44 -04:00
parent f83622a2e6
commit 2e01ad2eec
2 changed files with 35 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
projects/ad9625_fmc/zc706/system_top.v
View File

@ -200,6 +200,7 @@ module system_top (
wire spi_clk;
wire spi_miso;
wire spi_mosi;
wire [15:0] ps_intrs;
// instantiations
@ -280,8 +281,9 @@ module system_top (
.GPIO_I (gpio_i),
.GPIO_O (gpio_o),
.GPIO_T (gpio_t),
.sys_clk_clk_n (sys_clk_n),
.sys_clk_clk_p (sys_clk_p),
.ad9625_dma_intr (ps_intrs[13]),
.ad9625_gpio_intr (),
.ad9625_spi_intr (),
.hdmi_data (hdmi_data),
.hdmi_data_e (hdmi_data_e),
.hdmi_hsync (hdmi_hsync),
@ -289,6 +291,20 @@ module system_top (
.hdmi_vsync (hdmi_vsync),
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.ps_intr_0 (ps_intrs[0]),
.ps_intr_1 (ps_intrs[1]),
.ps_intr_10 (ps_intrs[10]),
.ps_intr_11 (ps_intrs[11]),
.ps_intr_12 (ps_intrs[12]),
.ps_intr_13 (ps_intrs[13]),
.ps_intr_2 (ps_intrs[2]),
.ps_intr_3 (ps_intrs[3]),
.ps_intr_4 (ps_intrs[4]),
.ps_intr_5 (ps_intrs[5]),
.ps_intr_6 (ps_intrs[6]),
.ps_intr_7 (ps_intrs[7]),
.ps_intr_8 (ps_intrs[8]),
.ps_intr_9 (ps_intrs[9]),
.rx_data_n (rx_data_n),
.rx_data_p (rx_data_p),
.rx_ref_clk (rx_ref_clk),
@ -302,7 +318,9 @@ module system_top (
.spi_csn_1_o (spi_clk_csn),
.spi_sdi_i (spi_miso),
.spi_sdo_i (1'b0),
.spi_sdo_o (spi_mosi));
.spi_sdo_o (spi_mosi),
.sys_clk_clk_n (sys_clk_n),
.sys_clk_clk_p (sys_clk_p));
endmodule

26
projects/common/zc706/zc706_system_bd.tcl
View File

@ -22,12 +22,6 @@ set hdmi_data [create_bd_port -dir O -from 23 -to 0 hdmi_data]
set spdif [create_bd_port -dir O spdif]
# interrupts
set iic_irq [create_bd_port -dir O iic_irq]
set hdmi_dma_irq [create_bd_port -dir O hdmi_dma_irq]
set ps7_irq_f2p [create_bd_port -dir I -from 15 -to 0 -type intr ps7_irq_f2p]
# instance: sys_ps7
set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.4 sys_ps7]
@ -48,6 +42,9 @@ set_property -dict [list CONFIG.PCW_IRQ_F2P_MODE {REVERSE}] $sys_ps7
set axi_iic_main [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.0 axi_iic_main]
set_property -dict [list CONFIG.USE_BOARD_FLOW {true} CONFIG.IIC_BOARD_INTERFACE {IIC_MAIN}] $axi_iic_main
set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc]
set_property -dict [list CONFIG.NUM_PORTS {16}] $sys_concat_intc
set axi_cpu_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_interconnect]
set_property -dict [list CONFIG.NUM_MI {7}] $axi_cpu_interconnect
set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_interconnect
@ -118,7 +115,6 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M00_ACLK] $sy
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M00_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_iic_main/s_axi_aclk]
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_iic_main/s_axi_aresetn]
connect_bd_net -net iic_irq_net [get_bd_pins axi_iic_main/iic2intc_irpt] [get_bd_ports iic_irq]
# hdmi
@ -171,11 +167,6 @@ connect_bd_net -net axi_hdmi_tx_core_mm2s_tready [get_bd_pins axi_hdmi_core/m_
connect_bd_net -net axi_hdmi_tx_core_mm2s_fsync [get_bd_pins axi_hdmi_core/m_axis_mm2s_fsync] [get_bd_pins axi_hdmi_dma/mm2s_fsync]
connect_bd_net -net axi_hdmi_tx_core_mm2s_fsync [get_bd_pins axi_hdmi_core/m_axis_mm2s_fsync_ret]
connect_bd_net -net hdmi_dma_irq_net [get_bd_pins axi_hdmi_dma/mm2s_introut] [get_bd_ports hdmi_dma_irq]
connect_bd_net -net sys_ps7_interrupt [get_bd_pins sys_ps7/IRQ_F2P] [get_bd_ports ps7_irq_f2p]
set_property -dict [list CONFIG.PortWidth {16}] [get_bd_ports ps7_irq_f2p]
# spdif audio
connect_bd_intf_net -intf_net axi_cpu_interconnect_m04_axi [get_bd_intf_pins axi_cpu_interconnect/M04_AXI] [get_bd_intf_pins axi_spdif_tx_core/s_axi]
@ -202,6 +193,17 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M05_ARESET
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M06_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M06_ARESETN] $sys_100m_resetn_source
# interrupts
connect_bd_net [get_bd_pins sys_concat_intc/dout] [get_bd_pins sys_ps7/IRQ_F2P]
connect_bd_net [get_bd_pins sys_concat_intc/In15] [get_bd_pins axi_hdmi_dma/mm2s_introut]
connect_bd_net [get_bd_pins sys_concat_intc/In14] [get_bd_pins axi_iic_main/iic2intc_irpt]
for {set intc_index 0} {$intc_index < 14} {incr intc_index} {
set ps_intr_${intc_index} [create_bd_port -dir I ps_intr_${intc_index}]
connect_bd_net [get_bd_pins sys_concat_intc/In${intc_index}] [get_bd_ports ps_intr_${intc_index}]
}
# address map
set sys_zynq 1