From 27bb69b44c02ccf907bdc83749845cf11fe87940 Mon Sep 17 00:00:00 2001 From: Iulia Moldovan Date: Mon, 10 Jul 2023 11:36:06 +0300 Subject: [PATCH] Add copyright and license to .sdc files Signed-off-by: Iulia Moldovan --- library/axi_ad9122/axi_ad9122_constr.sdc | 4 +++ library/axi_ad9361/axi_ad9361_constr.sdc | 4 +++ library/axi_ad9684/axi_ad9684_constr.sdc | 4 +++ library/axi_adrv9001/axi_adrv9001_constr.sdc | 5 +++ library/axi_dmac/axi_dmac_constr.sdc | 5 ++- library/axi_hdmi_tx/axi_hdmi_tx_constr.sdc | 4 +++ .../axi_laser_driver_constr.sdc | 4 +++ .../axi_pulse_gen/axi_pulse_gen_constr.sdc | 4 +++ library/axi_pwm_gen/axi_pwm_gen_constr.sdc | 5 +++ library/axi_tdd/axi_tdd_constr.sdc | 5 +++ .../intel/avl_dacfifo/avl_dacfifo_constr.sdc | 5 +++ library/intel/common/up_clock_mon_constr.sdc | 4 +++ library/intel/common/up_rst_constr.sdc | 4 +++ library/intel/common/up_xfer_cntrl_constr.sdc | 4 +++ .../intel/common/up_xfer_status_constr.sdc | 4 +++ .../axi_spi_engine/axi_spi_engine_constr.sdc | 4 +++ library/util_adcfifo/util_adcfifo_constr.sdc | 4 +++ library/util_dacfifo/util_dacfifo_constr.sdc | 4 +++ library/util_rfifo/util_rfifo_constr.sdc | 4 +++ library/util_wfifo/util_wfifo_constr.sdc | 4 +++ .../ad777x_ardz/de10nano/system_constr.sdc | 5 +++ .../ad9081_fmca_ebz/a10soc/system_constr.sdc | 4 +++ projects/ad9083_evb/a10soc/system_constr.sdc | 4 +++ .../ad9213_dual_ebz/s10soc/system_constr.sdc | 4 +++ .../ad_fmclidar1_ebz/a10soc/system_constr.sdc | 4 +++ projects/adrv9001/a10soc/system_constr.sdc | 4 +++ projects/adrv9009/a10soc/system_constr.sdc | 4 +++ projects/adrv9009/s10soc/system_constr.sdc | 4 +++ projects/adrv9371x/a10soc/system_constr.sdc | 4 +++ projects/adv7513/de10nano/system_constr.sdc | 4 +++ projects/arradio/c5soc/system_constr.sdc | 4 +++ projects/cn0506/a10soc/system_constr.sdc | 4 +++ projects/cn0540/de10nano/system_constr.sdc | 4 +++ projects/cn0561/de10nano/system_constr.sdc | 5 +++ projects/cn0579/de10nano/system_constr.sdc | 5 +++ projects/common/a10gx/system_constr.sdc | 5 +++ projects/common/a10soc/system_constr.sdc | 5 +++ projects/common/c5soc/system_constr.sdc | 5 +++ projects/common/de10nano/system_constr.sdc | 5 +++ projects/common/s10soc/system_constr.sdc | 5 +++ projects/dac_fmc_ebz/a10soc/system_constr.sdc | 35 +++---------------- projects/daq2/a10soc/system_constr.sdc | 4 +++ projects/fmcomms8/a10soc/system_constr.sdc | 4 +++ 43 files changed, 184 insertions(+), 32 deletions(-) diff --git a/library/axi_ad9122/axi_ad9122_constr.sdc b/library/axi_ad9122/axi_ad9122_constr.sdc index b562156b6..bd13d026c 100644 --- a/library/axi_ad9122/axi_ad9122_constr.sdc +++ b/library/axi_ad9122/axi_ad9122_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *up_drp_locked*] -to [get_registers *dac_status_m1*] diff --git a/library/axi_ad9361/axi_ad9361_constr.sdc b/library/axi_ad9361/axi_ad9361_constr.sdc index 5c47199cc..ab4a1b5d9 100644 --- a/library/axi_ad9361/axi_ad9361_constr.sdc +++ b/library/axi_ad9361/axi_ad9361_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *i_dev_if|up_enable_int*] -to [get_registers *i_dev_if|enable_up_m1*] set_false_path -from [get_registers *i_dev_if|up_txnrx_int*] -to [get_registers *i_dev_if|txnrx_up_m1*] diff --git a/library/axi_ad9684/axi_ad9684_constr.sdc b/library/axi_ad9684/axi_ad9684_constr.sdc index e443fb6b5..9c2371905 100644 --- a/library/axi_ad9684/axi_ad9684_constr.sdc +++ b/library/axi_ad9684/axi_ad9684_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_registers *axi_ad9684_if:i_ad9684_if|adc_status_m1*] set_false_path -to [get_registers *up_delay_cntrl:i_delay_cntrl|up_dlocked_m1*] diff --git a/library/axi_adrv9001/axi_adrv9001_constr.sdc b/library/axi_adrv9001/axi_adrv9001_constr.sdc index 9fe867a68..aad834642 100644 --- a/library/axi_adrv9001/axi_adrv9001_constr.sdc +++ b/library/axi_adrv9001/axi_adrv9001_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + set script_dir [file dirname [info script]] source "$script_dir/util_cdc_constr.tcl" diff --git a/library/axi_dmac/axi_dmac_constr.sdc b/library/axi_dmac/axi_dmac_constr.sdc index 2e4829794..2f119333b 100644 --- a/library/axi_dmac/axi_dmac_constr.sdc +++ b/library/axi_dmac/axi_dmac_constr.sdc @@ -1,4 +1,7 @@ - +############################################################################### +## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_registers *axi_dmac*cdc_sync_stage1*] set_false_path -from [get_registers *axi_dmac*cdc_sync_fifo_ram*] diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_constr.sdc b/library/axi_hdmi_tx/axi_hdmi_tx_constr.sdc index 46ade77d3..81d58953a 100644 --- a/library/axi_hdmi_tx/axi_hdmi_tx_constr.sdc +++ b/library/axi_hdmi_tx/axi_hdmi_tx_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *hdmi_fs_toggle*] -to [get_registers *vdma_fs_toggle_m1] set_false_path -from [get_registers *hdmi_raddr_g*] -to [get_registers *vdma_raddr_g_m1*] diff --git a/library/axi_laser_driver/axi_laser_driver_constr.sdc b/library/axi_laser_driver/axi_laser_driver_constr.sdc index 42607a05d..1ae5b3c06 100644 --- a/library/axi_laser_driver/axi_laser_driver_constr.sdc +++ b/library/axi_laser_driver/axi_laser_driver_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path \ -to [get_registers *i_driver_otw_sync|cdc_sync_stage1*] diff --git a/library/axi_pulse_gen/axi_pulse_gen_constr.sdc b/library/axi_pulse_gen/axi_pulse_gen_constr.sdc index 46fe754d2..ed14b00f3 100644 --- a/library/axi_pulse_gen/axi_pulse_gen_constr.sdc +++ b/library/axi_pulse_gen/axi_pulse_gen_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_registers *axi_pulse_gen_regmap*cdc_sync_stage1*] set_false_path -to [get_registers *axi_pulse_gen_regmap*sync_data*out_data*] diff --git a/library/axi_pwm_gen/axi_pwm_gen_constr.sdc b/library/axi_pwm_gen/axi_pwm_gen_constr.sdc index 9d8b6bf6f..38d4230bc 100644 --- a/library/axi_pwm_gen/axi_pwm_gen_constr.sdc +++ b/library/axi_pwm_gen/axi_pwm_gen_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + set script_dir [file dirname [info script]] source "$script_dir/util_cdc_constr.tcl" diff --git a/library/axi_tdd/axi_tdd_constr.sdc b/library/axi_tdd/axi_tdd_constr.sdc index 6796e7358..7f076d207 100644 --- a/library/axi_tdd/axi_tdd_constr.sdc +++ b/library/axi_tdd/axi_tdd_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + set_false_path \ -from [get_registers {*|i_regmap|up_tdd_burst_count[*]}] \ -to [get_registers {*|i_counter|tdd_burst_count[*]}] diff --git a/library/intel/avl_dacfifo/avl_dacfifo_constr.sdc b/library/intel/avl_dacfifo/avl_dacfifo_constr.sdc index 2fa1986e9..9b835f54a 100644 --- a/library/intel/avl_dacfifo/avl_dacfifo_constr.sdc +++ b/library/intel/avl_dacfifo/avl_dacfifo_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + # CDC paths set_false_path -from [get_registers *avl_dacfifo_rd:i_rd|dac_mem_raddr_g*] \ diff --git a/library/intel/common/up_clock_mon_constr.sdc b/library/intel/common/up_clock_mon_constr.sdc index 4136940c3..2b5666673 100644 --- a/library/intel/common/up_clock_mon_constr.sdc +++ b/library/intel/common/up_clock_mon_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *up_clock_mon:*|d_count_run_m3*] -to [get_registers *up_clock_mon:*|up_count_running_m1*] set_false_path -from [get_registers *up_clock_mon:*|up_count_run*] -to [get_registers *up_clock_mon:*|d_count_run_m1*] diff --git a/library/intel/common/up_rst_constr.sdc b/library/intel/common/up_rst_constr.sdc index 95fe2ad9d..f81025296 100644 --- a/library/intel/common/up_rst_constr.sdc +++ b/library/intel/common/up_rst_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_pins -hierarchical -nocase rst_async_d*|CLRN] set_false_path -to [get_pins -hierarchical -nocase rst_sync|CLRN] diff --git a/library/intel/common/up_xfer_cntrl_constr.sdc b/library/intel/common/up_xfer_cntrl_constr.sdc index 0b4c0ba7b..af786b0fb 100644 --- a/library/intel/common/up_xfer_cntrl_constr.sdc +++ b/library/intel/common/up_xfer_cntrl_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *up_xfer_cntrl:i_xfer_cntrl|d_xfer_toggle*] -to [get_registers *up_xfer_cntrl:i_xfer_cntrl|up_xfer_state_m1*] set_false_path -from [get_registers *up_xfer_cntrl:i_xfer_cntrl|up_xfer_toggle*] -to [get_registers *up_xfer_cntrl:i_xfer_cntrl|d_xfer_toggle_m1*] diff --git a/library/intel/common/up_xfer_status_constr.sdc b/library/intel/common/up_xfer_status_constr.sdc index 432525b08..b48e615af 100644 --- a/library/intel/common/up_xfer_status_constr.sdc +++ b/library/intel/common/up_xfer_status_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *up_xfer_status:i_xfer_status|up_xfer_toggle*] -to [get_registers *up_xfer_status:i_xfer_status|d_xfer_state_m1*] set_false_path -from [get_registers *up_xfer_status:i_xfer_status|d_xfer_toggle*] -to [get_registers *up_xfer_status:i_xfer_status|up_xfer_toggle_m1*] diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine_constr.sdc b/library/spi_engine/axi_spi_engine/axi_spi_engine_constr.sdc index 4b8505f98..a8fc8c6af 100644 --- a/library/spi_engine/axi_spi_engine/axi_spi_engine_constr.sdc +++ b/library/spi_engine/axi_spi_engine/axi_spi_engine_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path \ -to [get_registers *cdc_sync_stage1*] diff --git a/library/util_adcfifo/util_adcfifo_constr.sdc b/library/util_adcfifo/util_adcfifo_constr.sdc index 821e5c7ce..ff2223032 100644 --- a/library/util_adcfifo/util_adcfifo_constr.sdc +++ b/library/util_adcfifo/util_adcfifo_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_registers *adc_xfer_req_m_reg[0]*] set_false_path -to [get_registers *adc_xfer_req_m[0]*] diff --git a/library/util_dacfifo/util_dacfifo_constr.sdc b/library/util_dacfifo/util_dacfifo_constr.sdc index 8f976fdff..e0c34f421 100644 --- a/library/util_dacfifo/util_dacfifo_constr.sdc +++ b/library/util_dacfifo/util_dacfifo_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -to [get_registers *dac_bypass_m1*] set_false_path -to [get_registers *dma_bypass_m1*] diff --git a/library/util_rfifo/util_rfifo_constr.sdc b/library/util_rfifo/util_rfifo_constr.sdc index 08c7ec480..37d5d0f79 100644 --- a/library/util_rfifo/util_rfifo_constr.sdc +++ b/library/util_rfifo/util_rfifo_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *dout_enable*] -to [get_registers *din_enable_m1*] set_false_path -from [get_registers *dout_req_t*] -to [get_registers *din_req_t_m1*] diff --git a/library/util_wfifo/util_wfifo_constr.sdc b/library/util_wfifo/util_wfifo_constr.sdc index b3226e083..08918cfe5 100644 --- a/library/util_wfifo/util_wfifo_constr.sdc +++ b/library/util_wfifo/util_wfifo_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### set_false_path -from [get_registers *din_enable*] -to [get_registers *dout_enable_m1*] set_false_path -from [get_registers *din_req_t*] -to [get_registers *dout_req_t_m1*] diff --git a/projects/ad777x_ardz/de10nano/system_constr.sdc b/projects/ad777x_ardz/de10nano/system_constr.sdc index 3b205e9f6..c3c06f837 100644 --- a/projects/ad777x_ardz/de10nano/system_constr.sdc +++ b/projects/ad777x_ardz/de10nano/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb1_clk [get_ports {usb1_clk}] create_clock -period "488.00 ns" -name adc_clk [get_ports {adc_clk_in}] diff --git a/projects/ad9081_fmca_ebz/a10soc/system_constr.sdc b/projects/ad9081_fmca_ebz/a10soc/system_constr.sdc index 768890a56..712c83fdf 100755 --- a/projects/ad9081_fmca_ebz/a10soc/system_constr.sdc +++ b/projects/ad9081_fmca_ebz/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "4.000 ns" -name ref_clk [get_ports {fpga_refclk_in}] diff --git a/projects/ad9083_evb/a10soc/system_constr.sdc b/projects/ad9083_evb/a10soc/system_constr.sdc index 433dfe927..22e4abedb 100644 --- a/projects/ad9083_evb/a10soc/system_constr.sdc +++ b/projects/ad9083_evb/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "8.000 ns" -name rx_device_clk [get_ports {rx_device_clk}] diff --git a/projects/ad9213_dual_ebz/s10soc/system_constr.sdc b/projects/ad9213_dual_ebz/s10soc/system_constr.sdc index 06ce98b2f..7ecb0eda5 100755 --- a/projects/ad9213_dual_ebz/s10soc/system_constr.sdc +++ b/projects/ad9213_dual_ebz/s10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "3.2 ns" -name ref_a_clk0 [get_ports {rx_ref_a_clk0}] diff --git a/projects/ad_fmclidar1_ebz/a10soc/system_constr.sdc b/projects/ad_fmclidar1_ebz/a10soc/system_constr.sdc index 9be792097..53ab0f993 100644 --- a/projects/ad_fmclidar1_ebz/a10soc/system_constr.sdc +++ b/projects/ad_fmclidar1_ebz/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "4.000 ns" -name rx_device_clk [get_ports {rx_device_clk}] diff --git a/projects/adrv9001/a10soc/system_constr.sdc b/projects/adrv9001/a10soc/system_constr.sdc index f773b64fd..2ebc9f8b7 100644 --- a/projects/adrv9001/a10soc/system_constr.sdc +++ b/projects/adrv9001/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] diff --git a/projects/adrv9009/a10soc/system_constr.sdc b/projects/adrv9009/a10soc/system_constr.sdc index e7e5ec2c9..66f3339e4 100755 --- a/projects/adrv9009/a10soc/system_constr.sdc +++ b/projects/adrv9009/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2018-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "4.06504065 ns" -name ref_clk0 [get_ports {ref_clk0}] diff --git a/projects/adrv9009/s10soc/system_constr.sdc b/projects/adrv9009/s10soc/system_constr.sdc index ad8c4a210..65825b0cc 100755 --- a/projects/adrv9009/s10soc/system_constr.sdc +++ b/projects/adrv9009/s10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "4.069 ns" -name ref_clk0 [get_ports {ref_clk0}] diff --git a/projects/adrv9371x/a10soc/system_constr.sdc b/projects/adrv9371x/a10soc/system_constr.sdc index d1fa00d63..1ec33c916 100644 --- a/projects/adrv9371x/a10soc/system_constr.sdc +++ b/projects/adrv9371x/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "8.1300813 ns" -name ref_clk0 [get_ports {ref_clk0}] diff --git a/projects/adv7513/de10nano/system_constr.sdc b/projects/adv7513/de10nano/system_constr.sdc index d8af8dad6..20dbb48d4 100644 --- a/projects/adv7513/de10nano/system_constr.sdc +++ b/projects/adv7513/de10nano/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "20.000 ns" -name sys_clk_50mhz [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb_clk_60mhz [get_ports {usb1_clk}] diff --git a/projects/arradio/c5soc/system_constr.sdc b/projects/arradio/c5soc/system_constr.sdc index 09f20de23..f14f8782b 100644 --- a/projects/arradio/c5soc/system_constr.sdc +++ b/projects/arradio/c5soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] create_clock -period 4.0 -name rx_clk [get_ports {rx_clk_in}] diff --git a/projects/cn0506/a10soc/system_constr.sdc b/projects/cn0506/a10soc/system_constr.sdc index ec7a7ff92..389872eb4 100644 --- a/projects/cn0506/a10soc/system_constr.sdc +++ b/projects/cn0506/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "40.000 ns" -name mii_rx_clk_a [get_ports {mii_rx_clk_a}] create_clock -period "40.000 ns" -name mii_rx_clk_b [get_ports {mii_rx_clk_b}] diff --git a/projects/cn0540/de10nano/system_constr.sdc b/projects/cn0540/de10nano/system_constr.sdc index c08bbb592..2af8dcd99 100755 --- a/projects/cn0540/de10nano/system_constr.sdc +++ b/projects/cn0540/de10nano/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb1_clk [get_ports {usb1_clk}] diff --git a/projects/cn0561/de10nano/system_constr.sdc b/projects/cn0561/de10nano/system_constr.sdc index c67e058ab..6fed5e0a4 100644 --- a/projects/cn0561/de10nano/system_constr.sdc +++ b/projects/cn0561/de10nano/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb1_clk [get_ports {usb1_clk}] diff --git a/projects/cn0579/de10nano/system_constr.sdc b/projects/cn0579/de10nano/system_constr.sdc index d6276d034..c54c5b8c9 100644 --- a/projects/cn0579/de10nano/system_constr.sdc +++ b/projects/cn0579/de10nano/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb1_clk [get_ports {usb1_clk}] create_clock -period "122.07 ns" -name adc_clk [get_ports {adc_clk_in}] diff --git a/projects/common/a10gx/system_constr.sdc b/projects/common/a10gx/system_constr.sdc index f9d65c998..7b4d47020 100755 --- a/projects/common/a10gx/system_constr.sdc +++ b/projects/common/a10gx/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] derive_pll_clocks diff --git a/projects/common/a10soc/system_constr.sdc b/projects/common/a10soc/system_constr.sdc index 7e16caa69..9a9cc4007 100755 --- a/projects/common/a10soc/system_constr.sdc +++ b/projects/common/a10soc/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] derive_pll_clocks diff --git a/projects/common/c5soc/system_constr.sdc b/projects/common/c5soc/system_constr.sdc index bc3383cd1..25315c405 100755 --- a/projects/common/c5soc/system_constr.sdc +++ b/projects/common/c5soc/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}] derive_pll_clocks diff --git a/projects/common/de10nano/system_constr.sdc b/projects/common/de10nano/system_constr.sdc index 4706ca3fd..806ef71db 100755 --- a/projects/common/de10nano/system_constr.sdc +++ b/projects/common/de10nano/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "20.000 ns" -name sys_clk_50mhz [get_ports {sys_clk}] create_clock -period "16.666 ns" -name usb_clk_60mhz [get_ports {usb1_clk}] diff --git a/projects/common/s10soc/system_constr.sdc b/projects/common/s10soc/system_constr.sdc index 7e16caa69..9a9cc4007 100755 --- a/projects/common/s10soc/system_constr.sdc +++ b/projects/common/s10soc/system_constr.sdc @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] derive_pll_clocks diff --git a/projects/dac_fmc_ebz/a10soc/system_constr.sdc b/projects/dac_fmc_ebz/a10soc/system_constr.sdc index db06c0f36..5248d2c68 100644 --- a/projects/dac_fmc_ebz/a10soc/system_constr.sdc +++ b/projects/dac_fmc_ebz/a10soc/system_constr.sdc @@ -1,34 +1,7 @@ -# -# Copyright 2018 (c) Analog Devices, Inc. All rights reserved. -# -# In this HDL repository, there are many different and unique modules, consisting -# of various HDL (Verilog or VHDL) components. The individual modules are -# developed independently, and may be accompanied by separate and unique license -# terms. -# -# The user should read each of these license terms, and understand the -# freedoms and responsibilities that he or she has by using this source/core. -# -# This core is distributed in the hope that it will be useful, but WITHOUT ANY -# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR -# A PARTICULAR PURPOSE. -# -# Redistribution and use of source or resulting binaries, with or without modification -# of this file, are permitted under one of the following two license terms: -# -# 1. The GNU General Public License version 2 as published by the -# Free Software Foundation, which can be found in the top level directory -# of this repository (LICENSE_GPL2), and also online at: -# -# -# OR -# -# 2. An ADI specific BSD license, which can be found in the top level directory -# of this repository (LICENSE_ADIBSD), and also on-line at: -# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD -# This will allow to generate bit files and not release the source code, -# as long as it attaches to an ADI device. -# +############################################################################### +## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] diff --git a/projects/daq2/a10soc/system_constr.sdc b/projects/daq2/a10soc/system_constr.sdc index 2cd15b7c7..82a2a45f6 100644 --- a/projects/daq2/a10soc/system_constr.sdc +++ b/projects/daq2/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "3.000 ns" -name rx_ref_clk [get_ports {rx_ref_clk}] diff --git a/projects/fmcomms8/a10soc/system_constr.sdc b/projects/fmcomms8/a10soc/system_constr.sdc index 6b4df93c2..f3ce2aa73 100755 --- a/projects/fmcomms8/a10soc/system_constr.sdc +++ b/projects/fmcomms8/a10soc/system_constr.sdc @@ -1,3 +1,7 @@ +############################################################################### +## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}] create_clock -period "4.06504065 ns" -name ref_clk_c [get_ports {ref_clk_c}]