From 264bde77adcd05bdea41d3f134102bed7b3e53bb Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Wed, 24 Aug 2016 12:06:59 -0400 Subject: [PATCH] sdrstk- SWAP==1 option --- projects/sdrstk/system_constr.xdc | 50 +++++++++++++++---------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/projects/sdrstk/system_constr.xdc b/projects/sdrstk/system_constr.xdc index 678037305..c87ebe980 100644 --- a/projects/sdrstk/system_constr.xdc +++ b/projects/sdrstk/system_constr.xdc @@ -1,35 +1,35 @@ # constraints -# ad9361 +# ad9361 (SWAP == 0x1) set_property -dict {PACKAGE_PIN L12 IOSTANDARD LVCMOS18 } [get_ports rx_clk_in] set_property -dict {PACKAGE_PIN N13 IOSTANDARD LVCMOS18 } [get_ports rx_frame_in] -set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[0]] -set_property -dict {PACKAGE_PIN R13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[1]] -set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[2]] -set_property -dict {PACKAGE_PIN P11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[3]] -set_property -dict {PACKAGE_PIN R11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[4]] -set_property -dict {PACKAGE_PIN R12 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[5]] -set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[6]] -set_property -dict {PACKAGE_PIN P13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[7]] -set_property -dict {PACKAGE_PIN N9 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[8]] -set_property -dict {PACKAGE_PIN M9 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[9]] -set_property -dict {PACKAGE_PIN R8 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[10]] -set_property -dict {PACKAGE_PIN R7 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[11]] +set_property -dict {PACKAGE_PIN H14 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[0]] +set_property -dict {PACKAGE_PIN J13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[1]] +set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[2]] +set_property -dict {PACKAGE_PIN H13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[3]] +set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[4]] +set_property -dict {PACKAGE_PIN H12 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[5]] +set_property -dict {PACKAGE_PIN G11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[6]] +set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[7]] +set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[8]] +set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[9]] +set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[10]] +set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[11]] set_property -dict {PACKAGE_PIN P10 IOSTANDARD LVCMOS18} [get_ports tx_clk_out] set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS18} [get_ports tx_frame_out] -set_property -dict {PACKAGE_PIN H14 IOSTANDARD LVCMOS18} [get_ports tx_data_out[0]] -set_property -dict {PACKAGE_PIN J13 IOSTANDARD LVCMOS18} [get_ports tx_data_out[1]] -set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS18} [get_ports tx_data_out[2]] -set_property -dict {PACKAGE_PIN H13 IOSTANDARD LVCMOS18} [get_ports tx_data_out[3]] -set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS18} [get_ports tx_data_out[4]] -set_property -dict {PACKAGE_PIN H12 IOSTANDARD LVCMOS18} [get_ports tx_data_out[5]] -set_property -dict {PACKAGE_PIN G11 IOSTANDARD LVCMOS18} [get_ports tx_data_out[6]] -set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS18} [get_ports tx_data_out[7]] -set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18} [get_ports tx_data_out[8]] -set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18} [get_ports tx_data_out[9]] -set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports tx_data_out[10]] -set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports tx_data_out[11]] +set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS18} [get_ports tx_data_out[0]] +set_property -dict {PACKAGE_PIN R13 IOSTANDARD LVCMOS18} [get_ports tx_data_out[1]] +set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS18} [get_ports tx_data_out[2]] +set_property -dict {PACKAGE_PIN P11 IOSTANDARD LVCMOS18} [get_ports tx_data_out[3]] +set_property -dict {PACKAGE_PIN R11 IOSTANDARD LVCMOS18} [get_ports tx_data_out[4]] +set_property -dict {PACKAGE_PIN R12 IOSTANDARD LVCMOS18} [get_ports tx_data_out[5]] +set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS18} [get_ports tx_data_out[6]] +set_property -dict {PACKAGE_PIN P13 IOSTANDARD LVCMOS18} [get_ports tx_data_out[7]] +set_property -dict {PACKAGE_PIN N9 IOSTANDARD LVCMOS18} [get_ports tx_data_out[8]] +set_property -dict {PACKAGE_PIN M9 IOSTANDARD LVCMOS18} [get_ports tx_data_out[9]] +set_property -dict {PACKAGE_PIN R8 IOSTANDARD LVCMOS18} [get_ports tx_data_out[10]] +set_property -dict {PACKAGE_PIN R7 IOSTANDARD LVCMOS18} [get_ports tx_data_out[11]] set_property -dict {PACKAGE_PIN L15 IOSTANDARD LVCMOS18} [get_ports gpio_status[0]] set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS18} [get_ports gpio_status[1]]