From 1d26639d7364223e5ef04b49ab34057e4be660df Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Wed, 22 Oct 2014 10:05:55 +0300 Subject: [PATCH] common: Added synchronization mechanism to the up_adc_common module --- library/common/up_adc_common.v | 52 ++++++++++++++++++++++++++++------ 1 file changed, 44 insertions(+), 8 deletions(-) diff --git a/library/common/up_adc_common.v b/library/common/up_adc_common.v index 3562d114e..5b7a6ece0 100644 --- a/library/common/up_adc_common.v +++ b/library/common/up_adc_common.v @@ -53,9 +53,12 @@ module up_adc_common ( adc_ddr_edgesel, adc_pin_mode, adc_status, + adc_sync_status, adc_status_ovf, adc_status_unf, adc_clk_ratio, + adc_start_code, + adc_sync, // channel interface @@ -124,9 +127,12 @@ module up_adc_common ( output adc_ddr_edgesel; output adc_pin_mode; input adc_status; + input adc_sync_status; input adc_status_ovf; input adc_status_unf; input [31:0] adc_clk_ratio; + output [31:0] adc_start_code; + output adc_sync; // channel interface @@ -199,6 +205,8 @@ module up_adc_common ( reg up_status_unf = 'd0; reg [ 7:0] up_usr_chanmax = 'd0; reg [31:0] up_adc_gpio_out = 'd0; + reg [31:0] up_adc_start_code = 'd0; + reg up_adc_sync = 'd0; reg up_rack = 'd0; reg [31:0] up_rdata = 'd0; @@ -209,8 +217,10 @@ module up_adc_common ( wire up_preset_s; wire up_mmcm_preset_s; wire up_status_s; + wire up_sync_status_s; wire up_status_ovf_s; wire up_status_unf_s; + wire up_cntrl_xfer_done; wire [31:0] up_adc_clk_count_s; wire [ 4:0] up_delay_rdata_s; wire up_delay_status_s; @@ -249,6 +259,7 @@ module up_adc_common ( up_status_unf <= 'd0; up_usr_chanmax <= 'd0; up_adc_gpio_out <= 'd0; + up_adc_start_code <= 'd0; end else begin up_wack <= up_wreq_s; if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h02)) begin @@ -258,6 +269,13 @@ module up_adc_common ( up_mmcm_resetn <= up_wdata[1]; up_resetn <= up_wdata[0]; end + if (up_adc_sync == 1'b1) begin + if (up_cntrl_xfer_done == 1'b1) begin + up_adc_sync <= 1'b0; + end + end else if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h11)) begin + up_adc_sync <= up_wdata[3]; + end if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h11)) begin up_adc_r1_mode <= up_wdata[2]; up_adc_ddr_edgesel <= up_wdata[1]; @@ -288,6 +306,9 @@ module up_adc_common ( if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h28)) begin up_usr_chanmax <= up_wdata[7:0]; end + if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h29)) begin + up_adc_start_code <= up_wdata[31:0]; + end if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h2f)) begin up_adc_gpio_out <= up_wdata; end @@ -308,17 +329,19 @@ module up_adc_common ( 8'h01: up_rdata <= PCORE_ID; 8'h02: up_rdata <= up_scratch; 8'h10: up_rdata <= {30'd0, up_mmcm_resetn, up_resetn}; - 8'h11: up_rdata <= {29'd0, up_adc_r1_mode, up_adc_ddr_edgesel, up_adc_pin_mode}; + 8'h11: up_rdata <= {28'd0, up_adc_sync, up_adc_r1_mode, up_adc_ddr_edgesel, up_adc_pin_mode}; 8'h15: up_rdata <= up_adc_clk_count_s; 8'h16: up_rdata <= adc_clk_ratio; 8'h17: up_rdata <= {28'd0, up_status_pn_err, up_status_pn_oos, up_status_or, up_status_s}; 8'h18: up_rdata <= {14'd0, up_delay_sel, up_delay_rwn, up_delay_addr, 3'd0, up_delay_wdata}; 8'h19: up_rdata <= {22'd0, up_delay_locked_s, up_delay_status_s, 3'd0, up_delay_rdata_s}; + 8'h1a: up_rdata <= {31'd0, up_sync_status_s}; 8'h1c: up_rdata <= {3'd0, up_drp_rwn, up_drp_addr, up_drp_wdata}; 8'h1d: up_rdata <= {14'd0, up_drp_locked_s, up_drp_status_s, up_drp_rdata_s}; 8'h22: up_rdata <= {29'd0, up_status_ovf, up_status_unf, 1'b0}; 8'h23: up_rdata <= 32'd8; 8'h28: up_rdata <= {24'd0, adc_usr_chanmax}; + 8'h29: up_rdata <= up_adc_start_code; 8'h2e: up_rdata <= up_adc_gpio_in; 8'h2f: up_rdata <= up_adc_gpio_out; default: up_rdata <= 0; @@ -338,31 +361,44 @@ module up_adc_common ( // adc control & status - up_xfer_cntrl #(.DATA_WIDTH(3)) i_adc_xfer_cntrl ( + up_xfer_cntrl #(.DATA_WIDTH(4)) i_adc_xfer_cntrl ( .up_rstn (up_rstn), .up_clk (up_clk), - .up_data_cntrl ({ up_adc_r1_mode, + .up_data_cntrl ({ up_adc_sync, + up_adc_r1_mode, up_adc_ddr_edgesel, up_adc_pin_mode}), - .up_xfer_done (), + .up_xfer_done (up_cntrl_xfer_done), .d_rst (adc_rst), .d_clk (adc_clk), - .d_data_cntrl ({ adc_r1_mode, + .d_data_cntrl ({ adc_sync, + adc_r1_mode, adc_ddr_edgesel, adc_pin_mode})); - up_xfer_status #(.DATA_WIDTH(3)) i_adc_xfer_status ( + up_xfer_status #(.DATA_WIDTH(4)) i_adc_xfer_status ( .up_rstn (up_rstn), .up_clk (up_clk), - .up_data_status ({up_status_s, + .up_data_status ({up_sync_status_s, + up_status_s, up_status_ovf_s, up_status_unf_s}), .d_rst (adc_rst), .d_clk (adc_clk), - .d_data_status ({ adc_status, + .d_data_status ({ adc_sync_status, + adc_status, adc_status_ovf, adc_status_unf})); + up_xfer_cntrl #(.DATA_WIDTH(32)) i_adc_xfer_start_code ( + .up_rstn (up_rstn), + .up_clk (up_clk), + .up_data_cntrl (up_adc_start_code), + .up_xfer_done (), + .d_rst (adc_rst), + .d_clk (adc_clk), + .d_data_cntrl (adc_start_code)); + // adc clock monitor up_clock_mon i_adc_clock_mon (