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adv7511: zc706: Fix ddr and fixed_io signal names 

The toplevel input/output signal names are lower case, but the signals
connected to the system_wrapper are upper case. Since verilog is case
sensitive this leaves the toplevel input/output signals unconnected. Fix
this by using lower case names everywhere.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2015-04-23 13:35:11 +02:00
parent bd06bae8c2
commit 1bb5b6e55f
1 changed files with 21 additions and 21 deletions
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42
projects/adv7511/zc706/system_top.v
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@ -130,27 +130,27 @@ module system_top (
.dio(gpio_bd));
system_wrapper i_system_wrapper (
.ddr_addr (DDR_addr),
.ddr_ba (DDR_ba),
.ddr_cas_n (DDR_cas_n),
.ddr_ck_n (DDR_ck_n),
.ddr_ck_p (DDR_ck_p),
.ddr_cke (DDR_cke),
.ddr_cs_n (DDR_cs_n),
.ddr_dm (DDR_dm),
.ddr_dq (DDR_dq),
.ddr_dqs_n (DDR_dqs_n),
.ddr_dqs_p (DDR_dqs_p),
.ddr_odt (DDR_odt),
.ddr_ras_n (DDR_ras_n),
.ddr_reset_n (DDR_reset_n),
.ddr_we_n (DDR_we_n),
.fixed_io_ddr_vrn (FIXED_IO_ddr_vrn),
.fixed_io_ddr_vrp (FIXED_IO_ddr_vrp),
.fixed_io_mio (FIXED_IO_mio),
.fixed_io_ps_clk (FIXED_IO_ps_clk),
.fixed_io_ps_porb (FIXED_IO_ps_porb),
.fixed_io_ps_srstb (FIXED_IO_ps_srstb),
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),
.ddr_cas_n (ddr_cas_n),
.ddr_ck_n (ddr_ck_n),
.ddr_ck_p (ddr_ck_p),
.ddr_cke (ddr_cke),
.ddr_cs_n (ddr_cs_n),
.ddr_dm (ddr_dm),
.ddr_dq (ddr_dq),
.ddr_dqs_n (ddr_dqs_n),
.ddr_dqs_p (ddr_dqs_p),
.ddr_odt (ddr_odt),
.ddr_ras_n (ddr_ras_n),
.ddr_reset_n (ddr_reset_n),
.ddr_we_n (ddr_we_n),
.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
.fixed_io_mio (fixed_io_mio),
.fixed_io_ps_clk (fixed_io_ps_clk),
.fixed_io_ps_porb (fixed_io_ps_porb),
.fixed_io_ps_srstb (fixed_io_ps_srstb),
.gpio_i (gpio_i),
.gpio_o (gpio_o),
.gpio_t (gpio_t),