adi_board.tcl : Use 'global' instead of '$::'
parent
38126c404c
commit
179d6d601c
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@ -19,6 +19,9 @@ proc get_numstr {number} {
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#------------------------------------------------------------------------------
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proc adi_interconnect_lite { p_name } {
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global sys_100m_clk_source
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global sys_100m_resetn_source
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set axi_cpu_interconnect [get_bd_cells axi_cpu_interconnect]
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# increment the number of the master ports of the interconnect
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@ -36,12 +39,12 @@ proc adi_interconnect_lite { p_name } {
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connect_bd_net -net sys_100m_clk \
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[get_bd_pins "$axi_cpu_interconnect/M${i_str}_ACLK"] \
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[get_bd_pins "${p_name}/s_axi_aclk"] \
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$::sys_100m_clk_source
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$sys_100m_clk_source
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connect_bd_net -net sys_100m_resetn \
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[get_bd_pins "${axi_cpu_interconnect}/M${i_str}_ARESETN"] \
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[get_bd_pins "${p_name}/s_axi_aresetn"] \
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$::sys_100m_resetn_source
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$sys_100m_resetn_source
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# make the interface connection
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connect_bd_intf_net -intf_net "${p_name}axi_lite" \
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@ -55,6 +58,8 @@ proc adi_interconnect_lite { p_name } {
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#------------------------------------------------------------------------------
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proc adi_assign_base_address {p_addr p_name} {
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global sys_addr_cntrl_space
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set p_seg [get_bd_addr_segs -of_objects [get_bd_cells $p_name]]
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set p_seg [lsearch -inline -regexp $p_seg (?i)/.*s_axi\/|axi_lite.*/]
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@ -64,7 +69,7 @@ proc adi_assign_base_address {p_addr p_name} {
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set p_seg_range [get_property range $p_seg]
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create_bd_addr_seg -range $p_seg_range \
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-offset $p_addr $::sys_addr_cntrl_space \
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-offset $p_addr $sys_addr_cntrl_space \
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$p_seg "SEG_data_${p_name}"
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}
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@ -73,6 +78,8 @@ proc adi_assign_base_address {p_addr p_name} {
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#------------------------------------------------------------------------------
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proc adi_add_interrupt { intr_port } {
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global sys_zynq
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if { [get_bd_ports unc_int2] != {} } {
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delete_bd_objs [get_bd_nets sys_concat_intc_din_2] [get_bd_ports unc_int2]
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connect_bd_net [get_bd_pins sys_concat_intc/In2] [get_bd_pins $intr_port]
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@ -88,7 +95,7 @@ proc adi_add_interrupt { intr_port } {
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[get_bd_pins $intr_port]
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}
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# incrase the auxiliary concat last input port
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if { $::sys_zynq == 0 } {
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if { $sys_zynq == 0 } {
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set p_aux_intr [get_property CONFIG.IN9_WIDTH [get_bd_cells sys_concat_aux_intc]]
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set i_aux_intr [expr $p_aux_intr + 1]
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set_property CONFIG.IN9_WIDTH $i_aux_intr [get_bd_cells sys_concat_aux_intc]
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@ -100,6 +107,9 @@ proc adi_add_interrupt { intr_port } {
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#------------------------------------------------------------------------------
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proc adi_spi_core { spi_addr spi_ss spi_name } {
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global sys_zynq
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global sys_100m_clk_source
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# define SPI ports
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create_bd_port -dir I "${spi_name}_sclk_i"
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create_bd_port -dir O "${spi_name}_sclk_o"
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@ -110,7 +120,7 @@ proc adi_spi_core { spi_addr spi_ss spi_name } {
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create_bd_port -dir O -from [expr $spi_ss - 1] -to 0 "${spi_name}_csn_o"
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# check processor type, connect system clock and reset to the peripheral
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if { $::sys_zynq == 1 } {
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if { $sys_zynq == 1 } {
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set sys_ps7 [get_bd_cells sys_ps7]
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# add SPI interface to ps7, first check which SPI is free
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@ -183,7 +193,7 @@ proc adi_spi_core { spi_addr spi_ss spi_name } {
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connect_bd_net -net sys_100m_clk \
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[get_bd_pins "${spi_name}/ext_spi_clk"] \
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$::sys_100m_clk_source
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$sys_100m_clk_source
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# spi external ports
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connect_bd_net -net spi_csn_o \
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@ -215,6 +225,8 @@ proc adi_spi_core { spi_addr spi_ss spi_name } {
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#------------------------------------------------------------------------------
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proc adi_dma_interconnect { dma_if dma_clk ic_name } {
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global sys_100m_resetn_source
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set dma_atrb [split $dma_if "/"]
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lassign $dma_atrb dma_name dma_if_port
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@ -239,13 +251,13 @@ proc adi_dma_interconnect { dma_if dma_clk ic_name } {
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connect_bd_net [get_bd_pins "${ic_name}/S${i_str}_ACLK"] \
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${dma_clk}
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connect_bd_net [get_bd_pins "${ic_name}/S${i_str}_ARESETN"] \
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$::sys_100m_resetn_source
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$sys_100m_resetn_source
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# connect clk and reset for the peripheral port
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connect_bd_net [get_bd_pins "${dma_name}/${dma_if_port}_aclk"] \
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${dma_clk}
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connect_bd_net [get_bd_pins "${dma_name}/${dma_if_port}_aresetn"] \
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$::sys_100m_resetn_source
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$sys_100m_resetn_source
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# make the port connection
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connect_bd_intf_net -intf_net "${dma_name}_${i_str}" \
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@ -261,6 +273,8 @@ proc adi_dma_interconnect { dma_if dma_clk ic_name } {
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#------------------------------------------------------------------------------
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proc adi_hp_assign { hp_port hp_clk } {
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global sys_100m_resetn_source
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# check is hp port is enabled
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if { [get_property "CONFIG.PCW_USE_S_AXI_HP${hp_port}" [get_bd_cells sys_ps7]] == 1 } {
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#return the interconnect of the hp port
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@ -286,7 +300,7 @@ proc adi_hp_assign { hp_port hp_clk } {
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$hp_clk
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connect_bd_net [get_bd_pins "${ic_hp}/ARESETN"] \
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[get_bd_pins "${ic_hp}/M00_ARESETN"] \
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$::sys_100m_resetn_source
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$sys_100m_resetn_source
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}
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return $ic_hp
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