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kcu105: Don't use phy reset automation, as it's not supported for KCU105

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Adrian Costina 2016-08-08 17:53:32 +03:00
parent 02fcba1c96
commit 108870a2dc
2 changed files with 8 additions and 2 deletions
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3
projects/common/kcu105/kcu105_system_bd.tcl
View File

@ -95,7 +95,6 @@ set axi_ethernet [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_ethernet:7.0 a
set_property -dict [list CONFIG.SupportLevel {1}] $axi_ethernet
set_property -dict [list CONFIG.ETHERNET_BOARD_INTERFACE {sgmii_lvds}] $axi_ethernet
set_property -dict [list CONFIG.MDIO_BOARD_INTERFACE {mdio_mdc}] $axi_ethernet
set_property -dict [list CONFIG.PHYRST_BOARD_INTERFACE {phy_reset_out}] $axi_ethernet
set_property -dict [list CONFIG.DIFFCLK_BOARD_INTERFACE {sgmii_phyclk}] $axi_ethernet
set_property -dict [list CONFIG.lvdsclkrate {625}] $axi_ethernet
set_property -dict [list CONFIG.TXCSUM {Full}] $axi_ethernet
@ -215,7 +214,7 @@ ad_connect axi_ethernet/s_axis_txc axi_ethernet_dma/M_AXIS_CNTRL
ad_connect axi_ethernet/m_axis_rxd axi_ethernet_dma/S_AXIS_S2MM
ad_connect axi_ethernet/m_axis_rxs axi_ethernet_dma/S_AXIS_STS
ad_connect phy_sd axi_ethernet/signal_detect
ad_connect phy_rst_n axi_ethernet/phy_rst_n
ad_connect sys_cpu_resetn phy_rst_n
ad_connect axi_ethernet/axi_txd_arstn axi_ethernet_dma/mm2s_prmry_reset_out_n
ad_connect axi_ethernet/axi_txc_arstn axi_ethernet_dma/mm2s_cntrl_reset_out_n
ad_connect axi_ethernet/axi_rxd_arstn axi_ethernet_dma/s2mm_prmry_reset_out_n

7
projects/common/kcu105/kcu105_system_constr.xdc
View File

@ -8,6 +8,10 @@ set_property -dict {PACKAGE_PIN AN8 IOSTANDARD LVCMOS18} [get_ports sys_rst
set_property -dict {PACKAGE_PIN K26 IOSTANDARD LVCMOS18} [get_ports uart_sout]
set_property -dict {PACKAGE_PIN G25 IOSTANDARD LVCMOS18} [get_ports uart_sin]
# ethernet (phy_rst_n automation cannot be used with axi_ethernet 7.0)
set_property -dict {PACKAGE_PIN J23 IOSTANDARD LVCMOS18} [get_ports phy_rst_n]
# fan
set_property -dict {PACKAGE_PIN AJ9 IOSTANDARD LVCMOS18} [get_ports fan_pwm]
@ -46,3 +50,6 @@ set_property -dict {INTERNAL_VREF {0.84}} [get_iobanks 44]
set_property -dict {INTERNAL_VREF {0.84}} [get_iobanks 45]
set_property -dict {INTERNAL_VREF {0.84}} [get_iobanks 46]
create_clock -name phy_clk -period 1.60 [get_ports phy_clk_p]
set_false_path -to [get_pins -hier -filter {name =~ *ethernet*idelayctrl*/RST}]