From 0c3ec108aa96d2bc9c86b4d2c1db3d880915c03e Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Wed, 4 May 2022 09:15:17 +0100 Subject: [PATCH] ad9213_dual_ebz: Add possibility to change order of channels through a GPIO --- .../ad9213_dual_ebz/s10soc/system_constr.sdc | 1 + projects/ad9213_dual_ebz/s10soc/system_top.v | 22 +++++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/projects/ad9213_dual_ebz/s10soc/system_constr.sdc b/projects/ad9213_dual_ebz/s10soc/system_constr.sdc index d19656493..06ce98b2f 100755 --- a/projects/ad9213_dual_ebz/s10soc/system_constr.sdc +++ b/projects/ad9213_dual_ebz/s10soc/system_constr.sdc @@ -9,3 +9,4 @@ create_clock -period "3.2 ns" -name device_clk [get_ports {rx_d set_input_delay -clock {device_clk} 0.2 [get_ports {rx_sysref_a}] set_false_path -from [get_registers *altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out*] +set_false_path -from [get_keepers -no_duplicates {i_system_bd|sys_gpio_out|sys_gpio_out|data_out[2]}] -to [get_keepers -no_duplicates {adc_swap_d1}] diff --git a/projects/ad9213_dual_ebz/s10soc/system_top.v b/projects/ad9213_dual_ebz/s10soc/system_top.v index 1f683a367..59f0609c6 100755 --- a/projects/ad9213_dual_ebz/s10soc/system_top.v +++ b/projects/ad9213_dual_ebz/s10soc/system_top.v @@ -180,11 +180,17 @@ module system_top ( wire adc_enable_0; wire adc_enable_1; wire adc_valid; + wire [ 1:0] ltc_csn; + wire adc_swap; + reg adc_valid_d1; reg [1023:0] adc_data_d1; reg [511:0] adc_data_0_d1; reg [511:0] adc_data_1_d1; - wire [ 1:0] ltc_csn; + reg [511:0] adc_data_0_swap; + reg [511:0] adc_data_1_swap; + reg adc_swap_d1; + reg adc_swap_d2; // motherboard-gpio @@ -195,6 +201,7 @@ module system_top ( // assignments + assign adc_swap = gpio_o[34]; assign ad9213_a_rst = gpio_o[32]; assign ad9213_b_rst = gpio_o[33]; assign gpio_i[63:32] = gpio_o[63:32]; @@ -233,10 +240,21 @@ module system_top ( genvar i; for (i = 0; i < 512; i = i + 16) begin - assign adc_data[(2*i)+31:(2*i)] ={adc_data_1[i+15:i],adc_data_0[i+15:i]}; + assign adc_data[(2*i)+31:(2*i)] ={adc_data_1_swap[i+15:i],adc_data_0_swap[i+15:i]}; end always @(posedge rx_device_clk_0) begin + adc_swap_d1 <= adc_swap; + adc_swap_d2 <= adc_swap_d1; + + if (adc_swap_d2 == 1'b0) begin + adc_data_0_swap <= adc_data_0; + adc_data_1_swap <= adc_data_1; + end else begin + adc_data_0_swap <= adc_data_1; + adc_data_1_swap <= adc_data_0; + end + adc_data_0_d1 <= adc_data_0; adc_data_1_d1 <= adc_data_1;