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axi_hdmi_rx- move data to an iob

main
Rejeesh Kutty 2017-05-19 16:25:54 -04:00
parent 0eaa98370e
commit 0930c486d2
2 changed files with 95 additions and 74 deletions
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50
library/axi_hdmi_rx/axi_hdmi_rx.v
View File

@ -23,7 +23,8 @@
module axi_hdmi_rx #( module axi_hdmi_rx #(
parameter ID = 0) ( parameter ID = 0,
parameter IO_INTERFACE = 1) (
// hdmi interface // hdmi interface
@ -63,32 +64,31 @@ module axi_hdmi_rx #(
input [ 2:0] s_axi_awprot, input [ 2:0] s_axi_awprot,
input [ 2:0] s_axi_arprot); input [ 2:0] s_axi_arprot);
// internal signals // internal signals
wire up_wreq_s; wire up_wreq_s;
wire [13:0] up_waddr_s; wire [13:0] up_waddr_s;
wire [31:0] up_wdata_s; wire [31:0] up_wdata_s;
wire up_wack_s; wire up_wack_s;
wire up_rreq_s; wire up_rreq_s;
wire [13:0] up_raddr_s; wire [13:0] up_raddr_s;
wire [31:0] up_rdata_s; wire [31:0] up_rdata_s;
wire up_rack_s; wire up_rack_s;
wire hdmi_edge_sel_s; wire hdmi_edge_sel_s;
wire hdmi_bgr_s; wire hdmi_bgr_s;
wire hdmi_packed_s; wire hdmi_packed_s;
wire hdmi_csc_bypass_s; wire hdmi_csc_bypass_s;
wire [15:0] hdmi_vs_count_s; wire [15:0] hdmi_vs_count_s;
wire [15:0] hdmi_hs_count_s; wire [15:0] hdmi_hs_count_s;
wire hdmi_tpm_oos_s; wire hdmi_tpm_oos_s;
wire hdmi_vs_oos_s; wire hdmi_vs_oos_s;
wire hdmi_hs_oos_s; wire hdmi_hs_oos_s;
wire hdmi_vs_mismatch_s; wire hdmi_vs_mismatch_s;
wire hdmi_hs_mismatch_s; wire hdmi_hs_mismatch_s;
wire [15:0] hdmi_vs_s; wire [15:0] hdmi_vs_s;
wire [15:0] hdmi_hs_s; wire [15:0] hdmi_hs_s;
wire hdmi_rst; wire hdmi_rst;
wire [15:0] hdmi_data; wire [15:0] hdmi_data;
// signal name changes // signal name changes

119
library/axi_hdmi_rx/axi_hdmi_rx_core.v
View File

@ -22,7 +22,9 @@
// *************************************************************************** // ***************************************************************************
// Receive HDMI, hdmi embedded syncs data in, video dma data out. // Receive HDMI, hdmi embedded syncs data in, video dma data out.
module axi_hdmi_rx_core ( module axi_hdmi_rx_core #(
parameter IO_INTERFACE = 1) (
// hdmi interface // hdmi interface
@ -51,49 +53,48 @@ module axi_hdmi_rx_core (
// internal registers // internal registers
reg hdmi_dma_de_cnt = 'd0; reg hdmi_dma_de_cnt = 'd0;
reg hdmi_dma_sof_int = 'd0; reg hdmi_dma_sof_int = 'd0;
reg hdmi_dma_de_int = 'd0; reg hdmi_dma_de_int = 'd0;
reg [31:0] hdmi_dma_data_int = 'd0; reg [31:0] hdmi_dma_data_int = 'd0;
reg hdmi_sof_422 = 'd0; reg hdmi_sof_422 = 'd0;
reg hdmi_de_422 = 'd0; reg hdmi_de_422 = 'd0;
reg hdmi_de_422_cnt = 'd0; reg hdmi_de_422_cnt = 'd0;
reg [15:0] hdmi_data_422 = 'd0; reg [15:0] hdmi_data_422 = 'd0;
reg hdmi_sof_444 = 'd0; reg hdmi_sof_444 = 'd0;
reg hdmi_de_444 = 'd0; reg hdmi_de_444 = 'd0;
reg [23:0] hdmi_data_444 = 'd0; reg [23:0] hdmi_data_444 = 'd0;
reg [ 1:0] hdmi_de_444_cnt = 'd0; reg [ 1:0] hdmi_de_444_cnt = 'd0;
reg [15:0] hdmi_data_444_hold = 'd0; reg [15:0] hdmi_data_444_hold = 'd0;
reg hdmi_sof_444_p = 'd0; reg hdmi_sof_444_p = 'd0;
reg hdmi_de_444_p = 'd0; reg hdmi_de_444_p = 'd0;
reg [31:0] hdmi_data_444_p = 'd0; reg [31:0] hdmi_data_444_p = 'd0;
reg hdmi_dma_enable = 'd0; reg hdmi_dma_enable = 'd0;
reg hdmi_hs_de_d = 'd0; reg hdmi_hs_de_d = 'd0;
reg hdmi_vs_de_d = 'd0; reg hdmi_vs_de_d = 'd0;
reg hdmi_sof = 'd0; reg hdmi_sof = 'd0;
reg [15:0] hdmi_hs_rcv = 'd0; reg [15:0] hdmi_hs_rcv = 'd0;
reg [15:0] hdmi_hs_cur = 'd0; reg [15:0] hdmi_hs_cur = 'd0;
reg hdmi_hs_oos_int = 'd0; reg hdmi_hs_oos_int = 'd0;
reg [15:0] hdmi_vs_rcv = 'd0; reg [15:0] hdmi_vs_rcv = 'd0;
reg [15:0] hdmi_vs_cur = 'd0; reg [15:0] hdmi_vs_cur = 'd0;
reg hdmi_vs_oos_int = 'd0; reg hdmi_vs_oos_int = 'd0;
reg [15:0] hdmi_data_neg_p = 'd0; reg [15:0] hdmi_data_p = 'd0;
reg [15:0] hdmi_data_pos_p = 'd0;
reg [15:0] hdmi_data_p = 'd0;
reg [15:0] hdmi_data_neg = 'd0;
// internal signals // internal signals
wire hdmi_sof_s; wire [15:0] hdmi_data_p_s;
wire hdmi_sof_ss_s; wire [15:0] hdmi_data_n_s;
wire hdmi_de_ss_s; wire hdmi_sof_s;
wire [23:0] hdmi_data_ss_s; wire hdmi_sof_ss_s;
wire hdmi_sof_444_s; wire hdmi_de_ss_s;
wire hdmi_de_444_s; wire [23:0] hdmi_data_ss_s;
wire [23:0] hdmi_data_444_s; wire hdmi_sof_444_s;
wire [15:0] hdmi_data_de_s; wire hdmi_de_444_s;
wire hdmi_hs_de_s; wire [23:0] hdmi_data_444_s;
wire hdmi_vs_de_s; wire [15:0] hdmi_data_de_s;
wire hdmi_hs_de_s;
wire hdmi_vs_de_s;
// dma interface // dma interface
@ -256,21 +257,41 @@ module axi_hdmi_rx_core (
end end
// hdmi input data registers // hdmi input data registers
// use iddr if interfacing off-chip (keeps iob)
// use same edge (or register falling edge again)
genvar n;
generate
if (IO_INTERFACE == 0) begin
for (n = 0; n < 16; n = n + 1) begin: g_hdmi_data
IDDR #(
.DDR_CLK_EDGE ("SAME_EDGE_PIPELINED"),
.INIT_Q1 (1'b0),
.INIT_Q2 (1'b0),
.SRTYPE ("ASYNC"))
i_rx_data_iddr (
.CE (1'b1),
.R (1'b0),
.S (1'b0),
.C (hdmi_clk),
.D (hdmi_data[n]),
.Q1 (hdmi_data_p_s[n]),
.Q2 (hdmi_data_n_s[n]));
end
end else begin
assign hdmi_data_p_s = hdmi_data;
assign hdmi_data_n_s = hdmi_data;
end
endgenerate
always @(posedge hdmi_clk) begin always @(posedge hdmi_clk) begin
hdmi_data_neg_p <= hdmi_data_neg;
hdmi_data_pos_p <= hdmi_data;
if (hdmi_edge_sel == 1'b1) begin if (hdmi_edge_sel == 1'b1) begin
hdmi_data_p <= hdmi_data_neg_p; hdmi_data_p <= hdmi_data_n_s;
end else begin end else begin
hdmi_data_p <= hdmi_data_pos_p; hdmi_data_p <= hdmi_data_p_s;
end end
end end
always @(negedge hdmi_clk) begin
hdmi_data_neg <= hdmi_data;
end
// super sampling, 422 to 444 // super sampling, 422 to 444
ad_ss_422to444 #(.CR_CB_N(0), .DELAY_DATA_WIDTH(2)) i_ss ( ad_ss_422to444 #(.CR_CB_N(0), .DELAY_DATA_WIDTH(2)) i_ss (