zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

axi_hdmi_rx- move data to an iob

main
Rejeesh Kutty 2017-05-19 16:25:54 -04:00
parent 0eaa98370e
commit 0930c486d2
2 changed files with 95 additions and 74 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
library/axi_hdmi_rx/axi_hdmi_rx.v
View File

@ -23,7 +23,8 @@
module axi_hdmi_rx #( module axi_hdmi_rx #(
parameter ID = 0) ( parameter ID = 0,
parameter IO_INTERFACE = 1) (
// hdmi interface // hdmi interface
@ -63,7 +64,6 @@ module axi_hdmi_rx #(
input [ 2:0] s_axi_awprot, input [ 2:0] s_axi_awprot,
input [ 2:0] s_axi_arprot); input [ 2:0] s_axi_arprot);
// internal signals // internal signals
wire up_wreq_s; wire up_wreq_s;

45
library/axi_hdmi_rx/axi_hdmi_rx_core.v
View File

@ -22,7 +22,9 @@
// *************************************************************************** // ***************************************************************************
// Receive HDMI, hdmi embedded syncs data in, video dma data out. // Receive HDMI, hdmi embedded syncs data in, video dma data out.
module axi_hdmi_rx_core ( module axi_hdmi_rx_core #(
parameter IO_INTERFACE = 1) (
// hdmi interface // hdmi interface
@ -77,13 +79,12 @@ module axi_hdmi_rx_core (
reg [15:0] hdmi_vs_rcv = 'd0; reg [15:0] hdmi_vs_rcv = 'd0;
reg [15:0] hdmi_vs_cur = 'd0; reg [15:0] hdmi_vs_cur = 'd0;
reg hdmi_vs_oos_int = 'd0; reg hdmi_vs_oos_int = 'd0;
reg [15:0] hdmi_data_neg_p = 'd0;
reg [15:0] hdmi_data_pos_p = 'd0;
reg [15:0] hdmi_data_p = 'd0; reg [15:0] hdmi_data_p = 'd0;
reg [15:0] hdmi_data_neg = 'd0;
// internal signals // internal signals
wire [15:0] hdmi_data_p_s;
wire [15:0] hdmi_data_n_s;
wire hdmi_sof_s; wire hdmi_sof_s;
wire hdmi_sof_ss_s; wire hdmi_sof_ss_s;
wire hdmi_de_ss_s; wire hdmi_de_ss_s;
@ -256,21 +257,41 @@ module axi_hdmi_rx_core (
end end
// hdmi input data registers // hdmi input data registers
// use iddr if interfacing off-chip (keeps iob)
// use same edge (or register falling edge again)
genvar n;
generate
if (IO_INTERFACE == 0) begin
for (n = 0; n < 16; n = n + 1) begin: g_hdmi_data
IDDR #(
.DDR_CLK_EDGE ("SAME_EDGE_PIPELINED"),
.INIT_Q1 (1'b0),
.INIT_Q2 (1'b0),
.SRTYPE ("ASYNC"))
i_rx_data_iddr (
.CE (1'b1),
.R (1'b0),
.S (1'b0),
.C (hdmi_clk),
.D (hdmi_data[n]),
.Q1 (hdmi_data_p_s[n]),
.Q2 (hdmi_data_n_s[n]));
end
end else begin
assign hdmi_data_p_s = hdmi_data;
assign hdmi_data_n_s = hdmi_data;
end
endgenerate
always @(posedge hdmi_clk) begin always @(posedge hdmi_clk) begin
hdmi_data_neg_p <= hdmi_data_neg;
hdmi_data_pos_p <= hdmi_data;
if (hdmi_edge_sel == 1'b1) begin if (hdmi_edge_sel == 1'b1) begin
hdmi_data_p <= hdmi_data_neg_p; hdmi_data_p <= hdmi_data_n_s;
end else begin end else begin
hdmi_data_p <= hdmi_data_pos_p; hdmi_data_p <= hdmi_data_p_s;
end end
end end
always @(negedge hdmi_clk) begin
hdmi_data_neg <= hdmi_data;
end
// super sampling, 422 to 444 // super sampling, 422 to 444
ad_ss_422to444 #(.CR_CB_N(0), .DELAY_DATA_WIDTH(2)) i_ss ( ad_ss_422to444 #(.CR_CB_N(0), .DELAY_DATA_WIDTH(2)) i_ss (