diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine.v b/library/spi_engine/axi_spi_engine/axi_spi_engine.v index 24e401cdc..6968a55a7 100644 --- a/library/spi_engine/axi_spi_engine/axi_spi_engine.v +++ b/library/spi_engine/axi_spi_engine/axi_spi_engine.v @@ -1,6 +1,20 @@ `timescale 1ns/100ps -module axi_spi_engine ( +module axi_spi_engine #( + + parameter CMD_FIFO_ADDRESS_WIDTH = 4, + parameter SDO_FIFO_ADDRESS_WIDTH = 5, + parameter SDI_FIFO_ADDRESS_WIDTH = 5, + parameter MM_IF_TYPE = 0, + parameter UP_ADDRESS_WIDTH = 14, + parameter ASYNC_SPI_CLK = 0, + parameter NUM_OFFLOAD = 0, + parameter OFFLOAD0_CMD_MEM_ADDRESS_WIDTH = 4, + parameter OFFLOAD0_SDO_MEM_ADDRESS_WIDTH = 4, + parameter ID = 0, + parameter DATA_WIDTH = 8, + parameter NUM_OF_SDI = 1 ) ( + // Slave AXI interface input s_axi_aclk, @@ -75,23 +89,6 @@ module axi_spi_engine ( input offload0_enabled ); -parameter CMD_FIFO_ADDRESS_WIDTH = 4; -parameter SDO_FIFO_ADDRESS_WIDTH = 5; -parameter SDI_FIFO_ADDRESS_WIDTH = 5; -parameter MM_IF_TYPE = 0; -parameter UP_ADDRESS_WIDTH = 14; - -parameter ASYNC_SPI_CLK = 0; - -parameter NUM_OFFLOAD = 0; - -parameter OFFLOAD0_CMD_MEM_ADDRESS_WIDTH = 4; -parameter OFFLOAD0_SDO_MEM_ADDRESS_WIDTH = 4; - -parameter ID = 'h00; -parameter DATA_WIDTH = 8; -parameter NUM_OF_SDI = 1; - localparam PCORE_VERSION = 'h010071; localparam S_AXI = 0; localparam UP_FIFO = 1; diff --git a/library/spi_engine/spi_engine_execution/spi_engine_execution.v b/library/spi_engine/spi_engine_execution/spi_engine_execution.v index ed743f376..be86214ff 100644 --- a/library/spi_engine/spi_engine_execution/spi_engine_execution.v +++ b/library/spi_engine/spi_engine_execution/spi_engine_execution.v @@ -1,5 +1,12 @@ -module spi_engine_execution ( +module spi_engine_execution #( + + parameter NUM_OF_CS = 1, + parameter DEFAULT_SPI_CFG = 0, + parameter DEFAULT_CLK_DIV = 0, + parameter DATA_WIDTH = 8, // Valid data widths values are 8/16/24/32 + parameter NUM_OF_SDI = 1 ) ( + input clk, input resetn, @@ -33,12 +40,6 @@ module spi_engine_execution ( output reg three_wire ); -parameter NUM_OF_CS = 1; -parameter DEFAULT_SPI_CFG = 0; -parameter DEFAULT_CLK_DIV = 0; -parameter DATA_WIDTH = 8; // Valid data widths values are 8/16/24/32 -parameter NUM_OF_SDI = 1; - localparam CMD_TRANSFER = 2'b00; localparam CMD_CHIPSELECT = 2'b01; localparam CMD_WRITE = 2'b10; diff --git a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v index 52bdf0ca5..8675a467e 100644 --- a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v +++ b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v @@ -1,6 +1,10 @@ -module spi_engine_interconnect ( +module spi_engine_interconnect #( + + parameter DATA_WIDTH = 8, // Valid data widths values are 8/16/24/32 + parameter NUM_OF_SDI = 1 ) ( + input clk, input resetn, @@ -55,9 +59,6 @@ module spi_engine_interconnect ( output [7:0] s1_sync ); -parameter DATA_WIDTH = 8; // Valid data widths values are 8/16/24/32 -parameter NUM_OF_SDI = 1; - reg s_active = 1'b0; reg idle = 1'b1; diff --git a/library/spi_engine/spi_engine_offload/spi_engine_offload.v b/library/spi_engine/spi_engine_offload/spi_engine_offload.v index 37242d137..a14747cc2 100644 --- a/library/spi_engine/spi_engine_offload/spi_engine_offload.v +++ b/library/spi_engine/spi_engine_offload/spi_engine_offload.v @@ -1,5 +1,12 @@ -module spi_engine_offload ( +module spi_engine_offload #( + + parameter ASYNC_SPI_CLK = 0, + parameter CMD_MEM_ADDRESS_WIDTH = 4, + parameter SDO_MEM_ADDRESS_WIDTH = 4, + parameter DATA_WIDTH = 8, // Valid data widths values are 8/16/24/32 + parameter NUM_OF_SDI = 1 ) ( + input ctrl_clk, input ctrl_cmd_wr_en, @@ -38,12 +45,6 @@ module spi_engine_offload ( output [(NUM_OF_SDI * DATA_WIDTH-1):0] offload_sdi_data ); -parameter ASYNC_SPI_CLK = 0; -parameter CMD_MEM_ADDRESS_WIDTH = 4; -parameter SDO_MEM_ADDRESS_WIDTH = 4; -parameter DATA_WIDTH = 8; // Valid data widths values are 8/16/24/32 -parameter NUM_OF_SDI = 1; - reg spi_active = 1'b0; reg [CMD_MEM_ADDRESS_WIDTH-1:0] ctrl_cmd_wr_addr = 'h00;