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daq3/a10gx- qsys modifications

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Rejeesh Kutty 2016-05-24 03:15:24 -04:00
parent 39d23032f1
commit 05ac271aff
1 changed files with 14 additions and 8 deletions
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22
library/axi_ad9152/axi_ad9152_hw.tcl
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@ -82,15 +82,21 @@ ad_alt_intf signal tx_data output 128 data
ad_alt_intf clock dac_clk output 1 ad_alt_intf clock dac_clk output 1
add_interface fifo_ch_0_out conduit end add_interface dac_ch_0 conduit end
add_interface_port fifo_ch_0_out dac_enable_0 enable Output 1 add_interface_port dac_ch_0 dac_enable_0 enable Output 1
add_interface_port fifo_ch_0_out dac_valid_0 valid Output 1 add_interface_port dac_ch_0 dac_valid_0 valid Output 1
add_interface_port fifo_ch_0_out dac_ddata_0 data Input 64 add_interface_port dac_ch_0 dac_ddata_0 data Input 64
add_interface fifo_ch_1_out conduit end set_interface_property dac_ch_0 associatedClock if_tx_clk
add_interface_port fifo_ch_1_out dac_enable_1 enable Output 1 set_interface_property dac_ch_0 associatedReset none
add_interface_port fifo_ch_1_out dac_valid_1 valid Output 1
add_interface_port fifo_ch_1_out dac_ddata_1 data Input 64 add_interface dac_ch_1 conduit end
add_interface_port dac_ch_1 dac_enable_1 enable Output 1
add_interface_port dac_ch_1 dac_valid_1 valid Output 1
add_interface_port dac_ch_1 dac_ddata_1 data Input 64
set_interface_property dac_ch_1 associatedClock if_tx_clk
set_interface_property dac_ch_1 associatedReset none
ad_alt_intf signal dac_dovf input 1 ovf ad_alt_intf signal dac_dovf input 1 ovf
ad_alt_intf signal dac_dunf input 1 unf ad_alt_intf signal dac_dunf input 1 unf