diff --git a/projects/fmcadc2/common/fmcadc2_bd.tcl b/projects/fmcadc2/common/fmcadc2_bd.tcl index 0d81a4f6d..d4d83ea28 100644 --- a/projects/fmcadc2/common/fmcadc2_bd.tcl +++ b/projects/fmcadc2/common/fmcadc2_bd.tcl @@ -1,43 +1,43 @@ # adc peripherals -set axi_ad9625_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9625:1.0 axi_ad9625_core] +ad_ip_instance axi_ad9625 axi_ad9625_core -set axi_ad9625_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:7.0 axi_ad9625_jesd] -set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9625_jesd -set_property -dict [list CONFIG.C_LANES {8}] $axi_ad9625_jesd +ad_ip_instance jesd204 axi_ad9625_jesd +ad_ip_parameter axi_ad9625_jesd CONFIG.C_NODE_IS_TRANSMIT 0 +ad_ip_parameter axi_ad9625_jesd CONFIG.C_LANES 8 -set axi_ad9625_xcvr [create_bd_cell -type ip -vlnv analog.com:user:axi_adxcvr:1.0 axi_ad9625_xcvr] -set_property -dict [list CONFIG.NUM_OF_LANES {8}] $axi_ad9625_xcvr -set_property -dict [list CONFIG.QPLL_ENABLE {0}] $axi_ad9625_xcvr -set_property -dict [list CONFIG.TX_OR_RX_N {0}] $axi_ad9625_xcvr -set_property -dict [list CONFIG.LPM_OR_DFE_N {1}] $axi_ad9625_xcvr -set_property -dict [list CONFIG.SYS_CLK_SEL {0}] $axi_ad9625_xcvr -set_property -dict [list CONFIG.OUT_CLK_SEL {2}] $axi_ad9625_xcvr +ad_ip_instance axi_adxcvr axi_ad9625_xcvr +ad_ip_parameter axi_ad9625_xcvr CONFIG.NUM_OF_LANES 8 +ad_ip_parameter axi_ad9625_xcvr CONFIG.QPLL_ENABLE 0 +ad_ip_parameter axi_ad9625_xcvr CONFIG.TX_OR_RX_N 0 +ad_ip_parameter axi_ad9625_xcvr CONFIG.LPM_OR_DFE_N 1 +ad_ip_parameter axi_ad9625_xcvr CONFIG.SYS_CLK_SEL 0 +ad_ip_parameter axi_ad9625_xcvr CONFIG.OUT_CLK_SEL 2 -set axi_ad9625_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9625_dma] -set_property -dict [list CONFIG.DMA_TYPE_SRC {1}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.ID {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.AXI_SLICE_DEST {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_LENGTH_WIDTH {24}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {64}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad9625_dma +ad_ip_instance axi_dmac axi_ad9625_dma +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_TYPE_SRC 1 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_TYPE_DEST 0 +ad_ip_parameter axi_ad9625_dma CONFIG.ID 0 +ad_ip_parameter axi_ad9625_dma CONFIG.AXI_SLICE_SRC 0 +ad_ip_parameter axi_ad9625_dma CONFIG.AXI_SLICE_DEST 0 +ad_ip_parameter axi_ad9625_dma CONFIG.SYNC_TRANSFER_START 0 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_LENGTH_WIDTH 24 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_2D_TRANSFER 0 +ad_ip_parameter axi_ad9625_dma CONFIG.CYCLIC 0 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_SRC 64 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_DEST 64 -set util_fmcadc2_xcvr [create_bd_cell -type ip -vlnv analog.com:user:util_adxcvr:1.0 util_fmcadc2_xcvr] -set_property -dict [list CONFIG.QPLL_FBDIV {"0010000000"}] $util_fmcadc2_xcvr ;# N = 40 -set_property -dict [list CONFIG.CPLL_FBDIV {1}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.TX_NUM_OF_LANES {0}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.TX_OUT_DIV {1}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.TX_CLK25_DIV {25}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.RX_NUM_OF_LANES {8}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.RX_OUT_DIV {1}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.RX_CLK25_DIV {25}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.RX_DFE_LPM_CFG {0x0904}] $util_fmcadc2_xcvr -set_property -dict [list CONFIG.RX_CDR_CFG {0x03000023ff20400020}] $util_fmcadc2_xcvr ;# DFE mode refclk +-200 +ad_ip_instance util_adxcvr util_fmcadc2_xcvr +ad_ip_parameter util_fmcadc2_xcvr CONFIG.QPLL_FBDIV "0010000000" ;# N = 40 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.CPLL_FBDIV 1 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.TX_NUM_OF_LANES 0 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.TX_OUT_DIV 1 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.TX_CLK25_DIV 25 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.RX_NUM_OF_LANES 8 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.RX_OUT_DIV 1 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.RX_CLK25_DIV 25 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.RX_DFE_LPM_CFG 0x0904 +ad_ip_parameter util_fmcadc2_xcvr CONFIG.RX_CDR_CFG 0x03000023ff20400020 ;# DFE mode refclk +-200 # reference clocks & resets diff --git a/projects/fmcadc2/zc706/system_project.tcl b/projects/fmcadc2/zc706/system_project.tcl index 4491020cb..758d6a786 100644 --- a/projects/fmcadc2/zc706/system_project.tcl +++ b/projects/fmcadc2/zc706/system_project.tcl @@ -16,15 +16,15 @@ adi_project_files fmcadc2_zc706 [list \ adi_project_run fmcadc2_zc706 -set ila_core [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:6.1 ila_core] -set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_core -set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_core -set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_core -set_property -dict [list CONFIG.C_NUM_OF_PROBES {4}] $ila_core -set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_core -set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_core -set_property -dict [list CONFIG.C_PROBE2_WIDTH {1}] $ila_core -set_property -dict [list CONFIG.C_PROBE3_WIDTH {256}] $ila_core +ad_ip_instance ila ila_core +ad_ip_parameter ila_core CONFIG.C_MONITOR_TYPE Native +ad_ip_parameter ila_core CONFIG.C_TRIGIN_EN false +ad_ip_parameter ila_core CONFIG.C_EN_STRG_QUAL 1 +ad_ip_parameter ila_core CONFIG.C_NUM_OF_PROBES 4 +ad_ip_parameter ila_core CONFIG.C_PROBE0_WIDTH 1 +ad_ip_parameter ila_core CONFIG.C_PROBE1_WIDTH 1 +ad_ip_parameter ila_core CONFIG.C_PROBE2_WIDTH 1 +ad_ip_parameter ila_core CONFIG.C_PROBE3_WIDTH 256 ad_connect axi_ad9625_core/adc_clk ila_core/clk ad_connect axi_ad9625_core/adc_rst ila_core/probe0 diff --git a/projects/fmcadc5/common/fmcadc5_bd.tcl b/projects/fmcadc5/common/fmcadc5_bd.tcl index 70560733a..ea89a302a 100644 --- a/projects/fmcadc5/common/fmcadc5_bd.tcl +++ b/projects/fmcadc5/common/fmcadc5_bd.tcl @@ -1,74 +1,77 @@ # adc peripherals -set util_fmcadc5_0_xcvr [create_bd_cell -type ip -vlnv analog.com:user:util_adxcvr:1.0 util_fmcadc5_0_xcvr] -set_property -dict [list CONFIG.QPLL_FBDIV {"0010000000"}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.CPLL_FBDIV {1}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.TX_NUM_OF_LANES {0}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.TX_OUT_DIV {2}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.TX_CLK25_DIV {10}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_NUM_OF_LANES {8}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_OUT_DIV {1}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_CLK25_DIV {25}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_DFE_LPM_CFG {0x0954}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_CDR_CFG {0x03000023ff20400020}] $util_fmcadc5_0_xcvr -set_property -dict [list CONFIG.RX_PMA_CFG {0x00018480}] $util_fmcadc5_0_xcvr -set util_fmcadc5_1_xcvr [create_bd_cell -type ip -vlnv analog.com:user:util_adxcvr:1.0 util_fmcadc5_1_xcvr] -set_property -dict [list CONFIG.QPLL_FBDIV {"0010000000"}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.CPLL_FBDIV {1}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.TX_NUM_OF_LANES {0}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.TX_OUT_DIV {2}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.TX_CLK25_DIV {10}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_NUM_OF_LANES {8}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_OUT_DIV {1}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_CLK25_DIV {25}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_DFE_LPM_CFG {0x0954}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_CDR_CFG {0x03000023ff20400020}] $util_fmcadc5_1_xcvr -set_property -dict [list CONFIG.RX_PMA_CFG {0x00018480}] $util_fmcadc5_1_xcvr +ad_ip_instance util_adxcvr util_fmcadc5_0_xcvr +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.QPLL_FBDIV "0010000000" +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.CPLL_FBDIV 1 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.TX_NUM_OF_LANES 0 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.TX_OUT_DIV 2 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.TX_CLK25_DIV 10 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_NUM_OF_LANES 8 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_OUT_DIV 1 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_CLK25_DIV 25 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_DFE_LPM_CFG 0x0954 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_CDR_CFG 0x03000023ff20400020 +ad_ip_parameter util_fmcadc5_0_xcvr CONFIG.RX_PMA_CFG 0x00018480 -set axi_ad9625_0_xcvr [create_bd_cell -type ip -vlnv analog.com:user:axi_adxcvr:1.0 axi_ad9625_0_xcvr] -set_property -dict [list CONFIG.NUM_OF_LANES {8}] $axi_ad9625_0_xcvr -set_property -dict [list CONFIG.QPLL_ENABLE {0}] $axi_ad9625_0_xcvr -set_property -dict [list CONFIG.TX_OR_RX_N {0}] $axi_ad9625_0_xcvr -set_property -dict [list CONFIG.LPM_OR_DFE_N {0}] $axi_ad9625_0_xcvr -set_property -dict [list CONFIG.SYS_CLK_SEL {"00"}] $axi_ad9625_0_xcvr -set_property -dict [list CONFIG.OUT_CLK_SEL {"010"}] $axi_ad9625_0_xcvr +ad_ip_instance util_adxcvr util_fmcadc5_1_xcvr +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.QPLL_FBDIV "0010000000" +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.CPLL_FBDIV 1 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.TX_NUM_OF_LANES 0 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.TX_OUT_DIV 2 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.TX_CLK25_DIV 10 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_NUM_OF_LANES 8 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_OUT_DIV 1 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_CLK25_DIV 25 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_DFE_LPM_CFG 0x0954 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_CDR_CFG 0x03000023ff20400020 +ad_ip_parameter util_fmcadc5_1_xcvr CONFIG.RX_PMA_CFG 0x00018480 -set axi_ad9625_1_xcvr [create_bd_cell -type ip -vlnv analog.com:user:axi_adxcvr:1.0 axi_ad9625_1_xcvr] -set_property -dict [list CONFIG.NUM_OF_LANES {8}] $axi_ad9625_1_xcvr -set_property -dict [list CONFIG.QPLL_ENABLE {0}] $axi_ad9625_1_xcvr -set_property -dict [list CONFIG.TX_OR_RX_N {0}] $axi_ad9625_1_xcvr -set_property -dict [list CONFIG.LPM_OR_DFE_N {0}] $axi_ad9625_1_xcvr -set_property -dict [list CONFIG.SYS_CLK_SEL {"00"}] $axi_ad9625_1_xcvr -set_property -dict [list CONFIG.OUT_CLK_SEL {"010"}] $axi_ad9625_1_xcvr +ad_ip_instance axi_adxcvr axi_ad9625_0_xcvr +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.NUM_OF_LANES 8 +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.QPLL_ENABLE 0 +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.TX_OR_RX_N 0 +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.LPM_OR_DFE_N 0 +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.SYS_CLK_SEL "00" +ad_ip_parameter axi_ad9625_0_xcvr CONFIG.OUT_CLK_SEL "010" -set axi_ad9625_0_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:7.0 axi_ad9625_0_jesd] -set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9625_0_jesd -set_property -dict [list CONFIG.C_LANES {8}] $axi_ad9625_0_jesd -set axi_ad9625_1_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:7.0 axi_ad9625_1_jesd] -set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9625_1_jesd -set_property -dict [list CONFIG.C_LANES {8}] $axi_ad9625_1_jesd +ad_ip_instance axi_adxcvr axi_ad9625_1_xcvr +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.NUM_OF_LANES 8 +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.QPLL_ENABLE 0 +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.TX_OR_RX_N 0 +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.LPM_OR_DFE_N 0 +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.SYS_CLK_SEL "00" +ad_ip_parameter axi_ad9625_1_xcvr CONFIG.OUT_CLK_SEL "010" -set axi_ad9625_0_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9625:1.0 axi_ad9625_0_core] -set_property -dict [list CONFIG.ID {0}] $axi_ad9625_0_core -set axi_ad9625_1_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9625:1.0 axi_ad9625_1_core] -set_property -dict [list CONFIG.ID {1}] $axi_ad9625_1_core +ad_ip_instance jesd204 axi_ad9625_0_jesd +ad_ip_parameter axi_ad9625_0_jesd CONFIG.C_NODE_IS_TRANSMIT 0 +ad_ip_parameter axi_ad9625_0_jesd CONFIG.C_LANES 8 -set util_ad9625_cpack [create_bd_cell -type ip -vlnv analog.com:user:util_cpack:1.0 util_ad9625_cpack] -set_property -dict [list CONFIG.CHANNEL_DATA_WIDTH {256}] $util_ad9625_cpack -set_property -dict [list CONFIG.NUM_OF_CHANNELS {2}] $util_ad9625_cpack +ad_ip_instance jesd204 axi_ad9625_1_jesd +ad_ip_parameter axi_ad9625_1_jesd CONFIG.C_NODE_IS_TRANSMIT 0 +ad_ip_parameter axi_ad9625_1_jesd CONFIG.C_LANES 8 -set axi_ad9625_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9625_dma] -set_property -dict [list CONFIG.DMA_TYPE_SRC {1}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.ID {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.AXI_SLICE_DEST {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_LENGTH_WIDTH {24}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {64}] $axi_ad9625_dma -set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad9625_dma +ad_ip_instance axi_ad9625 axi_ad9625_0_core +ad_ip_parameter axi_ad9625_0_core CONFIG.ID 0 + +ad_ip_instance axi_ad9625 axi_ad9625_1_core +ad_ip_parameter axi_ad9625_1_core CONFIG.ID 1 + +ad_ip_instance util_cpack util_ad9625_cpack +ad_ip_parameter util_ad9625_cpack CONFIG.CHANNEL_DATA_WIDTH 256 +ad_ip_parameter util_ad9625_cpack CONFIG.NUM_OF_CHANNELS 2 + +ad_ip_instance axi_dmac axi_ad9625_dma +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_TYPE_SRC 1 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_TYPE_DEST 0 +ad_ip_parameter axi_ad9625_dma CONFIG.ID 0 +ad_ip_parameter axi_ad9625_dma CONFIG.AXI_SLICE_SRC 0 +ad_ip_parameter axi_ad9625_dma CONFIG.AXI_SLICE_DEST 0 +ad_ip_parameter axi_ad9625_dma CONFIG.SYNC_TRANSFER_START 0 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_LENGTH_WIDTH 24 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_2D_TRANSFER 0 +ad_ip_parameter axi_ad9625_dma CONFIG.CYCLIC 0 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_SRC 64 +ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_DEST 64 # reference clocks & resets diff --git a/projects/fmcadc5/vc707/system_bd.tcl b/projects/fmcadc5/vc707/system_bd.tcl index e4718c626..fe61d4a95 100644 --- a/projects/fmcadc5/vc707/system_bd.tcl +++ b/projects/fmcadc5/vc707/system_bd.tcl @@ -10,18 +10,18 @@ source ../common/fmcadc5_bd.tcl # ila -set mfifo_adc [create_bd_cell -type ip -vlnv analog.com:user:util_mfifo:1.0 mfifo_adc] -set_property -dict [list CONFIG.NUM_OF_CHANNELS {1}] $mfifo_adc -set_property -dict [list CONFIG.DIN_DATA_WIDTH {512}] $mfifo_adc -set_property -dict [list CONFIG.ADDRESS_WIDTH {6}] $mfifo_adc +ad_ip_instance util_mfifo mfifo_adc +ad_ip_parameter mfifo_adc CONFIG.NUM_OF_CHANNELS 1 +ad_ip_parameter mfifo_adc CONFIG.DIN_DATA_WIDTH 512 +ad_ip_parameter mfifo_adc CONFIG.ADDRESS_WIDTH 6 -set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:6.1 ila_adc] -set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc -set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_adc -set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_adc -set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc -set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc -set_property -dict [list CONFIG.C_PROBE1_WIDTH {16}] $ila_adc +ad_ip_instance ila ila_adc +ad_ip_parameter ila_adc CONFIG.C_MONITOR_TYPE Native +ad_ip_parameter ila_adc CONFIG.C_TRIGIN_EN false +ad_ip_parameter ila_adc CONFIG.C_EN_STRG_QUAL 1 +ad_ip_parameter ila_adc CONFIG.C_NUM_OF_PROBES 2 +ad_ip_parameter ila_adc CONFIG.C_PROBE0_WIDTH 1 +ad_ip_parameter ila_adc CONFIG.C_PROBE1_WIDTH 16 ad_connect util_fmcadc5_0_xcvr/rx_out_clk_0 mfifo_adc/din_clk ad_connect axi_ad9625_0_jesd_rstgen/peripheral_reset mfifo_adc/din_rst