zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

jesd204/ad_ip_jesd204_tpl_adc: add support for more lanes and converters

main
Laszlo Nagy 2019-11-15 13:12:58 +00:00 committed by Laszlo Nagy
parent db573a59b0
commit 002f8d8a3e
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_ip.tcl
View File

@ -68,8 +68,8 @@ adi_add_bus "link" "master" \
adi_add_bus_clock "link_clk" "link"
foreach {p v} {
"NUM_LANES" "1 2 3 4 8" \
"NUM_CHANNELS" "1 2 4 6 8" \
"NUM_LANES" "1 2 3 4 8 16" \
"NUM_CHANNELS" "1 2 4 6 8 16 32" \
"BITS_PER_SAMPLE" "8 12 16" \
"CONVERTER_RESOLUTION" "8 11 12 16" \
"SAMPLES_PER_FRAME" "1 2 3 4 6 8 12 16" \

4
library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_regmap.v
View File

@ -255,8 +255,8 @@ module ad_ip_jesd204_tpl_adc_regmap #(
genvar i;
for (i = 0; i < NUM_CHANNELS; i = i + 1) begin: g_channel
up_adc_channel #(
.COMMON_ID (6'h1),
.CHANNEL_ID (i),
.COMMON_ID (6'h1 + i/16),
.CHANNEL_ID (i % 16),
.USERPORTS_DISABLE (1),
.DCFILTER_DISABLE (1),
.IQCORRECTION_DISABLE (1)