ad9625x2_fmc: Add a separate SPI for the DAC interface
DAC spi interface is controlled by an axi_spi core. Modifications on GPIO layout: pwr_good is 12, vdither 13 and trig is 14.main
Istvan Csomortani
parent
2e611ca013
commit
0007054638
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@ -24,6 +24,7 @@ set rx_sysref [create_bd_port -dir O rx_sysref]
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set ad9625_spi_intr [create_bd_port -dir O ad9625_spi_intr]
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set ad9625_gpio_intr [create_bd_port -dir O ad9625_gpio_intr]
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set ad9625_dma_intr [create_bd_port -dir O ad9625_dma_intr]
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set dac_spi_intr [create_bd_port -dir O dac_spi_intr]
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set gpio_ad9625_i [create_bd_port -dir I -from 18 -to 0 gpio_ad9625_i]
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set gpio_ad9625_o [create_bd_port -dir O -from 18 -to 0 gpio_ad9625_o]
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@ -39,6 +40,16 @@ set adc_data_1 [create_bd_port -dir O -from 255 -to 0 adc_data_1]
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set adc_wr [create_bd_port -dir I adc_wr]
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set adc_wdata [create_bd_port -dir I -from 511 -to 0 adc_wdata]
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# dac spi interface
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set dac_sync_o [create_bd_port -dir O -from 1 -to 0 dac_sync_o]
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set dac_sync_i [create_bd_port -dir I -from 1 -to 0 dac_sync_i]
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set dac_clk_o [create_bd_port -dir O dac_clk_o]
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set dac_clk_i [create_bd_port -dir I dac_clk_i]
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set dac_do_o [create_bd_port -dir O dac_do_o]
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set dac_do_i [create_bd_port -dir I dac_do_i]
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set dac_di_i [create_bd_port -dir I dac_di_i]
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# adc peripherals
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set axi_ad9625_0_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9625:1.0 axi_ad9625_0_core]
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@ -91,7 +102,7 @@ set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9625_dma
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set axi_ad9625_gpio [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_gpio:2.0 axi_ad9625_gpio]
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set_property -dict [list CONFIG.C_IS_DUAL {0}] $axi_ad9625_gpio
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set_property -dict [list CONFIG.C_GPIO_WIDTH {19}] $axi_ad9625_gpio
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set_property -dict [list CONFIG.C_GPIO_WIDTH {15}] $axi_ad9625_gpio
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set_property -dict [list CONFIG.C_INTERRUPT_PRESENT {1}] $axi_ad9625_gpio
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set axi_ad9625_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_ad9625_spi]
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@ -100,10 +111,15 @@ set_property -dict [list CONFIG.C_NUM_SS_BITS {2}] $axi_ad9625_spi
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set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_ad9625_spi
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p_sys_dmafifo [current_bd_instance .] axi_ad9625_fifo 512 10
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set axi_dac_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_dac_spi]
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set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_dac_spi
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set_property -dict [list CONFIG.C_NUM_SS_BITS {2}] $axi_dac_spi
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set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_dac_spi
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# additions to default configuration
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set_property -dict [list CONFIG.NUM_MI {16}] $axi_cpu_interconnect
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set_property -dict [list CONFIG.NUM_MI {17}] $axi_cpu_interconnect
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set_property -dict [list CONFIG.NUM_SI {11}] $axi_mem_interconnect
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# connections (spi and gpio)
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@ -116,11 +132,20 @@ connect_bd_net -net spi_sdo_i [get_bd_ports spi_sdo_i] [get_bd_pins axi_a
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connect_bd_net -net spi_sdo_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_ad9625_spi/io0_o]
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connect_bd_net -net spi_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_ad9625_spi/io1_i]
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connect_bd_net -net dac_sync_i [get_bd_ports dac_sync_i] [get_bd_pins axi_dac_spi/ss_i]
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connect_bd_net -net dac_sync_o [get_bd_ports dac_sync_o] [get_bd_pins axi_dac_spi/ss_o]
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connect_bd_net -net dac_clk_i [get_bd_ports dac_clk_i] [get_bd_pins axi_dac_spi/sck_i]
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connect_bd_net -net dac_clk_o [get_bd_ports dac_clk_o] [get_bd_pins axi_dac_spi/sck_o]
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connect_bd_net -net dac_do_i [get_bd_ports dac_do_i] [get_bd_pins axi_dac_spi/io0_i]
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connect_bd_net -net dac_do_o [get_bd_ports dac_do_o] [get_bd_pins axi_dac_spi/io0_o]
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connect_bd_net -net dac_di_i [get_bd_ports dac_di_i] [get_bd_pins axi_dac_spi/io1_i]
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connect_bd_net -net gpio_ad9625_i [get_bd_ports gpio_ad9625_i] [get_bd_pins axi_ad9625_gpio/gpio_io_i]
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connect_bd_net -net gpio_ad9625_o [get_bd_ports gpio_ad9625_o] [get_bd_pins axi_ad9625_gpio/gpio_io_o]
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connect_bd_net -net gpio_ad9625_t [get_bd_ports gpio_ad9625_t] [get_bd_pins axi_ad9625_gpio/gpio_io_t]
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connect_bd_net -net axi_ad9625_spi_irq [get_bd_pins axi_ad9625_spi/ip2intc_irpt] [get_bd_ports ad9625_spi_intr]
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connect_bd_net -net axi_dac_spi_irq [get_bd_pins axi_dac_spi/ip2intc_irpt] [get_bd_ports dac_spi_intr]
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connect_bd_net -net axi_ad9625_gpio_irq [get_bd_pins axi_ad9625_gpio/ip2intc_irpt] [get_bd_ports ad9625_gpio_intr]
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# connections (gt)
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@ -204,6 +229,7 @@ connect_bd_intf_net -intf_net axi_cpu_interconnect_m12_axi [get_bd_intf_pins axi
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m13_axi [get_bd_intf_pins axi_cpu_interconnect/M13_AXI] [get_bd_intf_pins axi_ad9625_1_core/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m14_axi [get_bd_intf_pins axi_cpu_interconnect/M14_AXI] [get_bd_intf_pins axi_ad9625_1_jesd/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m15_axi [get_bd_intf_pins axi_cpu_interconnect/M15_AXI] [get_bd_intf_pins axi_ad9625_1_gt/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m16_axi [get_bd_intf_pins axi_cpu_interconnect/M16_AXI] [get_bd_intf_pins axi_dac_spi/axi_lite]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source
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@ -213,6 +239,7 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M12_ACLK] $sy
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M13_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M14_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M15_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M16_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_0_gt/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_0_core/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_0_jesd/s_axi_aclk]
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@ -223,6 +250,8 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_gpio/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_1_gt/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_1_core/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_1_jesd/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_dac_spi/s_axi_aclk]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_dac_spi/ext_spi_clk]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source
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@ -232,6 +261,7 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M12_ARESET
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M13_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M14_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M15_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M16_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_0_gt/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_0_core/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_0_jesd/s_axi_aresetn]
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@ -241,6 +271,7 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_gpio/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_1_gt/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_1_core/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9625_1_jesd/s_axi_aresetn]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_dac_spi/s_axi_aresetn]
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# interconnect (gt es)
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@ -291,6 +322,8 @@ create_bd_addr_seg -range 0x00001000 -offset 0x44b91000 $sys_addr_cntrl_space [g
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create_bd_addr_seg -range 0x00010000 -offset 0x7c420000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9625_dma/s_axi/axi_lite] SEG_data_ad9625_dma
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create_bd_addr_seg -range 0x00010000 -offset 0x44a70000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9625_spi/axi_lite/Reg] SEG_data_ad9625_spi
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create_bd_addr_seg -range 0x00010000 -offset 0x40030000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9625_gpio/s_axi/Reg] SEG_data_ad9625_gpio
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create_bd_addr_seg -range 0x00010000 -offset 0x44a80000 $sys_addr_cntrl_space [get_bd_addr_segs axi_dac_spi/axi_lite/Reg] SEG_data_dac_spi
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create_bd_addr_seg -range $sys_mem_size -offset 0x80000000 [get_bd_addr_spaces axi_ad9625_dma/m_dest_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl
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create_bd_addr_seg -range $sys_mem_size -offset 0x80000000 [get_bd_addr_spaces axi_ad9625_0_gt/m_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl
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@ -223,15 +223,16 @@ module system_top (
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inout spi_sdio;
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output spi_dirn;
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output dac_clk;
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output dac_data;
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output dac_sync_0;
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output dac_sync_1;
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input trig_p;
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input trig_n;
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output vdither_p;
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output vdither_n;
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inout pwr_good;
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inout dac_clk;
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inout dac_data;
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inout dac_sync_0;
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inout dac_sync_1;
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inout fd_1;
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inout irq_1;
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inout fd_0;
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@ -344,22 +345,18 @@ module system_top (
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IBUFDS i_ibufds_trig (
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.I (trig_p),
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.IB (trig_n),
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.O (gpio_i[18]));
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.O (gpio_i[14]));
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OBUFDS i_obufds_vdither (
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.I (gpio_o[17]),
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.I (gpio_o[13]),
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.O (vdither_p),
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.OB (vdither_n));
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ad_iobuf #(.DATA_WIDTH(17)) i_iobuf (
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.dt (gpio_t[16:0]),
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.di (gpio_o[16:0]),
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.do (gpio_i[16:0]),
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.dio ({ pwr_good, // 16
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dac_clk, // 15
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dac_data, // 14
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dac_sync_0, // 13
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dac_sync_1, // 12
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ad_iobuf #(.DATA_WIDTH(13)) i_iobuf (
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.dt (gpio_t[12:0]),
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.di (gpio_o[12:0]),
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.do (gpio_i[12:0]),
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.dio ({ pwr_good, // 12
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fd_1, // 11
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irq_1, // 10
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fd_0, // 9
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@ -485,7 +482,14 @@ module system_top (
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.sys_clk_p (sys_clk_p),
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.sys_rst (sys_rst),
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.uart_sin (uart_sin),
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.uart_sout (uart_sout));
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.uart_sout (uart_sout),
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.dac_sync_o ({dac_sync_1, dac_sync_0}),
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.dac_sync_i (2'b11),
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.dac_clk_o (dac_clk),
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.dac_clk_i (1'b0),
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.dac_do_o (dac_data),
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.dac_do_i (1'b0),
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.dac_di_i (1'b0));
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endmodule
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