2014-12-21 02:09:20 +00:00
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# constraints
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# ad9361
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2014-12-23 19:03:17 +00:00
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set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_p]
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set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_n]
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set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_p]
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set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_n]
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set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[0]]
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set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[0]]
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set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[1]]
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set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[1]]
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set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[2]]
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set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[2]]
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set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[3]]
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set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[3]]
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set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[4]]
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set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[4]]
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set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[5]]
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set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[5]]
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set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVDS} [get_ports tx_clk_out_p]
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set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVDS} [get_ports tx_clk_out_n]
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set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVDS} [get_ports tx_frame_out_p]
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set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVDS} [get_ports tx_frame_out_n]
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set_property -dict {PACKAGE_PIN M6 IOSTANDARD LVDS} [get_ports tx_data_out_p[0]]
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set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVDS} [get_ports tx_data_out_n[0]]
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set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVDS} [get_ports tx_data_out_p[1]]
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set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVDS} [get_ports tx_data_out_n[1]]
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set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVDS} [get_ports tx_data_out_p[2]]
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set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVDS} [get_ports tx_data_out_n[2]]
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set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVDS} [get_ports tx_data_out_p[3]]
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set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVDS} [get_ports tx_data_out_n[3]]
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set_property -dict {PACKAGE_PIN N4 IOSTANDARD LVDS} [get_ports tx_data_out_p[4]]
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set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVDS} [get_ports tx_data_out_n[4]]
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set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVDS} [get_ports tx_data_out_p[5]]
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set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVDS} [get_ports tx_data_out_n[5]]
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2014-12-21 02:09:20 +00:00
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2014-12-23 19:03:17 +00:00
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set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS18} [get_ports gpio_status[0]]
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set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS18} [get_ports gpio_status[1]]
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set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS18} [get_ports gpio_status[2]]
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set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS18} [get_ports gpio_status[3]]
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set_property -dict {PACKAGE_PIN M8 IOSTANDARD LVCMOS18} [get_ports gpio_status[4]]
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set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS18} [get_ports gpio_status[5]]
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set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS18} [get_ports gpio_status[6]]
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set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS18} [get_ports gpio_status[7]]
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set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[0]]
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set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[1]]
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set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[2]]
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set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[3]]
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set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS18} [get_ports gpio_en_agc]
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set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS18} [get_ports gpio_sync]
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set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports gpio_resetb]
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set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS18} [get_ports gpio_enable]
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set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS18} [get_ports gpio_txnrx]
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set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports gpio_clksel]
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2014-12-21 02:09:20 +00:00
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2014-12-23 19:03:17 +00:00
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set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18 PULLTYPE PULLUP} [get_ports spi_csn]
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set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS18} [get_ports spi_clk]
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set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports spi_mosi]
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set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports spi_miso]
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2014-12-21 02:09:20 +00:00
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# clocks
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create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p]
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create_clock -name ad9361_clk -period 4 [get_pins i_system_wrapper/system_i/axi_ad9361/clk]
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