pluto_hdl_adi/library/controllerperipheralhdladi_pcore/Chart.v

// -------------------------------------------------------------
// 
// File Name: hdl_prj\hdlsrc\controllerPeripheralHdlAdi\Chart.v
// Created: 2014-09-08 14:12:09
// 
// Generated by MATLAB 8.2 and HDL Coder 3.3
// 
// -------------------------------------------------------------


// -------------------------------------------------------------
// 
// Module: Chart
// Source Path: controllerPeripheralHdlAdi/PWM/Chart
// Hierarchy Level: 2
// 
// -------------------------------------------------------------

`timescale 1 ns / 1 ns

module Chart
          (
           CLK_IN,
           reset,
           enb,
           CounterMax,
           count
          );


  input   CLK_IN;
  input   reset;
  input   enb;
  input   [15:0] CounterMax;  // uint16
  output  [15:0] count;  // uint16

  parameter IN_COUNT_Down = 0, IN_COUNT_UP = 1;

  reg [1:0] is_libPwmCompareToPinsHdl_c1_Chart;  // uint8
  reg [15:0] count_reg;  // uint16
  reg [1:0] is_libPwmCompareToPinsHdl_c1_Chart_next;  // enumerated type (2 enums)
  reg [15:0] count_reg_next;  // uint16
  reg [16:0] add_temp_1;  // ufix17
  reg signed [16:0] sub_temp_1;  // sfix17


  always @(posedge CLK_IN)
    begin : libPwmCompareToPinsHdl_c1_Chart_process
      if (reset == 1'b1) begin
        //Entry: PWM_HDL/Chart
        //Entry Internal: PWM_HDL/Chart
        //Transition: '<S13>:5'
        count_reg <= 16'd0;
        is_libPwmCompareToPinsHdl_c1_Chart <= IN_COUNT_UP;
      end
      else if (enb) begin
        is_libPwmCompareToPinsHdl_c1_Chart <= is_libPwmCompareToPinsHdl_c1_Chart_next;
        count_reg <= count_reg_next;
      end
    end

  always @(is_libPwmCompareToPinsHdl_c1_Chart, CounterMax, count_reg) begin
    is_libPwmCompareToPinsHdl_c1_Chart_next = is_libPwmCompareToPinsHdl_c1_Chart;
    count_reg_next = count_reg;
    //Gateway: PWM_HDL/Chart
    //During: PWM_HDL/Chart

    case ( is_libPwmCompareToPinsHdl_c1_Chart)
      IN_COUNT_Down :
        begin
          //During 'COUNT_Down': '<S13>:2'
          if (count_reg <= 16'b0000000000000000) begin
            //Transition: '<S13>:4'
            is_libPwmCompareToPinsHdl_c1_Chart_next = IN_COUNT_UP;
          end
          else begin
            sub_temp_1 = $signed({1'b0, count_reg}) - 1;
            if (sub_temp_1[16] == 1'b1) begin
              count_reg_next = 16'b0000000000000000;
            end
            else begin
              count_reg_next = sub_temp_1[15:0];
            end
          end
        end
      default :
        begin
          //During 'COUNT_UP': '<S13>:1'
          if (count_reg >= CounterMax) begin
            //Transition: '<S13>:3'
            is_libPwmCompareToPinsHdl_c1_Chart_next = IN_COUNT_Down;
          end
          else begin
            add_temp_1 = count_reg + 1;
            if (add_temp_1[16] != 1'b0) begin
              count_reg_next = 16'b1111111111111111;
            end
            else begin
              count_reg_next = add_temp_1[15:0];
            end
          end
        end
    endcase

  end

  assign count = count_reg_next;



endmodule  // Chart