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pluto_hdl_adi/projects/adrv9371x/zcu102/system_bd.tcl

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adrv9371x_zcu102: Initial commit
2017-08-22 12:48:03 +00:00
set dac_fifo_name axi_ad9371_dacfifo
set dac_fifo_address_width 10
set dac_data_width 128
set dac_dma_data_width 128
source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
ad_ip_parameter sys_ps8 CONFIG.PSU__FPGA_PL2_ENABLE 1
ad_ip_parameter sys_ps8 CONFIG.PSU__CRL_APB__PL2_REF_CTRL__SRCSEL {IOPLL}
adrv9371: Increase FCLK2 to 200MHz to support max sampling rates This fixes an issue seen when using 307.2 MSPS on the Observation RX. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2018-01-09 14:20:06 +00:00
ad_ip_parameter sys_ps8 CONFIG.PSU__CRL_APB__PL2_REF_CTRL__FREQMHZ 200
adrv9371x_zcu102: Initial commit
2017-08-22 12:48:03 +00:00
source ../common/adrv9371x_bd.tcl
ad_connect sys_dma_clk sys_ps8/pl_clk2
ad_connect sys_dma_rstgen/ext_reset_in sys_rstgen/peripheral_reset
adrv9371x: Set correct transceiver type for UltraScale projects Make sure that the axi_adxcvr instances are configured with the same transceiver type as the util_adxcvr. This is necessary for software to be able to detect the transceiver type and support dynamic reconfiguration. It is also necessary for correct eye scan support in the axi_adxcvr block. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-11-10 16:11:46 +00:00
ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.XCVR_TYPE 2
ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.XCVR_TYPE 2
ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.XCVR_TYPE 2
adrv9371x_zcu102: Initial commit
2017-08-22 12:48:03 +00:00
ad_ip_parameter util_ad9371_xcvr CONFIG.XCVR_TYPE 2
adrv9371x: zcu102: Fix QPLL feedback divider The external reference clock runs at 122.88 MHz by default. This means that the QPLL feedback divider needs to be set to 80 so that the VCO is inside the locking range (9.8 GHz - 16.375 GHz). Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-11-10 16:03:29 +00:00
ad_ip_parameter util_ad9371_xcvr CONFIG.QPLL_FBDIV 80
adrv9371x_zcu102: Initial commit
2017-08-22 12:48:03 +00:00
ad_ip_parameter util_ad9371_xcvr CONFIG.QPLL_REFCLK_DIV 1