2023-07-06 12:08:22 +00:00
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###############################################################################
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## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
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# SPDX short identifier: ADIBSD
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###############################################################################
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2019-04-12 14:29:52 +00:00
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<: setFileUsedIn { out_of_context synthesis implementation } :>
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<: ;#Component and file information :>
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<: set ComponentName [getComponentNameString] :>
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<: setOutputDirectory "./" :>
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<: setFileName $ComponentName :>
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<: setFileExtension "_ooc.xdc" :>
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# This XDC is used only for OOC mode of synthesis, implementation.
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# These are default values for timing driven synthesis during OOC flow.
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# These values will be overwritten during implementation with information
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# from top level.
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create_clock -name clk -period 10 [get_ports clk]
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################################################################################
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