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pluto_hdl_adi/projects/common/microzed/microzed_system_bd.tcl

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uzed: zed-copy
2016-01-11 18:53:22 +00:00
# create board design
# interface ports
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr
create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 fixed_io
create_bd_port -dir O spi0_csn_2_o
create_bd_port -dir O spi0_csn_1_o
create_bd_port -dir O spi0_csn_0_o
create_bd_port -dir I spi0_csn_i
create_bd_port -dir I spi0_clk_i
create_bd_port -dir O spi0_clk_o
create_bd_port -dir I spi0_sdo_i
create_bd_port -dir O spi0_sdo_o
create_bd_port -dir I spi0_sdi_i
create_bd_port -dir O spi1_csn_2_o
create_bd_port -dir O spi1_csn_1_o
create_bd_port -dir O spi1_csn_0_o
create_bd_port -dir I spi1_csn_i
create_bd_port -dir I spi1_clk_i
create_bd_port -dir O spi1_clk_o
create_bd_port -dir I spi1_sdo_i
create_bd_port -dir O spi1_sdo_o
create_bd_port -dir I spi1_sdi_i
create_bd_port -dir I -from 63 -to 0 gpio_i
create_bd_port -dir O -from 63 -to 0 gpio_o
create_bd_port -dir O -from 63 -to 0 gpio_t
# instance: sys_ps7
microzed: ip automatic version update
2017-04-14 14:24:24 +00:00
ad_ip_instance processing_system7 sys_ps7
common: Rename uzed to microzed Everybody calls the MicroZed microzed in their projects. Don't deviate from that to avoid potential confusion. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:18:09 +00:00
source $ad_hdl_dir/projects/common/microzed/microzed_system_ps7.tcl
microzed: ip automatic version update
2017-04-14 14:24:24 +00:00
ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE 0
ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE 1
ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_IO 64
ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_PERIPHERAL_ENABLE 1
ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_SPI0_IO EMIO
ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_PERIPHERAL_ENABLE 1
ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_SPI1_IO EMIO
ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
common/microzed: Enable PS CLK1 = 200MHz
2017-09-25 12:16:58 +00:00
ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK1_PORT 1
microzed: Add a secondary 200 MHz clock for PS7
2017-08-18 07:14:21 +00:00
ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ 200.0
microzed: ip automatic version update
2017-04-14 14:24:24 +00:00
ad_ip_parameter sys_ps7 CONFIG.PCW_USE_FABRIC_INTERRUPT 1
ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_MODE REVERSE
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
microzed: ip automatic version update
2017-04-14 14:24:24 +00:00
ad_ip_instance xlconcat sys_concat_intc
ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
microzed: ip automatic version update
2017-04-14 14:24:24 +00:00
ad_ip_instance proc_sys_reset sys_rstgen
ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
# interrupts
create_bd_port -dir I -type intr ps_intr_00
create_bd_port -dir I -type intr ps_intr_01
create_bd_port -dir I -type intr ps_intr_02
create_bd_port -dir I -type intr ps_intr_03
create_bd_port -dir I -type intr ps_intr_04
create_bd_port -dir I -type intr ps_intr_05
create_bd_port -dir I -type intr ps_intr_06
create_bd_port -dir I -type intr ps_intr_07
create_bd_port -dir I -type intr ps_intr_08
create_bd_port -dir I -type intr ps_intr_09
create_bd_port -dir I -type intr ps_intr_10
create_bd_port -dir I -type intr ps_intr_11
create_bd_port -dir I -type intr ps_intr_12
create_bd_port -dir I -type intr ps_intr_13
create_bd_port -dir I -type intr ps_intr_14
create_bd_port -dir I -type intr ps_intr_15
# system reset/clock definitions
ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0
microzed: Add a secondary 200 MHz clock for PS7
2017-08-18 07:14:21 +00:00
ad_connect sys_200m_clk sys_ps7/FCLK_CLK1
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
uzed: zed-copy
2016-01-11 18:53:22 +00:00
# interface connections
ad_connect ddr sys_ps7/DDR
ad_connect gpio_i sys_ps7/GPIO_I
ad_connect gpio_o sys_ps7/GPIO_O
ad_connect gpio_t sys_ps7/GPIO_T
ad_connect fixed_io sys_ps7/FIXED_IO
# spi connections
ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
ad_connect spi0_csn_0_o sys_ps7/SPI0_SS_O
ad_connect spi0_csn_i sys_ps7/SPI0_SS_I
ad_connect spi0_clk_i sys_ps7/SPI0_SCLK_I
ad_connect spi0_clk_o sys_ps7/SPI0_SCLK_O
ad_connect spi0_sdo_i sys_ps7/SPI0_MOSI_I
ad_connect spi0_sdo_o sys_ps7/SPI0_MOSI_O
ad_connect spi0_sdi_i sys_ps7/SPI0_MISO_I
ad_connect spi1_csn_2_o sys_ps7/SPI1_SS2_O
ad_connect spi1_csn_1_o sys_ps7/SPI1_SS1_O
ad_connect spi1_csn_0_o sys_ps7/SPI1_SS_O
ad_connect spi1_csn_i sys_ps7/SPI1_SS_I
ad_connect spi1_clk_i sys_ps7/SPI1_SCLK_I
ad_connect spi1_clk_o sys_ps7/SPI1_SCLK_O
ad_connect spi1_sdo_i sys_ps7/SPI1_MOSI_I
ad_connect spi1_sdo_o sys_ps7/SPI1_MOSI_O
ad_connect spi1_sdi_i sys_ps7/SPI1_MISO_I
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
# interrupts
uzed: zed-copy
2016-01-11 18:53:22 +00:00
common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 19:09:35 +00:00
ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P
ad_connect sys_concat_intc/In15 ps_intr_15
ad_connect sys_concat_intc/In14 ps_intr_14
ad_connect sys_concat_intc/In13 ps_intr_13
ad_connect sys_concat_intc/In12 ps_intr_12
ad_connect sys_concat_intc/In11 ps_intr_11
ad_connect sys_concat_intc/In10 ps_intr_10
ad_connect sys_concat_intc/In9 ps_intr_09
ad_connect sys_concat_intc/In8 ps_intr_08
ad_connect sys_concat_intc/In7 ps_intr_07
ad_connect sys_concat_intc/In6 ps_intr_06
ad_connect sys_concat_intc/In5 ps_intr_05
ad_connect sys_concat_intc/In4 ps_intr_04
ad_connect sys_concat_intc/In3 ps_intr_03
ad_connect sys_concat_intc/In2 ps_intr_02
ad_connect sys_concat_intc/In1 ps_intr_01
ad_connect sys_concat_intc/In0 ps_intr_00