2016-09-21 09:28:06 +00:00
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# create a SPI Engine architecture
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2016-10-28 08:04:21 +00:00
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2016-09-21 09:28:06 +00:00
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create_bd_cell -type hier spi
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current_bd_instance /spi
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2016-10-28 08:04:21 +00:00
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create_bd_pin -dir I -type clk clk
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create_bd_pin -dir I -type rst resetn
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create_bd_pin -dir O irq
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create_bd_pin -dir O dma_clk
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create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
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create_bd_intf_pin -mode Master -vlnv analog.com:interface:fifo_rd_rtl:1.1 dac_data
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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set spi_engine [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_execution:1.0 execution]
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set axi_spi_engine [create_bd_cell -type ip -vlnv analog.com:user:axi_spi_engine:1.0 axi]
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set axi_ad5766_seq [create_bd_cell -type ip -vlnv analog.com:user:axi_ad5766:1.0 axi_ad5766]
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set spi_engine_interconnect [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_interconnect:1.0 interconnect]
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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set_property -dict [list CONFIG.NUM_OF_CS 1] $spi_engine
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set_property -dict [list CONFIG.NUM_OFFLOAD 1] $axi_spi_engine
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set_property -dict [list CONFIG.NUM_OF_SDI 2] $spi_engine_interconnect
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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ad_connect axi/spi_engine_offload_ctrl0 axi_ad5766/spi_engine_offload_ctrl
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ad_connect axi/spi_engine_ctrl interconnect/s0_ctrl
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ad_connect axi_ad5766/spi_engine_ctrl interconnect/s1_ctrl
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ad_connect interconnect/m_ctrl execution/ctrl
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ad_connect m_spi execution/spi
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ad_connect dac_data axi_ad5766/dma_fifo_tx
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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ad_connect clk execution/clk
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ad_connect clk axi/s_axi_aclk
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ad_connect clk axi_ad5766/s_axi_aclk
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ad_connect clk axi_ad5766/spi_clk
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ad_connect clk axi_ad5766/ctrl_clk
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ad_connect clk axi/spi_clk
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ad_connect clk interconnect/clk
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ad_connect dma_clk axi_ad5766/dma_clk
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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ad_connect axi/spi_resetn axi_ad5766/spi_resetn
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ad_connect axi/spi_resetn execution/resetn
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ad_connect axi/spi_resetn interconnect/resetn
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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ad_connect resetn axi/s_axi_aresetn
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ad_connect resetn axi_ad5766/s_axi_aresetn
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ad_connect irq axi/irq
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2016-09-21 09:28:06 +00:00
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current_bd_instance /
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ad_connect sys_cpu_clk spi/clk
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ad_connect sys_cpu_resetn spi/resetn
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create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 spi
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ad_connect spi/m_spi spi
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2016-10-28 08:04:21 +00:00
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set axi_ad5766_dac_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad5766_dac_dma]
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set_property -dict [list CONFIG.DMA_TYPE_SRC {0}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.DMA_TYPE_DEST {2}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.CYCLIC {1}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.AXI_SLICE_DEST {1}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad5766_dac_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad5766_dac_dma
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ad_connect spi/dma_clk axi_ad5766_dac_dma/fifo_rd_clk
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ad_connect spi/dac_data axi_ad5766_dac_dma/fifo_rd
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ad_cpu_interconnect 0x44a00000 spi/axi
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ad_cpu_interconnect 0x44a10000 spi/axi_ad5766
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ad_cpu_interconnect 0x44a20000 axi_ad5766_dac_dma
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ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
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ad_mem_hp1_interconnect sys_cpu_clk axi_ad5766_dac_dma/m_src_axi
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ad_connect sys_cpu_resetn axi_ad5766_dac_dma/m_src_axi_aresetn
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2016-09-21 09:28:06 +00:00
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2016-10-28 08:04:21 +00:00
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ad_cpu_interrupt ps-12 mb-13 spi/irq
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ad_cpu_interrupt ps-13 mb-12 axi_ad5766_dac_dma/irq
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2016-09-21 09:28:06 +00:00
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