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pluto_hdl_adi/projects/adaq7980_sdz/zed/system_bd.tcl

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adaq7980_sdz: Initial commit The device is interfaced with a SPI Engine, the PD lines are controlled by GPIOs.
2017-01-04 10:23:56 +00:00
source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
adaq7980: Expouse the ADC sampling rate in system_bd.tcl This way the user do not need to modify the block design, just set the required rate in system_bd.tcl. This commit does not contain any functional changes.
2018-03-22 12:06:46 +00:00
# specify ADC sampling rate in samples/seconds -- default is 1 MSPS
set adc_sampling_rate 1000000
adaq7980_sdz: Initial commit The device is interfaced with a SPI Engine, the PD lines are controlled by GPIOs.
2017-01-04 10:23:56 +00:00
source ../common/adaq7980_bd.tcl