2019-11-25 08:04:51 +00:00
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source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
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ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_ENET0_IO EMIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_GRP_MDIO_IO EMIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_PERIPHERAL_FREQMHZ {100 Mbps}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET1_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET1_GRP_MDIO_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET1_PERIPHERAL_FREQMHZ {100 Mbps}
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create_bd_port -dir O reset_a
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create_bd_port -dir O reset_b
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create_bd_port -dir I ref_clk_50_a
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create_bd_port -dir I ref_clk_50_b
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:rmii_rtl:1.0 RMII_PHY_M_0
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:rmii_rtl:1.0 RMII_PHY_M_1
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make_bd_intf_pins_external [get_bd_intf_pins sys_ps7/MDIO_ETHERNET_0]
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make_bd_intf_pins_external [get_bd_intf_pins sys_ps7/MDIO_ETHERNET_1]
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ad_ip_instance mii_to_rmii mii_to_rmii_0
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ad_ip_parameter mii_to_rmii_0 CONFIG.C_MODE 1
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ad_ip_parameter mii_to_rmii_0 CONFIG.C_SPEED_100 1
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ad_ip_parameter mii_to_rmii_0 CONFIG.C_FIXED_SPEED 0
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ad_connect mii_to_rmii_0/GMII sys_ps7/GMII_ETHERNET_0
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ad_connect mii_to_rmii_0/ref_clk ref_clk_50_a
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ad_connect mii_to_rmii_0/RMII_PHY_M RMII_PHY_M_0
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ad_ip_instance mii_to_rmii mii_to_rmii_1
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ad_ip_parameter mii_to_rmii_1 CONFIG.C_MODE 1
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ad_ip_parameter mii_to_rmii_1 CONFIG.C_SPEED_100 1
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ad_ip_parameter mii_to_rmii_1 CONFIG.C_FIXED_SPEED 0
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ad_connect mii_to_rmii_1/GMII sys_ps7/GMII_ETHERNET_1
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ad_connect mii_to_rmii_1/ref_clk ref_clk_50_b
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ad_connect mii_to_rmii_1/RMII_PHY_M RMII_PHY_M_1
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ad_ip_instance proc_sys_reset proc_sys_reset_eth0
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ad_connect proc_sys_reset_eth0/slowest_sync_clk ref_clk_50_a
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ad_connect proc_sys_reset_eth0/ext_reset_in sys_rstgen/peripheral_aresetn
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ad_connect proc_sys_reset_eth0/peripheral_reset reset_a
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ad_connect proc_sys_reset_eth0/peripheral_aresetn mii_to_rmii_0/rst_n
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ad_ip_instance proc_sys_reset proc_sys_reset_eth1
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ad_connect proc_sys_reset_eth1/slowest_sync_clk ref_clk_50_b
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ad_connect proc_sys_reset_eth1/ext_reset_in sys_rstgen/peripheral_aresetn
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ad_connect proc_sys_reset_eth1/peripheral_reset reset_b
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ad_connect proc_sys_reset_eth1/peripheral_aresetn mii_to_rmii_1/rst_n
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#system ID
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ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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2020-09-28 21:10:35 +00:00
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sysid_gen_sys_init_file
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2019-11-25 08:04:51 +00:00
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