2017-07-18 11:34:22 +00:00
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2022-07-12 11:06:15 +00:00
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source ../../../scripts/adi_env.tcl
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2018-08-14 08:44:56 +00:00
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source ../../scripts/adi_project_intel.tcl
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2017-07-18 11:34:22 +00:00
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2018-08-13 14:25:13 +00:00
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adi_project daq2_a10soc
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2017-07-18 11:34:22 +00:00
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source $ad_hdl_dir/projects/common/a10soc/a10soc_system_assign.tcl
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2017-10-12 11:16:05 +00:00
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source $ad_hdl_dir/projects/common/a10soc/a10soc_plddr4_assign.tcl
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2017-07-18 11:34:22 +00:00
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# files
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set_global_assignment -name VERILOG_FILE ../common/daq2_spi.v
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# lane interface
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# Note: This projects requires a hardware rework to function correctly.
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# The rework connects FMC header pins directly to the FPGA so that they can be
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# accessed by the fabric.
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#
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# Changes required:
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# R610: DNI -> R0
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# R611: DNI -> R0
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# R612: R0 -> DNI
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# R613: R0 -> DNI
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# R620: DNI -> R0
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# R632: DNI -> R0
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# R621: R0 -> DNI
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# R633: R0 -> DNI
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set_location_assignment PIN_R29 -to rx_ref_clk ; ## B20 FMCA_HPC_GBTCLK1_M2C_P
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set_location_assignment PIN_R28 -to "rx_ref_clk(n)" ; ## B21 FMCA_HPC_GBTCLK1_M2C_N
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set_location_assignment PIN_P31 -to rx_serial_data[0] ; ## A10 FMCA_HPC_DP3_M2C_P
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set_location_assignment PIN_P30 -to "rx_serial_data[0](n)"; ## A11 FMCA_HPC_DP3_M2C_N
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set_location_assignment PIN_T31 -to rx_serial_data[1] ; ## C06 FMCA_HPC_DP0_M2C_P
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set_location_assignment PIN_T30 -to "rx_serial_data[1](n)"; ## C07 FMCA_HPC_DP0_M2C_N
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set_location_assignment PIN_P35 -to rx_serial_data[2] ; ## A06 FMCA_HPC_DP2_M2C_P
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set_location_assignment PIN_P34 -to "rx_serial_data[2](n)"; ## A07 FMCA_HPC_DP2_M2C_N
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set_location_assignment PIN_R33 -to rx_serial_data[3] ; ## A02 FMCA_HPC_DP1_M2C_P
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set_location_assignment PIN_R32 -to "rx_serial_data[3](n)"; ## A03 FMCA_HPC_DP1_M2C_N
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set_location_assignment PIN_E12 -to rx_sync ; ## D08 FMCA_HPC_LA01_CC_P
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set_location_assignment PIN_E13 -to "rx_sync(n)" ; ## D09 FMCA_HPC_LA01_CC_N
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set_location_assignment PIN_C14 -to rx_sysref ; ## G09 FMCA_HPC_LA03_P
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set_location_assignment PIN_D14 -to "rx_sysref(n)" ; ## G10 FMCA_HPC_LA03_N
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set_location_assignment PIN_N29 -to tx_ref_clk ; ## D04 FMCA_HPC_GBTCLK0_M2C_P
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set_location_assignment PIN_N28 -to "tx_ref_clk(n)" ; ## D05 FMCA_HPC_GBTCLK0_M2C_N
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set_location_assignment PIN_K39 -to tx_serial_data[0] ; ## A30 FMCA_HPC_DP3_C2M_P (tx_data_p[0])
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set_location_assignment PIN_K38 -to "tx_serial_data[0](n)"; ## A31 FMCA_HPC_DP3_C2M_N (tx_data_n[0])
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set_location_assignment PIN_N37 -to tx_serial_data[1] ; ## C02 FMCA_HPC_DP0_C2M_P (tx_data_p[3])
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set_location_assignment PIN_N36 -to "tx_serial_data[1](n)"; ## C03 FMCA_HPC_DP0_C2M_N (tx_data_n[3])
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set_location_assignment PIN_L37 -to tx_serial_data[2] ; ## A26 FMCA_HPC_DP2_C2M_P (tx_data_p[1])
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set_location_assignment PIN_L36 -to "tx_serial_data[2](n)"; ## A27 FMCA_HPC_DP2_C2M_N (tx_data_n[1])
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set_location_assignment PIN_M39 -to tx_serial_data[3] ; ## A22 FMCA_HPC_DP1_C2M_P (tx_data_p[2])
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set_location_assignment PIN_M38 -to "tx_serial_data[3](n)"; ## A23 FMCA_HPC_DP1_C2M_N (tx_data_n[2])
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set_location_assignment PIN_C13 -to tx_sync ; ## H07 FMCA_HPC_LA02_P
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set_location_assignment PIN_D13 -to "tx_sync(n)" ; ## H08 FMCA_HPC_LA02_N
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set_location_assignment PIN_H12 -to tx_sysref ; ## H10 FMCA_HPC_LA04_P
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set_location_assignment PIN_H13 -to "tx_sysref(n)" ; ## H11 FMCA_HPC_LA04_N
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set_instance_assignment -name IO_STANDARD LVDS -to rx_ref_clk
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set_instance_assignment -name IO_STANDARD LVDS -to "rx_ref_clk(n)"
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set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to rx_serial_data
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set_instance_assignment -name IO_STANDARD LVDS -to rx_sync
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set_instance_assignment -name IO_STANDARD LVDS -to "rx_sync(n)"
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set_instance_assignment -name IO_STANDARD LVDS -to rx_sysref
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set_instance_assignment -name IO_STANDARD LVDS -to "rx_sysref(n)"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to rx_sysref
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set_instance_assignment -name IO_STANDARD LVDS -to tx_ref_clk
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set_instance_assignment -name IO_STANDARD LVDS -to "tx_ref_clk(n)"
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set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to tx_serial_data
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set_instance_assignment -name IO_STANDARD LVDS -to tx_sync
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set_instance_assignment -name IO_STANDARD LVDS -to "tx_sync(n)"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sync
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "tx_sync(n)"
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set_instance_assignment -name IO_STANDARD LVDS -to tx_sysref
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set_instance_assignment -name IO_STANDARD LVDS -to "tx_sysref(n)"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sysref
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "tx_sysref(n)"
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# Merge RX and TX into single transceiver
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for {set i 0} {$i < 4} {incr i} {
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set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_${i} -to rx_serial_data[${i}]
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set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_${i} -to tx_serial_data[${i}]
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}
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# gpio
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set_location_assignment PIN_A9 -to trig ; ## H13 FMCA_LA07_P
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set_location_assignment PIN_B9 -to "trig(n)" ; ## H14 FMCA_LA07_N
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set_location_assignment PIN_D9 -to adc_fdb ; ## H17 FMCA_LA11_N
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set_location_assignment PIN_C9 -to adc_fda ; ## H16 FMCA_LA11_P
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set_location_assignment PIN_M12 -to dac_irq ; ## G15 FMCA_LA12_P
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set_location_assignment PIN_K11 -to clkd_status[1] ; ## D18 FMCA_LA13_N
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set_location_assignment PIN_J11 -to clkd_status[0] ; ## D17 FMCA_LA13_P
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set_location_assignment PIN_A10 -to adc_pd ; ## C10 FMCA_LA06_P
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set_location_assignment PIN_N13 -to dac_txen ; ## G16 FMCA_LA12_N
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set_location_assignment PIN_A8 -to dac_reset ; ## C15 FMCA_LA10_N
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set_location_assignment PIN_B11 -to clkd_sync ; ## G12 FMCA_LA08_P
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set_instance_assignment -name IO_STANDARD LVDS -to trig
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set_instance_assignment -name IO_STANDARD LVDS -to "trig(n)"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to adc_fdb
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set_instance_assignment -name IO_STANDARD "1.8 V" -to adc_fda
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set_instance_assignment -name IO_STANDARD "1.8 V" -to dac_irq
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set_instance_assignment -name IO_STANDARD "1.8 V" -to clkd_status[0]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to clkd_status[1]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to adc_pd
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set_instance_assignment -name IO_STANDARD "1.8 V" -to dac_txen
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set_instance_assignment -name IO_STANDARD "1.8 V" -to dac_reset
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set_instance_assignment -name IO_STANDARD "1.8 V" -to clkd_sync
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# spi
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set_location_assignment PIN_F13 -to spi_csn_clk ; ## D11 FMCA_LA05_P
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set_location_assignment PIN_A7 -to spi_csn_dac ; ## C14 FMCA_LA10_P
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set_location_assignment PIN_A13 -to spi_csn_adc ; ## D15 FMCA_LA09_N
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set_location_assignment PIN_F14 -to spi_clk ; ## D12 FMCA_LA05_N
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set_location_assignment PIN_A12 -to spi_sdio ; ## D14 FMCA_LA09_P
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set_location_assignment PIN_B12 -to spi_dir ; ## G13 FMCA_LA08_N
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_csn_clk
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_csn_dac
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_csn_adc
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_clk
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_sdio
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set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_dir
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2020-09-24 14:55:31 +00:00
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# set optimization to get a better timing closure
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set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
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2017-07-18 11:34:22 +00:00
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execute_flow -compile
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