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pluto_hdl_adi/projects/ad_fmclidar1_ebz/a10soc/system_qsys.tcl

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ad_fmclidar1_ebz/a10soc: Initial commit Add initial support for Arria 10 SOC carrier.
2019-08-15 14:19:51 +00:00
# Configurable parameters
set SAMPLE_RATE_MHZ 1000.0
set NUM_OF_CHANNELS 4 ; # M
set SAMPLES_PER_FRAME 1 ; # S
set NUM_OF_LANES 4 ; # L
set ADC_RESOLUTION 8 ; # N & NP
set LANE_RATE [expr {($ADC_RESOLUTION * $NUM_OF_CHANNELS *$SAMPLE_RATE_MHZ * 1.25) / $NUM_OF_LANES}]
source $ad_hdl_dir/projects/common/a10soc/a10soc_system_qsys.tcl
source ../common/ad_fmclidar1_ebz_qsys.tcl
sysid: Upgrade framework, header/ip are now at 2/1.1.a Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl add git branch to internal use area; update log prints; update xilixn projects; fix cn0506 sysid script;
2020-10-09 14:28:10 +00:00
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
sysid_intel: Added sysid to intel projects
2020-08-18 20:52:39 +00:00
#system ID
set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "[pwd]/mem_init_sys.txt"
sysid: Remove cstring init string
2020-09-28 21:10:35 +00:00
sysid_gen_sys_init_file;
ad_fmclidar1_ebz/a10soc: Initial commit Add initial support for Arria 10 SOC carrier.
2019-08-15 14:19:51 +00:00
ad_fmclidar1_ebz:a10soc Fixed SPI communication on Arria 10 (#947) Signed-off-by: Liviu Adace <liviu.adace@analog.com>
2022-05-24 09:44:03 +00:00
#spi
set_instance_parameter_value sys_spi {clockPhase} {1}
ad_fmclidar1_ebz:a10soc Fixed problems with SPI communication with AD9094 (#951) Now CPH and CPOL are set to 1, also the SPI clock is set to 10MHz Signed-off-by: Liviu Adace <liviu.adace@analog.com>
2022-06-06 10:00:45 +00:00
set_instance_parameter_value sys_spi {clockPolarity} {1}