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pluto_hdl_adi/projects/daq3/a10gx/system_constr.sdc

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daq3/a10gx: copy
2015-12-10 14:41:37 +00:00
create_clock -period "10.000 ns" -name sys_clk_100mhz [get_ports {sys_clk}]
create_clock -period "2.000 ns" -name rx_ref_clk_500mhz [get_ports {rx_ref_clk}]
create_clock -period "2.000 ns" -name tx_ref_clk_500mhz [get_ports {tx_ref_clk}]
derive_pll_clocks
derive_clock_uncertainty
set_false_path -from [get_clocks {sys_clk_100mhz}] -to [get_clocks {\
daq3: A10GX, updated project to the TCL flow
2016-07-08 09:00:37 +00:00
i_system_bd|sys_ddr3_cntrl_phy_clk_0 \
i_system_bd|sys_ddr3_cntrl_phy_clk_1 \
i_system_bd|sys_ddr3_cntrl_phy_clk_2 \
i_system_bd|sys_ddr3_cntrl_phy_clk_l_0 \
i_system_bd|sys_ddr3_cntrl_phy_clk_l_1 \
i_system_bd|sys_ddr3_cntrl_phy_clk_l_2}]
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
set_false_path -from [get_clocks {sys_clk_100mhz}] -to [get_clocks {\
daq3: A10GX, updated project to the TCL flow
2016-07-08 09:00:37 +00:00
i_system_bd|sys_ddr3_cntrl_core_nios_clk}]
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
set_false_path -from [get_clocks {sys_clk_100mhz}]\
-through [get_nets *altera_jesd204_tx_csr_inst*]\
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
-to [get_clocks {i_system_bd|avl_ad9152_xcvr|alt_core_pll|outclk0}]
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
set_false_path -from [get_clocks {sys_clk_100mhz}]\
-through [get_nets *altera_jesd204_tx_ctl_inst*]\
daq3/a10gx/system_constr.sdc- fix typo
2017-02-01 21:41:21 +00:00
-to [get_clocks {i_system_bd|avl_ad9152_xcvr|alt_core_pll|outclk0}]
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
set_false_path -from [get_clocks {sys_clk_100mhz}]\
-through [get_nets *altera_jesd204_rx_csr_inst*]\
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
-to [get_clocks {i_system_bd|avl_ad9680_xcvr|alt_core_pll|outclk0}]
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
set_false_path -from [get_clocks {i_system_bd|avl_ad9152_xcvr|alt_core_pll|outclk0}]\
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
-through [get_nets *altera_jesd204_tx_csr_inst*]\
-to [get_clocks {sys_clk_100mhz}]
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
set_false_path -from [get_clocks {i_system_bd|avl_ad9152_xcvr|alt_core_pll|outclk0}]\
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
-through [get_nets *altera_jesd204_tx_ctl_inst*]\
-to [get_clocks {sys_clk_100mhz}]
daq3/a10gx: Update project to the new GT framework - Update common script - Update system_top, some port names were changed - Update constraint files
2016-10-10 10:36:48 +00:00
set_false_path -from [get_clocks {i_system_bd|avl_ad9680_xcvr|alt_core_pll|outclk0}]\
daq3/a10gx: updates
2016-05-27 12:37:26 +00:00
-through [get_nets *altera_jesd204_rx_csr_inst*]\
-to [get_clocks {sys_clk_100mhz}]