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pluto_hdl_adi/projects/common/xilinx/sys_dmafifo.tcl

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Add .gitattributes file Add .gitattributes file which sets up the eol encoding handling. This will make sure that we get a uniform eol encoding across different operating systems. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 09:04:19 +00:00
# sys bram (use only when dma is not capable of keeping up).
# generic fifo interface - existence is oblivious to software.
proc p_sys_dmafifo {p_name m_name adc_data_width dma_addr_width} {
global ad_hdl_dir
set p_instance [get_bd_cells $p_name]
set c_instance [current_bd_instance .]
current_bd_instance $p_instance
set m_instance [create_bd_cell -type hier $m_name]
current_bd_instance $m_instance
create_bd_pin -dir I adc_rst
create_bd_pin -dir I -type clk adc_clk
create_bd_pin -dir I adc_wr
create_bd_pin -dir I -from [expr ($adc_data_width-1)] -to 0 adc_wdata
create_bd_pin -dir O adc_wovf
create_bd_pin -dir I -type clk dma_clk
create_bd_pin -dir O dma_wr
create_bd_pin -dir O -from 63 -to 0 dma_wdata
create_bd_pin -dir I dma_wready
create_bd_pin -dir I dma_xfer_req
create_bd_pin -dir O -from 3 -to 0 dma_xfer_status
set util_adcfifo [create_bd_cell -type ip -vlnv analog.com:user:util_adcfifo:1.0 util_adcfifo]
set_property -dict [list CONFIG.ADC_DATA_WIDTH $adc_data_width] $util_adcfifo
set_property -dict [list CONFIG.DMA_DATA_WIDTH {64}] $util_adcfifo
set_property -dict [list CONFIG.DMA_READY_ENABLE {1}] $util_adcfifo
hdl/library: Update the IP parameters The following IP parameters were renamed: PCORE_ID --> ID PCORE_DEVTYPE --> DEVICE_TYPE PCORE_IODELAY_GROUP --> IO_DELAY_GROUP CH_DW --> CHANNEL_DATA_WIDTH CH_CNT --> NUM_OF_CHANNELS PCORE_BUFTYPE --> DEVICE_TYPE PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE CHID --> CHANNEL_ID PCORE_DEVICE_TYPE --> DEVICE_TYPE PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N PCORE_SERDES_DDR_N --> SERDES_DDR_N PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE DP_DISABLE --> DATAPATH_DISABLE PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE C_BIG_ENDIAN --> BIG_ENDIAN C_M_DATA_WIDTH --> MASTER_DATA_WIDTH C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH NUM_CHANNELS --> NUM_OF_CHANNELS CHANNELS --> NUM_OF_CHANNELS PCORE_4L_2L_N -->QUAD_OR_DUAL_N C_ADDRESS_WIDTH --> ADDRESS_WIDTH C_DATA_WIDTH --> DATA_WIDTH C_CLKS_ASYNC --> CLKS_ASYNC PCORE_QUAD_DUAL_N --> QUAD_DUAL_N NUM_CS --> NUM_OF_CS PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID PCORE_CLK0_DIV --> CLK0_DIV PCORE_CLK1_DIV --> CLK1_DIV PCORE_CLKIN_PERIOD --> CLKIN_PERIOD PCORE_VCO_DIV --> VCO_DIV PCORE_Cr_Cb_N --> CR_CB_N PCORE_VCO_MUL --> VCO_MUL PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH PCORE_ADDR_WIDTH --> ADDRESS_WIDTH DADATA_WIDTH --> DATA_WIDTH NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS DEBOUNCER_LEN --> DEBOUNCER_LENGTH ADDR_WIDTH --> ADDRESS_WIDTH C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED Cr_Cb_N --> CR_CB_N ADDATA_WIDTH --> ADC_DATA_WIDTH BUFTYPE --> DEVICE_TYPE NUM_BITS --> NUM_OF_BITS WIDTH_A --> A_DATA_WIDTH WIDTH_B --> B_DATA_WIDTH CH_OCNT --> NUM_OF_CHANNELS_O M_CNT --> NUM_OF_CHANNELS_M P_CNT --> NUM_OF_CHANNELS_P CH_ICNT --> NUM_OF_CHANNELS_I CH_MCNT --> NUM_OF_CHANNELS_M 4L_2L_N --> QUAD_OR_DUAL_N SPI_CLK_ASYNC --> ASYNC_SPI_CLK MMCM_BUFIO_N --> MMCM_OR_BUFIO_N SERDES_DDR_N --> SERDES_OR_DDR_N CLK_ASYNC --> ASYNC_CLK CLKS_ASYNC --> ASYNC_CLK SERDES --> SERDES_OR_DDR_N GTH_GTX_N --> GTH_OR_GTX_N IF_TYPE --> DDR_OR_SDR_N PARALLEL_WIDTH --> DATA_WIDTH ADD_SUB --> ADD_OR_SUB_N A_WIDTH --> A_DATA_WIDTH CONST_VALUE --> B_DATA_VALUE IO_BASEADDR --> BASE_ADDRESS IO_WIDTH --> DATA_WIDTH QUAD_DUAL_N --> QUAD_OR_DUAL_N AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH MODE_OF_ENABLE --> CONTROL_TYPE CONTROL_TYPE --> LEVEL_OR_PULSE_N IQSEL --> Q_OR_I_N MMCM --> MMCM_OR_BUFR_N
2015-08-19 11:11:47 +00:00
set_property -dict [list CONFIG.DMA_ADDRESS_WIDTH $dma_addr_width] $util_adcfifo
Add .gitattributes file Add .gitattributes file which sets up the eol encoding handling. This will make sure that we get a uniform eol encoding across different operating systems. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 09:04:19 +00:00
ad_connect adc_rst util_adcfifo/adc_rst
ad_connect adc_clk util_adcfifo/adc_clk
ad_connect adc_wr util_adcfifo/adc_wr
ad_connect adc_wdata util_adcfifo/adc_wdata
ad_connect adc_wovf util_adcfifo/adc_wovf
ad_connect dma_clk util_adcfifo/dma_clk
ad_connect dma_wr util_adcfifo/dma_wr
ad_connect dma_wdata util_adcfifo/dma_wdata
ad_connect dma_wready util_adcfifo/dma_wready
ad_connect dma_xfer_req util_adcfifo/dma_xfer_req
ad_connect dma_xfer_status util_adcfifo/dma_xfer_status
current_bd_instance $c_instance
}
proc p_sys_dacfifo {p_name m_name data_width addr_width} {
global ad_hdl_dir
set p_instance [get_bd_cells $p_name]
set c_instance [current_bd_instance .]
current_bd_instance $p_instance
set m_instance [create_bd_cell -type hier $m_name]
current_bd_instance $m_instance
create_bd_pin -dir I dma_clk
create_bd_pin -dir I dma_rst
create_bd_pin -dir O dma_ready
create_bd_pin -dir I dma_valid
create_bd_pin -dir I -from [expr ($data_width-1)] -to 0 dma_data
create_bd_pin -dir I dma_xfer_req
create_bd_pin -dir I dma_xfer_last
create_bd_pin -dir I dac_clk
create_bd_pin -dir I dac_valid
create_bd_pin -dir O -from [expr ($data_width - 1)] -to 0 dac_data
set util_dacfifo [create_bd_cell -type ip -vlnv analog.com:user:util_dacfifo:1.0 util_dacfifo]
set_property -dict [list CONFIG.DATA_WIDTH $data_width] $util_dacfifo
hdl/library: Update the IP parameters The following IP parameters were renamed: PCORE_ID --> ID PCORE_DEVTYPE --> DEVICE_TYPE PCORE_IODELAY_GROUP --> IO_DELAY_GROUP CH_DW --> CHANNEL_DATA_WIDTH CH_CNT --> NUM_OF_CHANNELS PCORE_BUFTYPE --> DEVICE_TYPE PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE CHID --> CHANNEL_ID PCORE_DEVICE_TYPE --> DEVICE_TYPE PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N PCORE_SERDES_DDR_N --> SERDES_DDR_N PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE DP_DISABLE --> DATAPATH_DISABLE PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE C_BIG_ENDIAN --> BIG_ENDIAN C_M_DATA_WIDTH --> MASTER_DATA_WIDTH C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH NUM_CHANNELS --> NUM_OF_CHANNELS CHANNELS --> NUM_OF_CHANNELS PCORE_4L_2L_N -->QUAD_OR_DUAL_N C_ADDRESS_WIDTH --> ADDRESS_WIDTH C_DATA_WIDTH --> DATA_WIDTH C_CLKS_ASYNC --> CLKS_ASYNC PCORE_QUAD_DUAL_N --> QUAD_DUAL_N NUM_CS --> NUM_OF_CS PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID PCORE_CLK0_DIV --> CLK0_DIV PCORE_CLK1_DIV --> CLK1_DIV PCORE_CLKIN_PERIOD --> CLKIN_PERIOD PCORE_VCO_DIV --> VCO_DIV PCORE_Cr_Cb_N --> CR_CB_N PCORE_VCO_MUL --> VCO_MUL PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH PCORE_ADDR_WIDTH --> ADDRESS_WIDTH DADATA_WIDTH --> DATA_WIDTH NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS DEBOUNCER_LEN --> DEBOUNCER_LENGTH ADDR_WIDTH --> ADDRESS_WIDTH C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED Cr_Cb_N --> CR_CB_N ADDATA_WIDTH --> ADC_DATA_WIDTH BUFTYPE --> DEVICE_TYPE NUM_BITS --> NUM_OF_BITS WIDTH_A --> A_DATA_WIDTH WIDTH_B --> B_DATA_WIDTH CH_OCNT --> NUM_OF_CHANNELS_O M_CNT --> NUM_OF_CHANNELS_M P_CNT --> NUM_OF_CHANNELS_P CH_ICNT --> NUM_OF_CHANNELS_I CH_MCNT --> NUM_OF_CHANNELS_M 4L_2L_N --> QUAD_OR_DUAL_N SPI_CLK_ASYNC --> ASYNC_SPI_CLK MMCM_BUFIO_N --> MMCM_OR_BUFIO_N SERDES_DDR_N --> SERDES_OR_DDR_N CLK_ASYNC --> ASYNC_CLK CLKS_ASYNC --> ASYNC_CLK SERDES --> SERDES_OR_DDR_N GTH_GTX_N --> GTH_OR_GTX_N IF_TYPE --> DDR_OR_SDR_N PARALLEL_WIDTH --> DATA_WIDTH ADD_SUB --> ADD_OR_SUB_N A_WIDTH --> A_DATA_WIDTH CONST_VALUE --> B_DATA_VALUE IO_BASEADDR --> BASE_ADDRESS IO_WIDTH --> DATA_WIDTH QUAD_DUAL_N --> QUAD_OR_DUAL_N AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH MODE_OF_ENABLE --> CONTROL_TYPE CONTROL_TYPE --> LEVEL_OR_PULSE_N IQSEL --> Q_OR_I_N MMCM --> MMCM_OR_BUFR_N
2015-08-19 11:11:47 +00:00
set_property -dict [list CONFIG.ADDRESS_WIDTH $addr_width] $util_dacfifo
Add .gitattributes file Add .gitattributes file which sets up the eol encoding handling. This will make sure that we get a uniform eol encoding across different operating systems. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 09:04:19 +00:00
ad_connect dma_clk util_dacfifo/dma_clk
ad_connect dac_clk util_dacfifo/dac_clk
ad_connect dma_rst util_dacfifo/dma_rst
ad_connect dma_ready util_dacfifo/dma_ready
ad_connect dma_valid util_dacfifo/dma_valid
ad_connect dma_data util_dacfifo/dma_data
ad_connect dma_xfer_req util_dacfifo/dma_xfer_req
ad_connect dma_xfer_last util_dacfifo/dma_xfer_last
ad_connect dac_valid util_dacfifo/dac_valid
ad_connect dac_data util_dacfifo/dac_data
current_bd_instance $c_instance
}