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8 Commits
iccad ... master

Author SHA1 Message Date
panhomyoung 52d20f4c9f update xag optimziation 2024-07-19 16:29:09 +08:00
panhomyoung 33e191e2d5 Merge branch 'master' of https://github.com/panhomyoung/phyLS 2024-07-01 11:17:36 +08:00
panhomyoung 8997cb9256 def file example 2024-07-01 11:13:12 +08:00
panhomyoung 2499d94260 PigMAP update 2024-07-01 10:51:39 +08:00
潘鸿洋 7e39a4db80
Update README.md 2024-07-01 10:29:11 +08:00
panhomyoung 63c125a1fa PigMAP update 2024-07-01 10:27:13 +08:00
panhomyoung d7ee97b059 PigMAP update 2024-07-01 09:30:59 +08:00
panhomyoung d95f10767a stp project 2024-06-03 15:56:21 +08:00
39 changed files with 956015 additions and 169 deletions
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2
CMakeLists.txt
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@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.8) cmake_minimum_required(VERSION 3.8)
project("phyLS" LANGUAGES CXX) project(phyLS LANGUAGES CXX)
set(CMAKE_CXX_STANDARD 17) set(CMAKE_CXX_STANDARD 17)
set(CMAKE_CXX_STANDARD_REQUIRED ON) set(CMAKE_CXX_STANDARD_REQUIRED ON)

2
README.md
View File

@ -11,7 +11,7 @@ Compiled successfully with Clang 6.0.1, Clang 12.0.0, GCC 7.3.0, and GCC 8.2.0.
## How to Compile ## How to Compile
```bash ```bash
git clone --recursive https://github.com/panhongyang0/phyLS.git git clone --recursive https://github.com/panhomyoung/phyLS.git
cd phyLS cd phyLS
mkdir build mkdir build
cd build cd build

2
lib/abc

@ -1 +1 @@
Subproject commit 9434b7438599b2fe94ec518946d0e1b6b2de3172 Subproject commit 39ac544f6c3272046a026fc976976b1481f9c9ad

2
lib/mockturtle

@ -1 +1 @@
Subproject commit 8a9409e27c17d32517e3c4e4a612d3c6d465aa1f Subproject commit 995ee748dd74d088bcd27a9eef5af89b55ac90b5

157
src/asap7.genlib Normal file
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@ -0,0 +1,157 @@
GATE _const0_ 0.00 z=CONST0;
GATE _const1_ 0.00 z=CONST1;
GATE AO211x2_ASAP7_75t_R 3.73 Y=(A1 * A2) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO21x1_ASAP7_75t_R 1.40 Y=(A1 * A2) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO21x2_ASAP7_75t_R 1.63 Y=(A1 * A2) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO221x1_ASAP7_75t_R 2.33 Y=(A1 * A2) + (B1 * B2) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO221x2_ASAP7_75t_R 2.57 Y=(A1 * A2) + (B1 * B2) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO222x2_ASAP7_75t_R 5.13 Y=(A1 * A2) + (B1 * B2) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO22x1_ASAP7_75t_R 2.10 Y=(A1 * A2) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO22x2_ASAP7_75t_R 2.33 Y=(A1 * A2) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO31x2_ASAP7_75t_R 3.73 Y=(A1 * A2 * A3) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO322x2_ASAP7_75t_R 3.50 Y=(A1 * A2 * A3) + (B1 * B2) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO32x1_ASAP7_75t_R 1.87 Y=(A1 * A2 * A3) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO32x2_ASAP7_75t_R 2.10 Y=(A1 * A2 * A3) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO331x1_ASAP7_75t_R 2.33 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO331x2_ASAP7_75t_R 2.57 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO332x1_ASAP7_75t_R 2.57 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO332x2_ASAP7_75t_R 2.80 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO333x1_ASAP7_75t_R 2.80 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO333x2_ASAP7_75t_R 3.03 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AO33x2_ASAP7_75t_R 2.33 Y=(A1 * A2 * A3) + (B1 * B2 * B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI211x1_ASAP7_75t_R 2.80 Y=(!A1 * !B * !C) + (!A2 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI211xp5_ASAP7_75t_R 1.40 Y=(!A1 * !B * !C) + (!A2 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI21x1_ASAP7_75t_R 1.87 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI21xp33_ASAP7_75t_R 1.17 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI21xp5_ASAP7_75t_R 1.17 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI221x1_ASAP7_75t_R 3.27 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI221xp5_ASAP7_75t_R 1.63 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI222xp33_ASAP7_75t_R 2.33 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI22x1_ASAP7_75t_R 2.33 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI22xp33_ASAP7_75t_R 1.40 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI22xp5_ASAP7_75t_R 1.40 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI311xp33_ASAP7_75t_R 1.63 Y=(!A1 * !B * !C) + (!A2 * !B * !C) + (!A3 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI31xp33_ASAP7_75t_R 1.40 Y=(!A1 * !B) + (!A2 * !B) + (!A3 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI31xp67_ASAP7_75t_R 3.03 Y=(!A1 * !B) + (!A2 * !B) + (!A3 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI321xp33_ASAP7_75t_R 1.87 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C) + (!A3 * !B1 * !C) + (!A3 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI322xp5_ASAP7_75t_R 2.10 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI32xp33_ASAP7_75t_R 1.63 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2) + (!A3 * !B1) + (!A3 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI331xp33_ASAP7_75t_R 2.10 Y=(!A1 * !B1 * !C1) + (!A1 * !B2 * !C1) + (!A1 * !B3 * !C1) + (!A2 * !B1 * !C1) + (!A2 * !B2 * !C1) + (!A2 * !B3 * !C1) + (!A3 * !B1 * !C1) + (!A3 * !B2 * !C1) + (!A3 * !B3 * !C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI332xp33_ASAP7_75t_R 2.33 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A1 * !B3 * !C1) + (!A1 * !B3 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A2 * !B3 * !C1) + (!A2 * !B3 * !C2) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2) + (!A3 * !B3 * !C1) + (!A3 * !B3 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI333xp33_ASAP7_75t_R 2.57 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B1 * !C3) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A1 * !B2 * !C3) + (!A1 * !B3 * !C1) + (!A1 * !B3 * !C2) + (!A1 * !B3 * !C3) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B1 * !C3) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A2 * !B2 * !C3) + (!A2 * !B3 * !C1) + (!A2 * !B3 * !C2) + (!A2 * !B3 * !C3) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B1 * !C3) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2) + (!A3 * !B2 * !C3) + (!A3 * !B3 * !C1) + (!A3 * !B3 * !C2) + (!A3 * !B3 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AOI33xp33_ASAP7_75t_R 1.87 Y=(!A1 * !B1) + (!A1 * !B2) + (!A1 * !B3) + (!A2 * !B1) + (!A2 * !B2) + (!A2 * !B3) + (!A3 * !B1) + (!A3 * !B2) + (!A3 * !B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA211x2_ASAP7_75t_R 1.87 Y=(A1 * B * C) + (A2 * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA21x2_ASAP7_75t_R 1.63 Y=(A1 * B) + (A2 * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA221x2_ASAP7_75t_R 3.73 Y=(A1 * B1 * C) + (A1 * B2 * C) + (A2 * B1 * C) + (A2 * B2 * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA222x2_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA22x2_ASAP7_75t_R 2.33 Y=(A1 * B1) + (A1 * B2) + (A2 * B1) + (A2 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA31x2_ASAP7_75t_R 3.50 Y=(A1 * B1) + (A2 * B1) + (A3 * B1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA331x1_ASAP7_75t_R 2.33 Y=(A1 * B1 * C1) + (A1 * B2 * C1) + (A1 * B3 * C1) + (A2 * B1 * C1) + (A2 * B2 * C1) + (A2 * B3 * C1) + (A3 * B1 * C1) + (A3 * B2 * C1) + (A3 * B3 * C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA331x2_ASAP7_75t_R 2.57 Y=(A1 * B1 * C1) + (A1 * B2 * C1) + (A1 * B3 * C1) + (A2 * B1 * C1) + (A2 * B2 * C1) + (A2 * B3 * C1) + (A3 * B1 * C1) + (A3 * B2 * C1) + (A3 * B3 * C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA332x1_ASAP7_75t_R 2.57 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B3 * C1) + (A3 * B3 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA332x2_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B3 * C1) + (A3 * B3 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA333x1_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B1 * C3) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B2 * C3) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A1 * B3 * C3) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B1 * C3) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B2 * C3) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A2 * B3 * C3) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B1 * C3) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B2 * C3) + (A3 * B3 * C1) + (A3 * B3 * C2) + (A3 * B3 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA333x2_ASAP7_75t_R 3.03 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B1 * C3) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B2 * C3) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A1 * B3 * C3) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B1 * C3) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B2 * C3) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A2 * B3 * C3) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B1 * C3) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B2 * C3) + (A3 * B3 * C1) + (A3 * B3 * C2) + (A3 * B3 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OA33x2_ASAP7_75t_R 2.33 Y=(A1 * B1) + (A1 * B2) + (A1 * B3) + (A2 * B1) + (A2 * B2) + (A2 * B3) + (A3 * B1) + (A3 * B2) + (A3 * B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI211xp5_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI21x1_ASAP7_75t_R 1.87 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI21xp33_ASAP7_75t_R 1.17 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI21xp5_ASAP7_75t_R 1.17 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI221xp5_ASAP7_75t_R 1.63 Y=(!A1 * !A2) + (!B1 * !B2) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI222xp33_ASAP7_75t_R 2.33 Y=(!A1 * !A2) + (!B1 * !B2) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI22x1_ASAP7_75t_R 2.33 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI22xp33_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI22xp5_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI311xp33_ASAP7_75t_R 1.63 Y=(!A1 * !A2 * !A3) + (!B1) + (!C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI31xp33_ASAP7_75t_R 1.40 Y=(!A1 * !A2 * !A3) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI31xp67_ASAP7_75t_R 3.03 Y=(!A1 * !A2 * !A3) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI321xp33_ASAP7_75t_R 1.87 Y=(!A1 * !A2 * !A3) + (!B1 * !B2) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI322xp33_ASAP7_75t_R 2.10 Y=(!A1 * !A2 * !A3) + (!B1 * !B2) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI32xp33_ASAP7_75t_R 1.63 Y=(!A1 * !A2 * !A3) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI331xp33_ASAP7_75t_R 2.10 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI332xp33_ASAP7_75t_R 2.33 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI333xp33_ASAP7_75t_R 2.57 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OAI33xp33_ASAP7_75t_R 2.57 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx10_ASAP7_75t_R 3.27 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx12_ASAP7_75t_R 3.73 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx12f_ASAP7_75t_R 4.20 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx16f_ASAP7_75t_R 5.13 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx24_ASAP7_75t_R 7.00 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx2_ASAP7_75t_R 1.17 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx3_ASAP7_75t_R 1.40 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx4_ASAP7_75t_R 1.63 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx4f_ASAP7_75t_R 1.87 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx5_ASAP7_75t_R 1.87 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx6f_ASAP7_75t_R 2.33 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE BUFx8_ASAP7_75t_R 2.80 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HB1xp67_ASAP7_75t_R 0.93 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HB2xp67_ASAP7_75t_R 1.17 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HB3xp67_ASAP7_75t_R 1.40 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HB4xp67_ASAP7_75t_R 1.63 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx11_ASAP7_75t_R 3.03 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx13_ASAP7_75t_R 3.50 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx1_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx2_ASAP7_75t_R 0.93 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx3_ASAP7_75t_R 1.17 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx4_ASAP7_75t_R 1.40 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx5_ASAP7_75t_R 1.63 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx6_ASAP7_75t_R 1.87 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVx8_ASAP7_75t_R 2.33 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVxp33_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE INVxp67_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND2x2_ASAP7_75t_R 1.40 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND2x4_ASAP7_75t_R 2.33 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND2x6_ASAP7_75t_R 2.80 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND3x1_ASAP7_75t_R 1.40 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND3x2_ASAP7_75t_R 1.63 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND3x4_ASAP7_75t_R 3.73 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND4x1_ASAP7_75t_R 1.63 Y=(A * B * C * D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND4x2_ASAP7_75t_R 3.73 Y=(A * B * C * D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND5x1_ASAP7_75t_R 1.87 Y=(A * B * C * D * E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE AND5x2_ASAP7_75t_R 4.67 Y=(A * B * C * D * E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE FAx1_ASAP7_75t_R 3.27 CON=(!A * !B) + (!A * !CI) + (!B * !CI); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE FAx1_ASAP7_75t_R 3.27 SN=(A * B * !CI) + (A * !B * CI) + (!A * B * CI) + (!A * !B * !CI); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HAxp5_ASAP7_75t_R 2.10 CON=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE HAxp5_ASAP7_75t_R 2.10 SN=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE MAJIxp5_ASAP7_75t_R 1.63 Y=(!A * !B) + (!A * !C) + (!B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE MAJx2_ASAP7_75t_R 2.10 Y=(A * B) + (A * C) + (B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE MAJx3_ASAP7_75t_R 2.33 Y=(A * B) + (A * C) + (B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2x1_ASAP7_75t_R 1.40 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2x1p5_ASAP7_75t_R 1.87 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2x2_ASAP7_75t_R 2.33 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2xp33_ASAP7_75t_R 0.93 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2xp5_ASAP7_75t_R 0.93 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND2xp67_ASAP7_75t_R 1.40 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND3x1_ASAP7_75t_R 2.57 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND3x2_ASAP7_75t_R 4.67 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND3xp33_ASAP7_75t_R 1.17 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND4xp25_ASAP7_75t_R 1.40 Y=(!A) + (!B) + (!C) + (!D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND4xp75_ASAP7_75t_R 3.27 Y=(!A) + (!B) + (!C) + (!D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NAND5xp2_ASAP7_75t_R 1.63 Y=(!A) + (!B) + (!C) + (!D) + (!E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR2x1_ASAP7_75t_R 1.40 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR2x1p5_ASAP7_75t_R 1.87 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR2x2_ASAP7_75t_R 2.33 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR2xp33_ASAP7_75t_R 0.93 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR2xp67_ASAP7_75t_R 1.40 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR3x1_ASAP7_75t_R 2.57 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR3x2_ASAP7_75t_R 4.67 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR3xp33_ASAP7_75t_R 1.17 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR4xp25_ASAP7_75t_R 1.40 Y=(!A * !B * !C * !D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR4xp75_ASAP7_75t_R 3.27 Y=(!A * !B * !C * !D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE NOR5xp2_ASAP7_75t_R 1.63 Y=(!A * !B * !C * !D * !E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR2x2_ASAP7_75t_R 1.40 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR2x4_ASAP7_75t_R 1.87 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR2x6_ASAP7_75t_R 2.80 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR3x1_ASAP7_75t_R 1.40 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR3x2_ASAP7_75t_R 1.63 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR3x4_ASAP7_75t_R 2.10 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR4x1_ASAP7_75t_R 1.63 Y=(A) + (B) + (C) + (D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR4x2_ASAP7_75t_R 1.87 Y=(A) + (B) + (C) + (D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR5x1_ASAP7_75t_R 1.87 Y=(A) + (B) + (C) + (D) + (E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE OR5x2_ASAP7_75t_R 2.10 Y=(A) + (B) + (C) + (D) + (E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XNOR2x1_ASAP7_75t_R 2.80 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XNOR2x2_ASAP7_75t_R 2.57 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XNOR2xp5_ASAP7_75t_R 2.10 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XOR2x1_ASAP7_75t_R 2.80 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XOR2x2_ASAP7_75t_R 2.57 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
GATE XOR2xp5_ASAP7_75t_R 2.10 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00

57
src/commands/abc/if.hpp
View File

@ -28,6 +28,13 @@ class if_command : public command {
public: public:
explicit if_command(const environment::ptr &env) explicit if_command(const environment::ptr &env)
: command(env, "performs FPGA mapping of the AIG") { : command(env, "performs FPGA mapping of the AIG") {
add_option("-k,--klut", LutSize, "the number of LUT inputs (2 < k < 8), Default=4");
add_option("-c,--cut", CutSize,
"the max number of priority cuts (0 < c < 2^12), Default=8");
add_flag("--minimization, -m",
"enables cut minimization by removing vacuous variables");
add_flag("--delay, -y", "delay optimization with recorded library");
add_option("-f,--file", filename, "recorded library");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -45,23 +52,42 @@ class if_command : public command {
If_Par_t Pars, *pPars = &Pars; If_Par_t Pars, *pPars = &Pars;
If_ManSetDefaultPars(pPars); If_ManSetDefaultPars(pPars);
pPars->pLutLib = (If_LibLut_t *)Abc_FrameReadLibLut(); pPars->pLutLib = (If_LibLut_t *)Abc_FrameReadLibLut();
if (pPars->nLutSize == -1) {
if (pPars->pLutLib == NULL) { if (is_set("klut")) pPars->nLutSize = LutSize;
printf("The LUT library is not given.\n"); if (is_set("cut")) pPars->nCutsMax = CutSize;
return; if (is_set("minimization")) pPars->fCutMin ^= 1;
if (is_set("delay")) {
pPars->fUserRecLib ^= 1;
pPars->fTruth = 1;
pPars->fCutMin = 1;
pPars->fExpRed = 0;
pPars->fUsePerm = 1;
pPars->pLutLib = NULL;
int nVars = 6;
int nCuts = 32;
int fFuncOnly = 0;
int fVerbose = 0;
char *FileName, *pTemp;
FILE *pFile;
Gia_Man_t *pGia = NULL;
FileName = filename.data();
for (pTemp = FileName; *pTemp; pTemp++)
if (*pTemp == '>') *pTemp = '\\';
if ((pFile = fopen(FileName, "r")) == NULL) {
printf("Cannot open input file \"%s\". ", FileName);
if ((FileName = Extra_FileGetSimilarName(FileName, ".aig", NULL, NULL,
NULL, NULL)))
printf("Did you mean \"%s\"?", FileName);
printf("\n");
} }
pPars->nLutSize = pPars->pLutLib->LutMax; fclose(pFile);
pGia = Gia_AigerRead(FileName, 0, 1, 0);
if (pGia == NULL) {
printf("Reading AIGER has failed.\n");
}
Abc_NtkRecStart3(pGia, nVars, nCuts, fFuncOnly, fVerbose);
} }
if (pPars->nLutSize < 2 || pPars->nLutSize > IF_MAX_LUTSIZE) {
printf("Incorrect LUT size (%d).\n", pPars->nLutSize);
return;
}
if (pPars->nCutsMax < 1 || pPars->nCutsMax >= (1 << 12)) {
printf("Incorrect number of cuts.\n");
return;
}
if (!Abc_NtkIsStrash(pNtk)) { if (!Abc_NtkIsStrash(pNtk)) {
// strash and balance the network // strash and balance the network
pNtk = Abc_NtkStrash(pNtk, 0, 0, 0); pNtk = Abc_NtkStrash(pNtk, 0, 0, 0);
@ -106,6 +132,9 @@ class if_command : public command {
} }
private: private:
uint32_t LutSize = 4u;
uint32_t CutSize = 8u;
string filename;
}; };
ALICE_ADD_COMMAND(if, "ABC") ALICE_ADD_COMMAND(if, "ABC")

12
src/commands/abc/write.hpp
View File

@ -24,7 +24,8 @@ class write_command : public command {
public: public:
explicit write_command(const environment::ptr &env) explicit write_command(const environment::ptr &env)
: command(env, "writes the current network into file by ABC parser") { : command(env, "writes the current network into file by ABC parser") {
add_option("filename,-f", file_name, "name of output file"); add_option("--filename,-f", file_name, "name of output file");
add_flag("--verilog, -v", "writes the current network in Verilog format");
} }
protected: protected:
@ -35,8 +36,13 @@ class write_command : public command {
std::cerr << "Error: Empty network.\n"; std::cerr << "Error: Empty network.\n";
else { else {
auto pNtk = store<pabc::Abc_Ntk_t *>().current(); auto pNtk = store<pabc::Abc_Ntk_t *>().current();
pabc::Io_Write(pNtk, (char *)(file_name.c_str()), if (is_set("verilog")) {
pabc::Io_ReadFileType((char *)(file_name.c_str()))); pabc::Io_Write(pNtk, (char *)(file_name.c_str()), pabc::IO_FILE_VERILOG);
} else {
pabc::Io_Write(pNtk, (char *)(file_name.c_str()),
pabc::Io_ReadFileType((char *)(file_name.c_str())));
}
} }
} }

19
src/commands/balance.hpp
View File

@ -34,6 +34,7 @@ class balance_command : public command {
: command(env, : command(env,
"transforms the current network into a well-balanced AIG") { "transforms the current network into a well-balanced AIG") {
add_flag("--xmg, -x", "Balance for XMG"); add_flag("--xmg, -x", "Balance for XMG");
add_flag("--xag, -g", "ESOP balance for XAG");
add_flag("--strash, -s", "Balance AND finding structural hashing"); add_flag("--strash, -s", "Balance AND finding structural hashing");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -42,6 +43,8 @@ class balance_command : public command {
void execute() { void execute() {
clock_t begin, end; clock_t begin, end;
double totalTime = 0.0; double totalTime = 0.0;
begin = clock();
if (is_set("xmg")) { if (is_set("xmg")) {
xmg_network xmg = store<xmg_network>().current(); xmg_network xmg = store<xmg_network>().current();
xmg = balancing( xmg = balancing(
@ -53,31 +56,33 @@ class balance_command : public command {
store<xmg_network>().extend(); store<xmg_network>().extend();
store<xmg_network>().current() = xmg_copy; store<xmg_network>().current() = xmg_copy;
} else if (is_set("xag")) {
xag_network xag = store<xag_network>().current();
xag_network res = esop_balancing(xag);
phyLS::print_stats(res);
store<xag_network>().extend();
store<xag_network>().current() = res;
} else { } else {
if (store<aig_network>().size() == 0u) if (store<aig_network>().size() == 0u)
std::cerr << "Error: Empty AIG network\n"; std::cerr << "Error: Empty AIG network\n";
else { else {
auto aig = store<aig_network>().current(); auto aig = store<aig_network>().current();
if (is_set("strash")) { if (is_set("strash")) {
begin = clock();
aig_balancing_params ps; aig_balancing_params ps;
ps.minimize_levels = false; ps.minimize_levels = false;
aig_balance(aig, ps); aig_balance(aig, ps);
end = clock();
totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
} else { } else {
begin = clock();
aig_balance(aig); aig_balance(aig);
end = clock();
totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
} }
phyLS::print_stats(aig); phyLS::print_stats(aig);
store<aig_network>().extend(); store<aig_network>().extend();
store<aig_network>().current() = aig; store<aig_network>().current() = aig;
} }
} }
end = clock();
totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
cout.setf(ios::fixed); cout.setf(ios::fixed);
cout << "[CPU time] " << setprecision(2) << totalTime << " s" << endl; cout << "[CPU time] " << setprecision(2) << totalTime << " s" << endl;
} }

4
src/commands/lut_mapping.hpp
View File

@ -47,9 +47,7 @@ class lut_mapping_command : public command {
clock_t begin, end; clock_t begin, end;
double totalTime; double totalTime;
lut_mapping_params ps; lut_mapping_params ps;
if (is_set("area")){ if (is_set("area")) ps.rounds = 0u;
ps.rounds_ela = 4u;
}
if (is_set("mig")) { if (is_set("mig")) {
/* derive some MIG */ /* derive some MIG */

29
src/commands/lutmap.hpp
View File

@ -32,8 +32,9 @@ class lutmap_command : public command {
add_flag("--mig, -m", "FPGA technology mapping for MIG"); add_flag("--mig, -m", "FPGA technology mapping for MIG");
add_flag("--xag, -g", "FPGA technology mapping for XAG"); add_flag("--xag, -g", "FPGA technology mapping for XAG");
add_flag("--xmg, -x", "FPGA technology mapping for XMG"); add_flag("--xmg, -x", "FPGA technology mapping for XMG");
add_flag("--klut, -k", "FPGA technology mapping for k-LUT");
add_option("--cut_size, -s", cut_size, add_option("--cut_size, -s", cut_size,
"Maximum number of leaves for a cut [default = 4]"); "Maximum number of leaves for a cut [default = 6]");
add_option( add_option(
"--cut_limit, -l", cut_limit, "--cut_limit, -l", cut_limit,
"the input Maximum number of cuts for a node name [default = 25]"); "the input Maximum number of cuts for a node name [default = 25]");
@ -47,6 +48,7 @@ class lutmap_command : public command {
"LUT map with cost function [default = false]"); "LUT map with cost function [default = false]");
add_flag("--dominated_cuts, -d", add_flag("--dominated_cuts, -d",
"Remove the cuts that are contained in others [default = true]"); "Remove the cuts that are contained in others [default = true]");
add_option("--output, -o", filename, "the bench filename");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -119,6 +121,24 @@ class lutmap_command : public command {
phyLS::lut_map(mapped_xmg, ps); phyLS::lut_map(mapped_xmg, ps);
mapped_xmg.clear_mapping(); mapped_xmg.clear_mapping();
} }
} else if (is_set("klut")) {
if (store<klut_network>().size() == 0u)
std::cerr << "Error: Empty k-LUT network\n";
else {
auto klut = store<klut_network>().current();
mapping_view mapped_klut{klut};
phyLS::lut_map_params ps;
if (is_set("area")) ps.area_oriented_mapping = true;
if (is_set("relax_required")) ps.relax_required = relax_required;
if (is_set("cut_size")) ps.cut_enumeration_ps.cut_size = cut_size;
if (is_set("cut_limit")) ps.cut_enumeration_ps.cut_limit = cut_limit;
if (is_set("recompute_cuts")) ps.recompute_cuts = false;
if (is_set("edge")) ps.edge_optimization = false;
if (is_set("dominated_cuts")) ps.remove_dominated_cuts = false;
cout << "Mapped kLUT into " << cut_size << "-LUT : ";
phyLS::lut_map(mapped_klut, ps);
mapped_klut.clear_mapping();
}
} else { } else {
if (store<aig_network>().size() == 0u) if (store<aig_network>().size() == 0u)
std::cerr << "Error: Empty AIG network\n"; std::cerr << "Error: Empty AIG network\n";
@ -139,7 +159,11 @@ class lutmap_command : public command {
mapped_aig, ps); mapped_aig, ps);
else else
phyLS::lut_map(mapped_aig, ps); phyLS::lut_map(mapped_aig, ps);
mapped_aig.clear_mapping(); if (is_set("output")) {
write_bench(mapped_aig, filename);
} else {
mapped_aig.clear_mapping();
}
} }
} }
} }
@ -148,6 +172,7 @@ class lutmap_command : public command {
uint32_t cut_size{6u}; uint32_t cut_size{6u};
uint32_t cut_limit{8u}; uint32_t cut_limit{8u};
uint32_t relax_required{0u}; uint32_t relax_required{0u};
std::string filename = "lut.bench";
}; };
ALICE_ADD_COMMAND(lutmap, "Mapping") ALICE_ADD_COMMAND(lutmap, "Mapping")

3
src/commands/node_resynthesis.hpp
View File

@ -31,6 +31,7 @@
#include <mockturtle/networks/xmg.hpp> #include <mockturtle/networks/xmg.hpp>
#include "../core/misc.hpp" #include "../core/misc.hpp"
#include "../networks/aoig/xag_lut_npn.hpp"
using namespace std; using namespace std;
using namespace mockturtle; using namespace mockturtle;
@ -75,7 +76,7 @@ class resyn_command : public command {
totalTime = (double)(end - begin) / CLOCKS_PER_SEC; totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
} else if (is_set("xag")) { } else if (is_set("xag")) {
begin = clock(); begin = clock();
xag_npn_resynthesis<xag_network> resyn; xag_npn_lut_resynthesis resyn;
const auto xag = node_resynthesis<xag_network>(klut, resyn); const auto xag = node_resynthesis<xag_network>(klut, resyn);
store<xag_network>().extend(); store<xag_network>().extend();
store<xag_network>().current() = cleanup_dangling(xag); store<xag_network>().current() = cleanup_dangling(xag);

34
src/commands/refactor.hpp
View File

@ -33,10 +33,13 @@ class refactor_command : public command {
explicit refactor_command(const environment::ptr& env) explicit refactor_command(const environment::ptr& env)
: command(env, : command(env,
"performs technology-independent refactoring [default = AIG]") { "performs technology-independent refactoring [default = AIG]") {
add_option("--cut_size, -k", cut_size,
"Maximum number of PIs of the MFFC or window");
add_flag("--mig, -m", "refactoring for MIG"); add_flag("--mig, -m", "refactoring for MIG");
add_flag("--xag, -g", "refactoring for XAG"); add_flag("--xag, -g", "refactoring for XAG");
add_flag("--xmg, -x", "refactoring for XMG"); add_flag("--xmg, -x", "refactoring for XMG");
add_flag("--akers, -a", "Refactoring with Akers synthesis for MIG"); add_flag("--akers, -a", "Refactoring with Akers synthesis for MIG");
add_flag("--gain, -n", "optimize until there is no gain");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -54,12 +57,12 @@ class refactor_command : public command {
if (is_set("akers")) { if (is_set("akers")) {
akers_resynthesis<mig_network> resyn; akers_resynthesis<mig_network> resyn;
refactoring_params ps; refactoring_params ps;
ps.max_pis = 4u; ps.max_pis = cut_size;
refactoring(mig, resyn, ps); refactoring(mig, resyn, ps);
} else { } else {
mig_npn_resynthesis resyn; mig_npn_resynthesis resyn;
refactoring_params ps; refactoring_params ps;
ps.max_pis = 4u; ps.max_pis = cut_size;
refactoring(mig, resyn, ps); refactoring(mig, resyn, ps);
} }
mig = cleanup_dangling(mig); mig = cleanup_dangling(mig);
@ -77,7 +80,7 @@ class refactor_command : public command {
begin = clock(); begin = clock();
bidecomposition_resynthesis<xag_network> resyn; bidecomposition_resynthesis<xag_network> resyn;
refactoring_params ps; refactoring_params ps;
ps.max_pis = 4u; ps.max_pis = cut_size;
refactoring(xag, resyn, ps); refactoring(xag, resyn, ps);
xag = cleanup_dangling(xag); xag = cleanup_dangling(xag);
end = clock(); end = clock();
@ -92,11 +95,23 @@ class refactor_command : public command {
else { else {
auto xmg = store<xmg_network>().current(); auto xmg = store<xmg_network>().current();
begin = clock(); begin = clock();
xmg_npn_resynthesis resyn; if (is_set("gain")) {
refactoring_params ps; uint64_t size_current{};
ps.max_pis = 4u; do {
refactoring(xmg, resyn, ps); size_current = xmg.num_gates();
xmg = cleanup_dangling(xmg); xmg_npn_resynthesis resyn;
refactoring_params ps;
ps.max_pis = cut_size;
refactoring(xmg, resyn, ps);
xmg = cleanup_dangling(xmg);
} while (xmg.num_gates() < size_current);
} else {
xmg_npn_resynthesis resyn;
refactoring_params ps;
ps.max_pis = cut_size;
refactoring(xmg, resyn, ps);
xmg = cleanup_dangling(xmg);
}
end = clock(); end = clock();
totalTime = (double)(end - begin) / CLOCKS_PER_SEC; totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
phyLS::print_stats(xmg); phyLS::print_stats(xmg);
@ -111,7 +126,7 @@ class refactor_command : public command {
begin = clock(); begin = clock();
direct_resynthesis<aig_network> aig_resyn; direct_resynthesis<aig_network> aig_resyn;
refactoring_params ps; refactoring_params ps;
ps.max_pis = 4u; ps.max_pis = cut_size;
refactoring(aig, aig_resyn, ps); refactoring(aig, aig_resyn, ps);
aig = cleanup_dangling(aig); aig = cleanup_dangling(aig);
end = clock(); end = clock();
@ -127,6 +142,7 @@ class refactor_command : public command {
} }
private: private:
uint32_t cut_size = 4u;
}; };
ALICE_ADD_COMMAND(refactor, "Synthesis") ALICE_ADD_COMMAND(refactor, "Synthesis")

165
src/commands/techmap.hpp
View File

@ -13,6 +13,7 @@
#ifndef TECHMAP_HPP #ifndef TECHMAP_HPP
#define TECHMAP_HPP #define TECHMAP_HPP
#include <iostream>
#include <mockturtle/algorithms/mapper.hpp> #include <mockturtle/algorithms/mapper.hpp>
#include <mockturtle/io/genlib_reader.hpp> #include <mockturtle/io/genlib_reader.hpp>
#include <mockturtle/io/write_verilog.hpp> #include <mockturtle/io/write_verilog.hpp>
@ -21,8 +22,10 @@
#include <mockturtle/networks/xmg.hpp> #include <mockturtle/networks/xmg.hpp>
#include <mockturtle/properties/xmgcost.hpp> #include <mockturtle/properties/xmgcost.hpp>
#include <mockturtle/utils/tech_library.hpp> #include <mockturtle/utils/tech_library.hpp>
#include <string>
#include "../core/properties.hpp" #include "../core/properties.hpp"
#include "../core/read_placement_file.hpp"
namespace alice { namespace alice {
@ -34,6 +37,14 @@ class techmap_command : public command {
add_flag("--mig, -m", "Standard cell mapping for MIG"); add_flag("--mig, -m", "Standard cell mapping for MIG");
add_flag("--lut, -l", "Standard cell mapping for k-LUT"); add_flag("--lut, -l", "Standard cell mapping for k-LUT");
add_option("--output, -o", filename, "the verilog filename"); add_option("--output, -o", filename, "the verilog filename");
add_option("--cut_limit, -c", cut_limit,
"Maximum number of cuts for a node");
add_option("--node_position_pl, -p", pl_filename, "the pl filename");
add_option("--node_position_def, -d", def_filename, "the def filename");
add_flag("--area, -a", "Area-only standard cell mapping");
add_flag("--delay, -e", "Delay-only standard cell mapping");
add_flag("--wirelength, -w", "Wirelength-only standard cell mapping");
add_flag("--balance, -b", "Balanced wirelength standard cell mapping");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -43,6 +54,9 @@ class techmap_command : public command {
private: private:
std::string filename = "techmap.v"; std::string filename = "techmap.v";
std::string pl_filename = "";
std::string def_filename = "";
uint32_t cut_limit{49u};
protected: protected:
void execute() { void execute() {
@ -53,84 +67,109 @@ class techmap_command : public command {
mockturtle::map_params ps; mockturtle::map_params ps;
mockturtle::map_stats st; mockturtle::map_stats st;
ps.cut_enumeration_ps.cut_limit = cut_limit;
if (is_set("xmg")) { if (is_set("area"))
if (store<xmg_network>().size() == 0u) ps.strategy = map_params::area;
std::cerr << "[e] no XMG in the store\n"; else if (is_set("delay"))
else { ps.strategy = map_params::delay;
auto xmg = store<xmg_network>().current(); else if (is_set("wirelength"))
xmg_gate_stats stats; ps.strategy = map_params::wirelength;
xmg_profile_gates(xmg, stats); else if (is_set("balance"))
std::cout << "[i] "; ps.strategy = map_params::balance;
stats.report(); else
ps.strategy = map_params::def;
if (is_set("verbose")) ps.verbose = true;
phyLS::xmg_critical_path_stats critical_stats; stopwatch<>::duration time{0};
phyLS::xmg_critical_path_profile_gates(xmg, critical_stats); call_with_stopwatch(time, [&]() {
std::cout << "[i] "; if (is_set("xmg")) {
critical_stats.report(); if (store<xmg_network>().size() == 0u)
std::cerr << "[e] no XMG in the store\n";
else {
auto xmg = store<xmg_network>().current();
xmg_gate_stats stats;
xmg_profile_gates(xmg, stats);
std::cout << "[i] ";
stats.report();
auto res = mockturtle::map(xmg, lib, ps, &st); phyLS::xmg_critical_path_stats critical_stats;
phyLS::xmg_critical_path_profile_gates(xmg, critical_stats);
std::cout << "[i] ";
critical_stats.report();
if (is_set("output")) { auto res = mockturtle::map(xmg, lib, ps, &st);
write_verilog_with_binding(res, filename);
if (is_set("output")) {
write_verilog_with_binding(res, filename);
}
std::cout << fmt::format(
"[i] Mapped XMG into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
} }
} else if (is_set("mig")) {
if (store<mig_network>().size() == 0u) {
std::cerr << "[e] no MIG in the store\n";
} else {
auto mig = store<mig_network>().current();
std::cout << fmt::format( auto res = mockturtle::map(mig, lib, ps, &st);
"[i] Mapped XMG into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
}
} else if (is_set("mig")) {
if (store<mig_network>().size() == 0u) {
std::cerr << "[e] no MIG in the store\n";
} else {
auto mig = store<mig_network>().current();
auto res = mockturtle::map(mig, lib, ps, &st); if (is_set("output")) {
write_verilog_with_binding(res, filename);
}
if (is_set("output")) { std::cout << fmt::format(
write_verilog_with_binding(res, filename); "Mapped MIG into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
} }
} else if (is_set("lut")) {
if (store<klut_network>().size() == 0u) {
std::cerr << "[e] no k-LUT in the store\n";
} else {
auto lut = store<klut_network>().current();
std::cout << fmt::format( auto res = mockturtle::map(lut, lib, ps, &st);
"Mapped MIG into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
}
} else if (is_set("lut")) {
if (store<klut_network>().size() == 0u) {
std::cerr << "[e] no k-LUT in the store\n";
} else {
auto lut = store<klut_network>().current();
auto res = mockturtle::map(lut, lib, ps, &st); if (is_set("output")) {
write_verilog_with_binding(res, filename);
}
if (is_set("output")) { std::cout << fmt::format(
write_verilog_with_binding(res, filename); "Mapped k-LUT into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
} }
std::cout << fmt::format(
"Mapped k-LUT into #gates = {} area = {:.2f} delay = {:.2f}\n",
res.num_gates(), st.area, st.delay);
}
} else {
if (store<aig_network>().size() == 0u) {
std::cerr << "[e] no AIG in the store\n";
} else { } else {
auto aig = store<aig_network>().current(); if (store<aig_network>().size() == 0u) {
auto res = mockturtle::map(aig, lib, ps, &st); std::cerr << "[e] no AIG in the store\n";
} else {
if (is_set("output")) write_verilog_with_binding(res, filename); auto aig = store<aig_network>().current();
if (is_set("node_position_def")) {
// std::cout << fmt::format( std::vector<mockturtle::node_position> np(aig.size());
// "Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, " phyLS::read_def_file(def_filename, np);
// "power = {:.2f}\n", ps.wirelength_rounds = true;
// res.num_gates(), st.area, st.delay, st.power); auto res = mockturtle::map(aig, lib, np, ps, &st);
if (is_set("output")) write_verilog_with_binding(res, filename);
std::cout << fmt::format(
"Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, "
"power = {:.2f}, wirelength = {:.2f}, total_wirelength = "
"{:.2f}\n",
res.num_gates(), st.area, st.delay, st.power, st.wirelength,
st.total_wirelength);
} else {
auto res = mockturtle::map(aig, lib, ps, &st);
if (is_set("output")) write_verilog_with_binding(res, filename);
std::cout << fmt::format(
"Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, "
"power = {:.2f}\n",
res.num_gates(), st.area, st.delay, st.power);
}
}
} }
} });
if (is_set("verbose")) { if (is_set("verbose")) st.report();
st.report(); std::cout << fmt::format("[CPU time]: {:5.3f} seconds\n", to_seconds(time));
cout << "Cut enumeration stats: " << endl;
st.cut_enumeration_st.report();
}
} }
}; };

10
src/commands/to_npz.hpp
View File

@ -34,8 +34,9 @@ class write_npz_command : public command {
add_option("--csv, -c", filename_csv, add_option("--csv, -c", filename_csv,
"The path to store csv file, default: ./placement/test.csv"); "The path to store csv file, default: ./placement/test.csv");
add_option("--def, -d", filename_def, add_option("--def, -d", filename_def,
"The path to store def file, default: " "The path to store def file, default: ./placement/floorplan.def");
"./placement/mfloorplan.def & ./placement/floorplan.def"); add_option("--mdef, -f", filename_mdef,
"The path to store def file, default: ./placement/mfloorplan.def");
} }
protected: protected:
@ -50,10 +51,9 @@ class write_npz_command : public command {
aig_network aig = store<aig_network>().current(); aig_network aig = store<aig_network>().current();
if (is_set("csv")) { if (is_set("csv")) {
phyLS::write_npz(aig, filename_csv); phyLS::write_npz(aig, filename_csv);
} else if (is_set("def")) { }
if (is_set("def")) {
phyLS::write_def(aig, filename_def, filename_mdef); phyLS::write_def(aig, filename_def, filename_mdef);
} else {
assert(false && "At least one filename should be specified. ");
} }
} }
} }

83
src/commands/window_rewriting.hpp
View File

@ -39,9 +39,9 @@ class wr_command : public command {
"set the cut size from 2 to 6, default = 4"); "set the cut size from 2 to 6, default = 4");
add_option("num_levels, -l", num_levels, add_option("num_levels, -l", num_levels,
"set the window level, default = 5"); "set the window level, default = 5");
add_flag("--xag, -a", "indow rewriting for XAG");
add_flag("--gain, -g", "optimize until there is no gain"); add_flag("--gain, -g", "optimize until there is no gain");
add_flag("--resub, -r", "window resub"); add_flag("--resub, -r", "window resub");
add_flag("--mffw, -w", "MFFW rewriting");
add_flag("--verbose, -v", "print the information"); add_flag("--verbose, -v", "print the information");
} }
@ -49,48 +49,69 @@ class wr_command : public command {
void execute() { void execute() {
clock_t begin, end; clock_t begin, end;
double totalTime; double totalTime;
begin = clock(); begin = clock();
auto aig = store<aig_network>().current();
window_rewriting_params ps; if (is_set("xag")) {
ps.cut_size = cut_size; xag_network xag = store<xag_network>().current();
ps.num_levels = num_levels; window_rewriting_params ps;
ps.cut_size = cut_size;
if (is_set("resub")) { ps.num_levels = num_levels;
window_resub_params ps_r;
if (is_set("gain")) { if (is_set("gain")) {
window_aig_enumerative_resub(aig, ps_r);
} else {
window_aig_heuristic_resub(aig, ps_r);
}
aig = cleanup_dangling(aig);
} else {
if (is_set("gain")) {
uint64_t const size_before{aig.num_gates()};
uint64_t size_current{}; uint64_t size_current{};
do { do {
size_current = aig.num_gates(); size_current = xag.num_gates();
window_rewriting_stats win_st; window_rewriting_stats win_st;
window_rewriting(aig, ps, &win_st); window_rewriting(xag, ps, &win_st);
if (is_set("verbose")) win_st.report(); if (is_set("verbose")) win_st.report();
aig = cleanup_dangling(aig); xag = cleanup_dangling(xag);
} while (aig.num_gates() < size_current); } while (xag.num_gates() < size_current);
} else if (is_set("mffw")) {
window_rewriting_stats win_st;
mffw_rewriting(aig, ps, &win_st);
aig = cleanup_dangling(aig);
} else { } else {
window_rewriting_stats win_st; window_rewriting_stats win_st;
window_rewriting(aig, ps, &win_st); window_rewriting(xag, ps, &win_st);
aig = cleanup_dangling(aig); xag = cleanup_dangling(xag);
}
phyLS::print_stats(xag);
store<xag_network>().extend();
store<xag_network>().current() = xag;
} else {
if (store<aig_network>().size() == 0u)
std::cerr << "Error: Empty AIG network\n";
else {
auto aig = store<aig_network>().current();
window_rewriting_params ps;
ps.cut_size = cut_size;
ps.num_levels = num_levels;
if (is_set("resub")) {
window_resub_params ps_r;
if (is_set("gain")) {
window_aig_enumerative_resub(aig, ps_r);
} else {
window_aig_heuristic_resub(aig, ps_r);
}
aig = cleanup_dangling(aig);
} else {
if (is_set("gain")) {
uint64_t size_current{};
do {
size_current = aig.num_gates();
window_rewriting_stats win_st;
window_rewriting(aig, ps, &win_st);
if (is_set("verbose")) win_st.report();
aig = cleanup_dangling(aig);
} while (aig.num_gates() < size_current);
} else {
window_rewriting_stats win_st;
window_rewriting(aig, ps, &win_st);
aig = cleanup_dangling(aig);
}
}
phyLS::print_stats(aig);
store<aig_network>().extend();
store<aig_network>().current() = aig;
} }
} }
phyLS::print_stats(aig);
store<aig_network>().extend();
store<aig_network>().current() = aig;
end = clock(); end = clock();
totalTime = (double)(end - begin) / CLOCKS_PER_SEC; totalTime = (double)(end - begin) / CLOCKS_PER_SEC;

154
src/core/read_placement_file.hpp Normal file
View File

@ -0,0 +1,154 @@
#pragma once
#include <fmt/format.h>
#include <cstdint>
#include <fstream>
#include <iostream>
#include <limits>
#include <mockturtle/algorithms/mapper.hpp>
#include <sstream>
#include <string>
#include <vector>
#include "assert.h"
namespace phyLS {
void read_def_file(std::string file_path,
std::vector<mockturtle::node_position> &Vec_position) {
std::ifstream ifs(file_path, std::ifstream::in);
assert(ifs.is_open());
std::string line;
while (std::getline(ifs, line)) {
if (line.substr(0, 4) == "COMP") {
while (std::getline(ifs, line)) {
if (line.substr(0, 3) == "END") {
break;
} else {
// get index of AIG node
int index;
std::string res;
std::string::size_type found_b = line.find_first_of("_");
std::string::size_type found_e = line.find_last_of("_");
while (found_b != found_e - 1) {
res += line[found_b + 1];
found_b++;
}
index = std::stoi(res);
// read next line
std::getline(ifs, line);
// get position of AIG node
bool is_x = true;
std::string position = "";
for (char c : line) {
if (std::isdigit(c)) {
position += c;
} else if (!position.empty()) {
if (is_x) {
Vec_position[index].x_coordinate = std::stoi(position);
position.clear();
is_x = false;
} else {
Vec_position[index].y_coordinate = std::stoi(position);
position.clear();
}
} else {
continue;
}
}
}
}
} else if (line.substr(0, 4) == "PINS") {
while (std::getline(ifs, line)) {
if (line.substr(0, 3) == "END") {
break;
} else if (line.find("input") != std::string::npos &&
line.find("clk") == std::string::npos) {
// get input position
std::string::size_type found_1 = line.find("_");
std::string::size_type found_2 = line.find("+");
int index;
std::string res;
while (found_1 != found_2 - 2) {
res += line[found_1 + 1];
found_1++;
}
index = std::stoi(res);
std::getline(ifs, line);
std::getline(ifs, line);
bool is_x = true;
std::string position_input = "";
for (char c : line) {
if (std::isdigit(c)) {
position_input += c;
} else if (!position_input.empty()) {
if (is_x) {
Vec_position[index + 1].x_coordinate =
std::stoi(position_input);
position_input.clear();
is_x = false;
} else {
Vec_position[index + 1].y_coordinate =
std::stoi(position_input);
position_input.clear();
}
} else {
continue;
}
}
} else {
continue;
}
}
} else {
continue;
}
}
}
void read_pl_file(std::string file_path,
std::vector<mockturtle::node_position> &Vec_position,
uint32_t ntk_size) {
std::ifstream ifs(file_path, std::ifstream::in);
assert(ifs.is_open());
std::string line;
uint32_t index;
Vec_position.reserve(ntk_size);
while (getline(ifs, line)) {
if (line[0] == 'U') {
continue;
} else {
for (char c : line) {
std::string str_number = "";
uint32_t a = 0;
if (c == ':') {
break;
}
if (std::isdigit(c)) {
str_number += c;
} else {
if (!str_number.empty()) {
if (a == 0) {
index = std::stoi(str_number);
str_number = "";
a++;
} else if (a == 1) {
Vec_position[index].x_coordinate = std::stoi(str_number);
str_number = "";
a++;
} else if (a == 2) {
Vec_position[index].y_coordinate = std::stoi(str_number);
str_number = "";
a = 0;
}
}
}
}
}
}
ifs.close();
}
} // NAMESPACE phyLS

72
src/core/tonpz.hpp
View File

@ -31,28 +31,38 @@ namespace phyLS {
template <class Ntk> template <class Ntk>
void write_npz(Ntk const& ntk, std::ostream& os) { void write_npz(Ntk const& ntk, std::ostream& os) {
std::stringstream connect; std::stringstream connect;
cout << "num_pis: " << ntk.num_pis() << endl; // cout << "num_pis: " << ntk.num_pis() << endl;
cout << "num_pos: " << ntk.num_pos() << endl; // cout << "num_pos: " << ntk.num_pos() << endl;
cout << "num_gates: " << ntk.num_gates() << endl; // cout << "num_gates: " << ntk.num_gates() << endl;
int num_pis = ntk.num_pis(), num_pos = ntk.num_pos(), int num_pis = ntk.num_pis(), num_pos = ntk.num_pos(),
num_gates = ntk.num_gates(); num_gates = ntk.num_gates();
int size = num_pis + num_pos + num_gates; int size = num_pis + num_pos + num_gates;
vector<vector<double>> adj(size, vector<double>(size, 0)); cout << "size: " << size << endl;
vector<double> value;
vector<vector<int>> coordinate(2);
ntk.foreach_node([&](auto const& n) { ntk.foreach_node([&](auto const& n) {
if (ntk.is_constant(n) || ntk.is_ci(n)) return true; if (ntk.is_constant(n) || ntk.is_ci(n)) return true;
ntk.foreach_fanin(n, [&](auto const& f) { ntk.foreach_fanin(n, [&](auto const& f) {
if (ntk.node_to_index(ntk.get_node(f)) <= num_pis) { if (ntk.node_to_index(ntk.get_node(f)) <= num_pis) {
adj[ntk.node_to_index(n) - num_pis - 1] value.push_back(0.6);
[ntk.node_to_index(ntk.get_node(f)) + num_gates - 1] = 1; coordinate[0].push_back(ntk.node_to_index(n) - num_pis - 1);
adj[ntk.node_to_index(ntk.get_node(f)) + num_gates - 1] coordinate[1].push_back(ntk.node_to_index(ntk.get_node(f)) + num_gates -
[ntk.node_to_index(n) - num_pis - 1] = 1; 1);
value.push_back(0.6);
coordinate[0].push_back(ntk.node_to_index(ntk.get_node(f)) + num_gates -
1);
coordinate[1].push_back(ntk.node_to_index(n) - num_pis - 1);
} else { } else {
adj[ntk.node_to_index(n) - num_pis - 1] value.push_back(1);
[ntk.node_to_index(ntk.get_node(f)) - num_pis - 1] = 0.5; coordinate[0].push_back(ntk.node_to_index(n) - num_pis - 1);
adj[ntk.node_to_index(ntk.get_node(f)) - num_pis - 1] coordinate[1].push_back(ntk.node_to_index(ntk.get_node(f)) - num_pis -
[ntk.node_to_index(n) - num_pis - 1] = 0.5; 1);
value.push_back(1);
coordinate[0].push_back(ntk.node_to_index(ntk.get_node(f)) - num_pis -
1);
coordinate[1].push_back(ntk.node_to_index(n) - num_pis - 1);
} }
return true; return true;
}); });
@ -61,19 +71,33 @@ void write_npz(Ntk const& ntk, std::ostream& os) {
ntk.foreach_po([&](auto const& f, auto i) { ntk.foreach_po([&](auto const& f, auto i) {
if (ntk.node_to_index(ntk.get_node(f)) <= num_pis) { if (ntk.node_to_index(ntk.get_node(f)) <= num_pis) {
adj[i + num_pis + num_gates] value.push_back(0.1);
[ntk.node_to_index(ntk.get_node(f)) + num_gates - 1] = 1; coordinate[0].push_back(i + num_pis + num_gates);
adj[ntk.node_to_index(ntk.get_node(f)) + num_gates - 1] coordinate[1].push_back(ntk.node_to_index(ntk.get_node(f)) + num_gates -
[i + num_pis + num_gates] = 1; 1);
value.push_back(0.1);
coordinate[0].push_back(ntk.node_to_index(ntk.get_node(f)) + num_gates -
1);
coordinate[1].push_back(i + num_pis + num_gates);
} else { } else {
adj[i + num_pis + num_gates] value.push_back(0.6);
[ntk.node_to_index(ntk.get_node(f)) - num_pis - 1] = 0.5; coordinate[0].push_back(i + num_pis + num_gates);
adj[ntk.node_to_index(ntk.get_node(f)) - num_pis - 1] coordinate[1].push_back(ntk.node_to_index(ntk.get_node(f)) - num_pis - 1);
[i + num_pis + num_gates] = 0.5; value.push_back(0.6);
coordinate[0].push_back(ntk.node_to_index(ntk.get_node(f)) - num_pis - 1);
coordinate[1].push_back(i + num_pis + num_gates);
} }
}); });
for (auto x : adj) { for (int i = 0; i < value.size(); i++) {
if (i == value.size() - 1) {
connect << fmt::format("{}", value[i]);
} else {
connect << fmt::format("{}", value[i]) << ",";
}
}
connect << "\n";
for (auto x : coordinate) {
for (int i = 0; i < x.size(); i++) { for (int i = 0; i < x.size(); i++) {
if (i == x.size() - 1) { if (i == x.size() - 1) {
connect << fmt::format("{}", x[i]); connect << fmt::format("{}", x[i]);
@ -89,9 +113,9 @@ void write_npz(Ntk const& ntk, std::ostream& os) {
template <class Ntk> template <class Ntk>
void write_def(Ntk const& ntk, std::ostream& os_def, std::ostream& os_mdef) { void write_def(Ntk const& ntk, std::ostream& os_def, std::ostream& os_mdef) {
std::stringstream components, pins, pins_def; std::stringstream components, pins, pins_def;
cout << "num_pis: " << ntk.num_pis() << endl; // cout << "num_pis: " << ntk.num_pis() << endl;
cout << "num_pos: " << ntk.num_pos() << endl; // cout << "num_pos: " << ntk.num_pos() << endl;
cout << "num_gates: " << ntk.num_gates() << endl; // cout << "num_gates: " << ntk.num_gates() << endl;
int num_pis = ntk.num_pis(), num_pos = ntk.num_pos(), int num_pis = ntk.num_pis(), num_pos = ntk.num_pos(),
num_gates = ntk.num_gates(); num_gates = ntk.num_gates();
int size = num_pis + num_pos + num_gates; int size = num_pis + num_pos + num_gates;

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src/def/ctrl.def Normal file
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@ -0,0 +1,489 @@
COMPONENTS 174 ;
- and_8_ and
+ PLACED ( 132 1053 ) N ;
- and_9_ and
+ PLACED ( 155 1606 ) N ;
- and_10_ and
+ PLACED ( 129 1152 ) N ;
- and_11_ and
+ PLACED ( 98 1141 ) N ;
- and_12_ and
+ PLACED ( 100 1198 ) N ;
- and_13_ and
+ PLACED ( 111 1129 ) N ;
- and_14_ and
+ PLACED ( 119 1079 ) N ;
- and_15_ and
+ PLACED ( 108 904 ) N ;
- and_16_ and
+ PLACED ( 121 904 ) N ;
- and_17_ and
+ PLACED ( 132 1210 ) N ;
- and_18_ and
+ PLACED ( 138 1183 ) N ;
- and_19_ and
+ PLACED ( 117 913 ) N ;
- and_20_ and
+ PLACED ( 132 915 ) N ;
- and_21_ and
+ PLACED ( 131 1005 ) N ;
- and_22_ and
+ PLACED ( 127 1208 ) N ;
- and_23_ and
+ PLACED ( 135 1173 ) N ;
- and_24_ and
+ PLACED ( 134 1131 ) N ;
- and_25_ and
+ PLACED ( 114 1072 ) N ;
- and_26_ and
+ PLACED ( 126 1207 ) N ;
- and_27_ and
+ PLACED ( 120 1069 ) N ;
- and_28_ and
+ PLACED ( 110 899 ) N ;
- and_29_ and
+ PLACED ( 126 982 ) N ;
- and_30_ and
+ PLACED ( 124 1333 ) N ;
- and_31_ and
+ PLACED ( 140 1314 ) N ;
- and_32_ and
+ PLACED ( 137 1015 ) N ;
- and_33_ and
+ PLACED ( 141 981 ) N ;
- and_34_ and
+ PLACED ( 159 1158 ) N ;
- and_35_ and
+ PLACED ( 141 1199 ) N ;
- and_36_ and
+ PLACED ( 115 981 ) N ;
- and_37_ and
+ PLACED ( 117 1277 ) N ;
- and_38_ and
+ PLACED ( 139 1236 ) N ;
- and_39_ and
+ PLACED ( 127 1109 ) N ;
- and_40_ and
+ PLACED ( 114 1056 ) N ;
- and_41_ and
+ PLACED ( 105 940 ) N ;
- and_42_ and
+ PLACED ( 115 906 ) N ;
- and_43_ and
+ PLACED ( 123 1081 ) N ;
- and_44_ and
+ PLACED ( 114 1290 ) N ;
- and_45_ and
+ PLACED ( 131 1322 ) N ;
- and_46_ and
+ PLACED ( 106 908 ) N ;
- and_47_ and
+ PLACED ( 132 1090 ) N ;
- and_48_ and
+ PLACED ( 109 970 ) N ;
- and_49_ and
+ PLACED ( 106 1005 ) N ;
- and_50_ and
+ PLACED ( 105 1016 ) N ;
- and_51_ and
+ PLACED ( 128 1118 ) N ;
- and_52_ and
+ PLACED ( 114 1152 ) N ;
- and_53_ and
+ PLACED ( 93 1086 ) N ;
- and_54_ and
+ PLACED ( 79 1199 ) N ;
- and_55_ and
+ PLACED ( 92 1043 ) N ;
- and_56_ and
+ PLACED ( 95 1331 ) N ;
- and_57_ and
+ PLACED ( 127 1317 ) N ;
- and_58_ and
+ PLACED ( 104 1285 ) N ;
- and_59_ and
+ PLACED ( 108 1192 ) N ;
- and_60_ and
+ PLACED ( 107 1313 ) N ;
- and_61_ and
+ PLACED ( 117 1293 ) N ;
- and_62_ and
+ PLACED ( 108 1229 ) N ;
- and_63_ and
+ PLACED ( 128 1267 ) N ;
- and_64_ and
+ PLACED ( 124 989 ) N ;
- and_65_ and
+ PLACED ( 125 972 ) N ;
- and_66_ and
+ PLACED ( 132 1059 ) N ;
- and_67_ and
+ PLACED ( 136 1139 ) N ;
- and_68_ and
+ PLACED ( 93 975 ) N ;
- and_69_ and
+ PLACED ( 121 1160 ) N ;
- and_70_ and
+ PLACED ( 128 1050 ) N ;
- and_71_ and
+ PLACED ( 144 1234 ) N ;
- and_72_ and
+ PLACED ( 107 1221 ) N ;
- and_73_ and
+ PLACED ( 135 1090 ) N ;
- and_74_ and
+ PLACED ( 141 867 ) N ;
- and_75_ and
+ PLACED ( 136 935 ) N ;
- and_76_ and
+ PLACED ( 109 973 ) N ;
- and_77_ and
+ PLACED ( 114 1093 ) N ;
- and_78_ and
+ PLACED ( 128 1218 ) N ;
- and_79_ and
+ PLACED ( 141 1160 ) N ;
- and_80_ and
+ PLACED ( 136 1063 ) N ;
- and_81_ and
+ PLACED ( 138 1075 ) N ;
- and_82_ and
+ PLACED ( 137 1155 ) N ;
- and_83_ and
+ PLACED ( 145 1078 ) N ;
- and_84_ and
+ PLACED ( 141 1060 ) N ;
- and_85_ and
+ PLACED ( 144 1070 ) N ;
- and_86_ and
+ PLACED ( 134 1107 ) N ;
- and_87_ and
+ PLACED ( 96 1053 ) N ;
- and_88_ and
+ PLACED ( 110 1140 ) N ;
- and_89_ and
+ PLACED ( 128 1277 ) N ;
- and_90_ and
+ PLACED ( 83 1029 ) N ;
- and_91_ and
+ PLACED ( 86 1105 ) N ;
- and_92_ and
+ PLACED ( 127 928 ) N ;
- and_93_ and
+ PLACED ( 131 1041 ) N ;
- and_94_ and
+ PLACED ( 118 1116 ) N ;
- and_95_ and
+ PLACED ( 104 1320 ) N ;
- and_96_ and
+ PLACED ( 114 1049 ) N ;
- and_97_ and
+ PLACED ( 124 1150 ) N ;
- and_98_ and
+ PLACED ( 115 1068 ) N ;
- and_99_ and
+ PLACED ( 105 900 ) N ;
- and_100_ and
+ PLACED ( 106 999 ) N ;
- and_101_ and
+ PLACED ( 124 969 ) N ;
- and_102_ and
+ PLACED ( 126 1019 ) N ;
- and_103_ and
+ PLACED ( 115 1177 ) N ;
- and_104_ and
+ PLACED ( 116 1052 ) N ;
- and_105_ and
+ PLACED ( 124 1087 ) N ;
- and_106_ and
+ PLACED ( 151 1226 ) N ;
- and_107_ and
+ PLACED ( 115 1074 ) N ;
- and_108_ and
+ PLACED ( 122 1005 ) N ;
- and_109_ and
+ PLACED ( 124 915 ) N ;
- and_110_ and
+ PLACED ( 142 1049 ) N ;
- and_111_ and
+ PLACED ( 150 1237 ) N ;
- and_112_ and
+ PLACED ( 105 1021 ) N ;
- and_113_ and
+ PLACED ( 116 1153 ) N ;
- and_114_ and
+ PLACED ( 100 1171 ) N ;
- and_115_ and
+ PLACED ( 98 1300 ) N ;
- and_116_ and
+ PLACED ( 110 1415 ) N ;
- and_117_ and
+ PLACED ( 134 1514 ) N ;
- and_118_ and
+ PLACED ( 102 874 ) N ;
- and_119_ and
+ PLACED ( 118 882 ) N ;
- and_120_ and
+ PLACED ( 122 980 ) N ;
- and_121_ and
+ PLACED ( 92 1070 ) N ;
- and_122_ and
+ PLACED ( 97 1063 ) N ;
- and_123_ and
+ PLACED ( 99 1043 ) N ;
- and_124_ and
+ PLACED ( 113 992 ) N ;
- and_125_ and
+ PLACED ( 137 1201 ) N ;
- and_126_ and
+ PLACED ( 114 946 ) N ;
- and_127_ and
+ PLACED ( 120 946 ) N ;
- and_128_ and
+ PLACED ( 133 1088 ) N ;
- and_129_ and
+ PLACED ( 132 1110 ) N ;
- and_130_ and
+ PLACED ( 156 1265 ) N ;
- and_131_ and
+ PLACED ( 96 1071 ) N ;
- and_132_ and
+ PLACED ( 107 1108 ) N ;
- and_133_ and
+ PLACED ( 103 1031 ) N ;
- and_134_ and
+ PLACED ( 104 1032 ) N ;
- and_135_ and
+ PLACED ( 101 1137 ) N ;
- and_136_ and
+ PLACED ( 112 1313 ) N ;
- and_137_ and
+ PLACED ( 118 1119 ) N ;
- and_138_ and
+ PLACED ( 116 1125 ) N ;
- and_139_ and
+ PLACED ( 96 960 ) N ;
- and_140_ and
+ PLACED ( 100 1092 ) N ;
- and_141_ and
+ PLACED ( 120 1339 ) N ;
- and_142_ and
+ PLACED ( 99 1000 ) N ;
- and_143_ and
+ PLACED ( 89 981 ) N ;
- and_144_ and
+ PLACED ( 97 1017 ) N ;
- and_145_ and
+ PLACED ( 126 1168 ) N ;
- and_146_ and
+ PLACED ( 109 908 ) N ;
- and_147_ and
+ PLACED ( 120 849 ) N ;
- and_148_ and
+ PLACED ( 132 999 ) N ;
- and_149_ and
+ PLACED ( 155 1297 ) N ;
- and_150_ and
+ PLACED ( 103 1037 ) N ;
- and_151_ and
+ PLACED ( 83 858 ) N ;
- and_152_ and
+ PLACED ( 103 1086 ) N ;
- and_153_ and
+ PLACED ( 105 1046 ) N ;
- and_154_ and
+ PLACED ( 144 1058 ) N ;
- and_155_ and
+ PLACED ( 137 1015 ) N ;
- and_156_ and
+ PLACED ( 120 955 ) N ;
- and_157_ and
+ PLACED ( 142 1052 ) N ;
- and_158_ and
+ PLACED ( 147 1032 ) N ;
- and_159_ and
+ PLACED ( 127 1022 ) N ;
- and_160_ and
+ PLACED ( 105 757 ) N ;
- and_161_ and
+ PLACED ( 86 1324 ) N ;
- and_162_ and
+ PLACED ( 77 1406 ) N ;
- and_163_ and
+ PLACED ( 73 1405 ) N ;
- and_164_ and
+ PLACED ( 76 1294 ) N ;
- and_165_ and
+ PLACED ( 82 1255 ) N ;
- and_166_ and
+ PLACED ( 97 1266 ) N ;
- and_167_ and
+ PLACED ( 114 1298 ) N ;
- and_168_ and
+ PLACED ( 108 1256 ) N ;
- and_169_ and
+ PLACED ( 87 1043 ) N ;
- and_170_ and
+ PLACED ( 99 1154 ) N ;
- and_171_ and
+ PLACED ( 85 1089 ) N ;
- and_172_ and
+ PLACED ( 84 954 ) N ;
- and_173_ and
+ PLACED ( 119 1062 ) N ;
- and_174_ and
+ PLACED ( 106 969 ) N ;
- and_175_ and
+ PLACED ( 126 1032 ) N ;
- and_176_ and
+ PLACED ( 126 1027 ) N ;
- and_177_ and
+ PLACED ( 107 938 ) N ;
- and_178_ and
+ PLACED ( 111 1017 ) N ;
- and_179_ and
+ PLACED ( 114 914 ) N ;
- and_180_ and
+ PLACED ( 112 815 ) N ;
- and_181_ and
+ PLACED ( 98 687 ) N ;
END COMPONENTS
PINS 34 ;
- output_0 + NET output_0
+ DIRECTION OUTPUT
+ PLACED ( 0 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_1 + NET output_1
+ DIRECTION OUTPUT
+ PLACED ( 10 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_2 + NET output_2
+ DIRECTION OUTPUT
+ PLACED ( 20 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_3 + NET output_3
+ DIRECTION OUTPUT
+ PLACED ( 30 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_4 + NET output_4
+ DIRECTION OUTPUT
+ PLACED ( 40 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_5 + NET output_5
+ DIRECTION OUTPUT
+ PLACED ( 50 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_6 + NET output_6
+ DIRECTION OUTPUT
+ PLACED ( 60 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_7 + NET output_7
+ DIRECTION OUTPUT
+ PLACED ( 70 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_8 + NET output_8
+ DIRECTION OUTPUT
+ PLACED ( 80 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_9 + NET output_9
+ DIRECTION OUTPUT
+ PLACED ( 90 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_10 + NET output_10
+ DIRECTION OUTPUT
+ PLACED ( 100 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_11 + NET output_11
+ DIRECTION OUTPUT
+ PLACED ( 110 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_12 + NET output_12
+ DIRECTION OUTPUT
+ PLACED ( 120 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_13 + NET output_13
+ DIRECTION OUTPUT
+ PLACED ( 130 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_14 + NET output_14
+ DIRECTION OUTPUT
+ PLACED ( 140 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_15 + NET output_15
+ DIRECTION OUTPUT
+ PLACED ( 150 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_16 + NET output_16
+ DIRECTION OUTPUT
+ PLACED ( 160 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_17 + NET output_17
+ DIRECTION OUTPUT
+ PLACED ( 170 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_18 + NET output_18
+ DIRECTION OUTPUT
+ PLACED ( 180 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_19 + NET output_19
+ DIRECTION OUTPUT
+ PLACED ( 190 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_20 + NET output_20
+ DIRECTION OUTPUT
+ PLACED ( 200 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_21 + NET output_21
+ DIRECTION OUTPUT
+ PLACED ( 210 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_22 + NET output_22
+ DIRECTION OUTPUT
+ PLACED ( 220 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_23 + NET output_23
+ DIRECTION OUTPUT
+ PLACED ( 230 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_24 + NET output_24
+ DIRECTION OUTPUT
+ PLACED ( 240 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_25 + NET output_25
+ DIRECTION OUTPUT
+ PLACED ( 250 2070 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_0 + NET input_0
+ DIRECTION INPUT
+ PLACED ( 0 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_1 + NET input_1
+ DIRECTION INPUT
+ PLACED ( 10 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_2 + NET input_2
+ DIRECTION INPUT
+ PLACED ( 20 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_3 + NET input_3
+ DIRECTION INPUT
+ PLACED ( 30 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_4 + NET input_4
+ DIRECTION INPUT
+ PLACED ( 40 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_5 + NET input_5
+ DIRECTION INPUT
+ PLACED ( 50 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_6 + NET input_6
+ DIRECTION INPUT
+ PLACED ( 60 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_clk + NET input_clk
+ DIRECTION INPUT
+ PLACED ( 70 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
END PINS

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@ -0,0 +1,601 @@
COMPONENTS 260 ;
- and_12_ and
+ PLACED ( 45 1535 ) N ;
- and_13_ and
+ PLACED ( 52 1495 ) N ;
- and_14_ and
+ PLACED ( 55 1515 ) N ;
- and_15_ and
+ PLACED ( 55 1353 ) N ;
- and_16_ and
+ PLACED ( 43 1344 ) N ;
- and_17_ and
+ PLACED ( 49 1389 ) N ;
- and_18_ and
+ PLACED ( 54 1355 ) N ;
- and_19_ and
+ PLACED ( 44 1290 ) N ;
- and_20_ and
+ PLACED ( 41 1233 ) N ;
- and_21_ and
+ PLACED ( 48 1129 ) N ;
- and_22_ and
+ PLACED ( 48 1112 ) N ;
- and_23_ and
+ PLACED ( 53 1025 ) N ;
- and_24_ and
+ PLACED ( 49 1223 ) N ;
- and_25_ and
+ PLACED ( 43 1551 ) N ;
- and_26_ and
+ PLACED ( 47 1314 ) N ;
- and_27_ and
+ PLACED ( 49 1452 ) N ;
- and_28_ and
+ PLACED ( 56 1321 ) N ;
- and_29_ and
+ PLACED ( 55 1232 ) N ;
- and_30_ and
+ PLACED ( 42 1165 ) N ;
- and_31_ and
+ PLACED ( 46 1215 ) N ;
- and_32_ and
+ PLACED ( 53 1232 ) N ;
- and_33_ and
+ PLACED ( 50 1151 ) N ;
- and_34_ and
+ PLACED ( 46 1232 ) N ;
- and_35_ and
+ PLACED ( 49 1252 ) N ;
- and_36_ and
+ PLACED ( 54 1154 ) N ;
- and_37_ and
+ PLACED ( 57 1040 ) N ;
- and_38_ and
+ PLACED ( 51 1139 ) N ;
- and_39_ and
+ PLACED ( 52 1416 ) N ;
- and_40_ and
+ PLACED ( 54 1514 ) N ;
- and_41_ and
+ PLACED ( 48 1492 ) N ;
- and_42_ and
+ PLACED ( 55 1743 ) N ;
- and_43_ and
+ PLACED ( 49 1745 ) N ;
- and_44_ and
+ PLACED ( 49 1746 ) N ;
- and_45_ and
+ PLACED ( 44 1413 ) N ;
- and_46_ and
+ PLACED ( 46 1088 ) N ;
- and_47_ and
+ PLACED ( 48 1338 ) N ;
- and_48_ and
+ PLACED ( 50 1441 ) N ;
- and_49_ and
+ PLACED ( 54 1718 ) N ;
- and_50_ and
+ PLACED ( 50 1643 ) N ;
- and_51_ and
+ PLACED ( 45 1555 ) N ;
- and_52_ and
+ PLACED ( 36 1382 ) N ;
- and_53_ and
+ PLACED ( 39 1435 ) N ;
- and_54_ and
+ PLACED ( 43 1496 ) N ;
- and_55_ and
+ PLACED ( 46 1437 ) N ;
- and_56_ and
+ PLACED ( 40 1500 ) N ;
- and_57_ and
+ PLACED ( 41 1103 ) N ;
- and_58_ and
+ PLACED ( 45 1276 ) N ;
- and_59_ and
+ PLACED ( 49 1054 ) N ;
- and_60_ and
+ PLACED ( 54 1020 ) N ;
- and_61_ and
+ PLACED ( 55 1160 ) N ;
- and_62_ and
+ PLACED ( 52 1318 ) N ;
- and_63_ and
+ PLACED ( 50 1375 ) N ;
- and_64_ and
+ PLACED ( 36 1374 ) N ;
- and_65_ and
+ PLACED ( 40 1466 ) N ;
- and_66_ and
+ PLACED ( 47 1489 ) N ;
- and_67_ and
+ PLACED ( 44 1374 ) N ;
- and_68_ and
+ PLACED ( 44 1302 ) N ;
- and_69_ and
+ PLACED ( 43 1279 ) N ;
- and_70_ and
+ PLACED ( 44 1404 ) N ;
- and_71_ and
+ PLACED ( 40 1388 ) N ;
- and_72_ and
+ PLACED ( 38 1165 ) N ;
- and_73_ and
+ PLACED ( 37 1295 ) N ;
- and_74_ and
+ PLACED ( 43 1351 ) N ;
- and_75_ and
+ PLACED ( 53 1447 ) N ;
- and_76_ and
+ PLACED ( 43 1574 ) N ;
- and_77_ and
+ PLACED ( 40 1332 ) N ;
- and_78_ and
+ PLACED ( 37 1227 ) N ;
- and_79_ and
+ PLACED ( 42 1217 ) N ;
- and_80_ and
+ PLACED ( 44 1216 ) N ;
- and_81_ and
+ PLACED ( 48 1369 ) N ;
- and_82_ and
+ PLACED ( 55 1624 ) N ;
- and_83_ and
+ PLACED ( 57 1419 ) N ;
- and_84_ and
+ PLACED ( 64 1411 ) N ;
- and_85_ and
+ PLACED ( 63 1296 ) N ;
- and_86_ and
+ PLACED ( 51 1531 ) N ;
- and_87_ and
+ PLACED ( 40 1194 ) N ;
- and_88_ and
+ PLACED ( 37 1087 ) N ;
- and_89_ and
+ PLACED ( 38 1051 ) N ;
- and_90_ and
+ PLACED ( 47 1163 ) N ;
- and_91_ and
+ PLACED ( 48 1131 ) N ;
- and_92_ and
+ PLACED ( 62 1323 ) N ;
- and_93_ and
+ PLACED ( 60 1361 ) N ;
- and_94_ and
+ PLACED ( 46 1314 ) N ;
- and_95_ and
+ PLACED ( 50 1515 ) N ;
- and_96_ and
+ PLACED ( 40 1509 ) N ;
- and_97_ and
+ PLACED ( 42 1567 ) N ;
- and_98_ and
+ PLACED ( 50 1666 ) N ;
- and_99_ and
+ PLACED ( 48 1642 ) N ;
- and_100_ and
+ PLACED ( 45 1680 ) N ;
- and_101_ and
+ PLACED ( 41 1103 ) N ;
- and_102_ and
+ PLACED ( 48 1374 ) N ;
- and_103_ and
+ PLACED ( 47 1604 ) N ;
- and_104_ and
+ PLACED ( 42 1507 ) N ;
- and_105_ and
+ PLACED ( 40 1442 ) N ;
- and_106_ and
+ PLACED ( 40 1213 ) N ;
- and_107_ and
+ PLACED ( 39 1555 ) N ;
- and_108_ and
+ PLACED ( 37 1628 ) N ;
- and_109_ and
+ PLACED ( 40 1631 ) N ;
- and_110_ and
+ PLACED ( 45 1535 ) N ;
- and_111_ and
+ PLACED ( 47 1398 ) N ;
- and_112_ and
+ PLACED ( 52 1378 ) N ;
- and_113_ and
+ PLACED ( 56 1495 ) N ;
- and_114_ and
+ PLACED ( 58 1549 ) N ;
- and_115_ and
+ PLACED ( 61 1326 ) N ;
- and_116_ and
+ PLACED ( 52 1012 ) N ;
- and_117_ and
+ PLACED ( 47 1414 ) N ;
- and_118_ and
+ PLACED ( 48 1613 ) N ;
- and_119_ and
+ PLACED ( 57 1530 ) N ;
- and_120_ and
+ PLACED ( 49 1395 ) N ;
- and_121_ and
+ PLACED ( 47 1518 ) N ;
- and_122_ and
+ PLACED ( 48 1417 ) N ;
- and_123_ and
+ PLACED ( 54 1636 ) N ;
- and_124_ and
+ PLACED ( 50 1667 ) N ;
- and_125_ and
+ PLACED ( 51 1637 ) N ;
- and_126_ and
+ PLACED ( 43 1484 ) N ;
- and_127_ and
+ PLACED ( 45 1414 ) N ;
- and_128_ and
+ PLACED ( 43 1545 ) N ;
- and_129_ and
+ PLACED ( 44 1538 ) N ;
- and_130_ and
+ PLACED ( 52 1627 ) N ;
- and_131_ and
+ PLACED ( 53 1400 ) N ;
- and_132_ and
+ PLACED ( 49 1156 ) N ;
- and_133_ and
+ PLACED ( 46 1178 ) N ;
- and_134_ and
+ PLACED ( 47 1167 ) N ;
- and_135_ and
+ PLACED ( 37 1390 ) N ;
- and_136_ and
+ PLACED ( 39 1463 ) N ;
- and_137_ and
+ PLACED ( 47 1461 ) N ;
- and_138_ and
+ PLACED ( 51 1242 ) N ;
- and_139_ and
+ PLACED ( 53 870 ) N ;
- and_140_ and
+ PLACED ( 50 1137 ) N ;
- and_141_ and
+ PLACED ( 50 1229 ) N ;
- and_142_ and
+ PLACED ( 58 1234 ) N ;
- and_143_ and
+ PLACED ( 44 1496 ) N ;
- and_144_ and
+ PLACED ( 51 1504 ) N ;
- and_145_ and
+ PLACED ( 60 1464 ) N ;
- and_146_ and
+ PLACED ( 56 1586 ) N ;
- and_147_ and
+ PLACED ( 40 1357 ) N ;
- and_148_ and
+ PLACED ( 51 1666 ) N ;
- and_149_ and
+ PLACED ( 47 1485 ) N ;
- and_150_ and
+ PLACED ( 44 1416 ) N ;
- and_151_ and
+ PLACED ( 45 1457 ) N ;
- and_152_ and
+ PLACED ( 50 1459 ) N ;
- and_153_ and
+ PLACED ( 55 1572 ) N ;
- and_154_ and
+ PLACED ( 49 1449 ) N ;
- and_155_ and
+ PLACED ( 49 1324 ) N ;
- and_156_ and
+ PLACED ( 50 1467 ) N ;
- and_157_ and
+ PLACED ( 41 1571 ) N ;
- and_158_ and
+ PLACED ( 49 1707 ) N ;
- and_159_ and
+ PLACED ( 49 1629 ) N ;
- and_160_ and
+ PLACED ( 47 1582 ) N ;
- and_161_ and
+ PLACED ( 38 1424 ) N ;
- and_162_ and
+ PLACED ( 47 1546 ) N ;
- and_163_ and
+ PLACED ( 44 1621 ) N ;
- and_164_ and
+ PLACED ( 49 1585 ) N ;
- and_165_ and
+ PLACED ( 44 1378 ) N ;
- and_166_ and
+ PLACED ( 40 1277 ) N ;
- and_167_ and
+ PLACED ( 52 1390 ) N ;
- and_168_ and
+ PLACED ( 49 1313 ) N ;
- and_169_ and
+ PLACED ( 41 1267 ) N ;
- and_170_ and
+ PLACED ( 39 1352 ) N ;
- and_171_ and
+ PLACED ( 46 1391 ) N ;
- and_172_ and
+ PLACED ( 46 1180 ) N ;
- and_173_ and
+ PLACED ( 47 1084 ) N ;
- and_174_ and
+ PLACED ( 43 1383 ) N ;
- and_175_ and
+ PLACED ( 42 1350 ) N ;
- and_176_ and
+ PLACED ( 51 1172 ) N ;
- and_177_ and
+ PLACED ( 53 1183 ) N ;
- and_178_ and
+ PLACED ( 55 1379 ) N ;
- and_179_ and
+ PLACED ( 48 1252 ) N ;
- and_180_ and
+ PLACED ( 52 1378 ) N ;
- and_181_ and
+ PLACED ( 57 1574 ) N ;
- and_182_ and
+ PLACED ( 61 1665 ) N ;
- and_183_ and
+ PLACED ( 56 1647 ) N ;
- and_184_ and
+ PLACED ( 49 1472 ) N ;
- and_185_ and
+ PLACED ( 44 1353 ) N ;
- and_186_ and
+ PLACED ( 43 1217 ) N ;
- and_187_ and
+ PLACED ( 44 1166 ) N ;
- and_188_ and
+ PLACED ( 46 1195 ) N ;
- and_189_ and
+ PLACED ( 50 1304 ) N ;
- and_190_ and
+ PLACED ( 46 1081 ) N ;
- and_191_ and
+ PLACED ( 44 1134 ) N ;
- and_192_ and
+ PLACED ( 45 1141 ) N ;
- and_193_ and
+ PLACED ( 50 1169 ) N ;
- and_194_ and
+ PLACED ( 53 1096 ) N ;
- and_195_ and
+ PLACED ( 53 981 ) N ;
- and_196_ and
+ PLACED ( 54 1103 ) N ;
- and_197_ and
+ PLACED ( 53 1237 ) N ;
- and_198_ and
+ PLACED ( 42 1115 ) N ;
- and_199_ and
+ PLACED ( 39 1235 ) N ;
- and_200_ and
+ PLACED ( 43 1275 ) N ;
- and_201_ and
+ PLACED ( 52 1216 ) N ;
- and_202_ and
+ PLACED ( 51 968 ) N ;
- and_203_ and
+ PLACED ( 47 1117 ) N ;
- and_204_ and
+ PLACED ( 47 1150 ) N ;
- and_205_ and
+ PLACED ( 46 1061 ) N ;
- and_206_ and
+ PLACED ( 45 1103 ) N ;
- and_207_ and
+ PLACED ( 44 1432 ) N ;
- and_208_ and
+ PLACED ( 39 1384 ) N ;
- and_209_ and
+ PLACED ( 42 1137 ) N ;
- and_210_ and
+ PLACED ( 45 1005 ) N ;
- and_211_ and
+ PLACED ( 47 992 ) N ;
- and_212_ and
+ PLACED ( 49 889 ) N ;
- and_213_ and
+ PLACED ( 48 1574 ) N ;
- and_214_ and
+ PLACED ( 45 1373 ) N ;
- and_215_ and
+ PLACED ( 50 1523 ) N ;
- and_216_ and
+ PLACED ( 45 1396 ) N ;
- and_217_ and
+ PLACED ( 52 1620 ) N ;
- and_218_ and
+ PLACED ( 56 1647 ) N ;
- and_219_ and
+ PLACED ( 55 1515 ) N ;
- and_220_ and
+ PLACED ( 53 1287 ) N ;
- and_221_ and
+ PLACED ( 45 1189 ) N ;
- and_222_ and
+ PLACED ( 54 1276 ) N ;
- and_223_ and
+ PLACED ( 58 1279 ) N ;
- and_224_ and
+ PLACED ( 38 1427 ) N ;
- and_225_ and
+ PLACED ( 45 1614 ) N ;
- and_226_ and
+ PLACED ( 47 1629 ) N ;
- and_227_ and
+ PLACED ( 43 1528 ) N ;
- and_228_ and
+ PLACED ( 45 1553 ) N ;
- and_229_ and
+ PLACED ( 57 1340 ) N ;
- and_230_ and
+ PLACED ( 55 1127 ) N ;
- and_231_ and
+ PLACED ( 55 1096 ) N ;
- and_232_ and
+ PLACED ( 51 1121 ) N ;
- and_233_ and
+ PLACED ( 38 1238 ) N ;
- and_234_ and
+ PLACED ( 42 1339 ) N ;
- and_235_ and
+ PLACED ( 46 1376 ) N ;
- and_236_ and
+ PLACED ( 49 1392 ) N ;
- and_237_ and
+ PLACED ( 50 1287 ) N ;
- and_238_ and
+ PLACED ( 48 1226 ) N ;
- and_239_ and
+ PLACED ( 44 1292 ) N ;
- and_240_ and
+ PLACED ( 35 1131 ) N ;
- and_241_ and
+ PLACED ( 34 1176 ) N ;
- and_242_ and
+ PLACED ( 41 1325 ) N ;
- and_243_ and
+ PLACED ( 49 1268 ) N ;
- and_244_ and
+ PLACED ( 50 1050 ) N ;
- and_245_ and
+ PLACED ( 41 1058 ) N ;
- and_246_ and
+ PLACED ( 50 1145 ) N ;
- and_247_ and
+ PLACED ( 43 1655 ) N ;
- and_248_ and
+ PLACED ( 47 1654 ) N ;
- and_249_ and
+ PLACED ( 50 1252 ) N ;
- and_250_ and
+ PLACED ( 53 1275 ) N ;
- and_251_ and
+ PLACED ( 56 1487 ) N ;
- and_252_ and
+ PLACED ( 57 1371 ) N ;
- and_253_ and
+ PLACED ( 55 1384 ) N ;
- and_254_ and
+ PLACED ( 52 1134 ) N ;
- and_255_ and
+ PLACED ( 49 1404 ) N ;
- and_256_ and
+ PLACED ( 58 1388 ) N ;
- and_257_ and
+ PLACED ( 60 1377 ) N ;
- and_258_ and
+ PLACED ( 56 1229 ) N ;
- and_259_ and
+ PLACED ( 44 1359 ) N ;
- and_260_ and
+ PLACED ( 47 1251 ) N ;
- and_261_ and
+ PLACED ( 48 1282 ) N ;
- and_262_ and
+ PLACED ( 50 1094 ) N ;
- and_263_ and
+ PLACED ( 52 1050 ) N ;
- and_264_ and
+ PLACED ( 44 1004 ) N ;
- and_265_ and
+ PLACED ( 53 1084 ) N ;
- and_266_ and
+ PLACED ( 60 1036 ) N ;
- and_267_ and
+ PLACED ( 41 1386 ) N ;
- and_268_ and
+ PLACED ( 40 1301 ) N ;
- and_269_ and
+ PLACED ( 37 1082 ) N ;
- and_270_ and
+ PLACED ( 40 948 ) N ;
- and_271_ and
+ PLACED ( 51 787 ) N ;
END COMPONENTS
PINS 19 ;
- output_0 + NET output_0
+ DIRECTION OUTPUT
+ PLACED ( 0 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_1 + NET output_1
+ DIRECTION OUTPUT
+ PLACED ( 10 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_2 + NET output_2
+ DIRECTION OUTPUT
+ PLACED ( 20 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_3 + NET output_3
+ DIRECTION OUTPUT
+ PLACED ( 30 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_4 + NET output_4
+ DIRECTION OUTPUT
+ PLACED ( 40 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_5 + NET output_5
+ DIRECTION OUTPUT
+ PLACED ( 50 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_6 + NET output_6
+ DIRECTION OUTPUT
+ PLACED ( 60 2780 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_0 + NET input_0
+ DIRECTION INPUT
+ PLACED ( 0 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_1 + NET input_1
+ DIRECTION INPUT
+ PLACED ( 10 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_2 + NET input_2
+ DIRECTION INPUT
+ PLACED ( 20 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_3 + NET input_3
+ DIRECTION INPUT
+ PLACED ( 30 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_4 + NET input_4
+ DIRECTION INPUT
+ PLACED ( 40 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_5 + NET input_5
+ DIRECTION INPUT
+ PLACED ( 50 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_6 + NET input_6
+ DIRECTION INPUT
+ PLACED ( 60 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_7 + NET input_7
+ DIRECTION INPUT
+ PLACED ( 70 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_8 + NET input_8
+ DIRECTION INPUT
+ PLACED ( 80 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_9 + NET input_9
+ DIRECTION INPUT
+ PLACED ( 90 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_10 + NET input_10
+ DIRECTION INPUT
+ PLACED ( 100 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_clk + NET input_clk
+ DIRECTION INPUT
+ PLACED ( 110 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
END PINS

64385
src/def/log2.def Normal file
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8307
src/def/max.def Normal file
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103421
src/def/mem_ctrl.def Normal file
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55157
src/def/multiplier.def Normal file
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2509
src/def/priority.def Normal file
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src/def/router.def Normal file
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@ -0,0 +1,883 @@
COMPONENTS 257 ;
- and_61_ and
+ PLACED ( 310 2616 ) N ;
- and_62_ and
+ PLACED ( 205 2294 ) N ;
- and_63_ and
+ PLACED ( 304 2195 ) N ;
- and_64_ and
+ PLACED ( 334 2589 ) N ;
- and_65_ and
+ PLACED ( 308 2462 ) N ;
- and_66_ and
+ PLACED ( 363 2293 ) N ;
- and_67_ and
+ PLACED ( 274 2559 ) N ;
- and_68_ and
+ PLACED ( 281 2062 ) N ;
- and_69_ and
+ PLACED ( 293 2042 ) N ;
- and_70_ and
+ PLACED ( 256 2462 ) N ;
- and_71_ and
+ PLACED ( 216 2397 ) N ;
- and_72_ and
+ PLACED ( 259 2277 ) N ;
- and_73_ and
+ PLACED ( 255 2481 ) N ;
- and_74_ and
+ PLACED ( 229 2014 ) N ;
- and_75_ and
+ PLACED ( 255 2014 ) N ;
- and_76_ and
+ PLACED ( 189 2070 ) N ;
- and_77_ and
+ PLACED ( 214 1992 ) N ;
- and_78_ and
+ PLACED ( 243 2128 ) N ;
- and_79_ and
+ PLACED ( 239 2277 ) N ;
- and_80_ and
+ PLACED ( 278 2365 ) N ;
- and_81_ and
+ PLACED ( 259 2180 ) N ;
- and_82_ and
+ PLACED ( 307 2089 ) N ;
- and_83_ and
+ PLACED ( 313 2224 ) N ;
- and_84_ and
+ PLACED ( 238 2203 ) N ;
- and_85_ and
+ PLACED ( 303 2166 ) N ;
- and_86_ and
+ PLACED ( 337 2031 ) N ;
- and_87_ and
+ PLACED ( 304 1909 ) N ;
- and_88_ and
+ PLACED ( 332 2018 ) N ;
- and_89_ and
+ PLACED ( 384 2054 ) N ;
- and_90_ and
+ PLACED ( 303 1615 ) N ;
- and_91_ and
+ PLACED ( 368 1616 ) N ;
- and_92_ and
+ PLACED ( 323 1651 ) N ;
- and_93_ and
+ PLACED ( 323 1534 ) N ;
- and_94_ and
+ PLACED ( 372 1555 ) N ;
- and_95_ and
+ PLACED ( 324 2145 ) N ;
- and_96_ and
+ PLACED ( 318 2420 ) N ;
- and_97_ and
+ PLACED ( 317 2235 ) N ;
- and_98_ and
+ PLACED ( 356 2259 ) N ;
- and_99_ and
+ PLACED ( 297 2140 ) N ;
- and_100_ and
+ PLACED ( 257 2135 ) N ;
- and_101_ and
+ PLACED ( 300 1985 ) N ;
- and_102_ and
+ PLACED ( 337 2069 ) N ;
- and_103_ and
+ PLACED ( 223 1745 ) N ;
- and_104_ and
+ PLACED ( 244 1547 ) N ;
- and_105_ and
+ PLACED ( 307 1585 ) N ;
- and_106_ and
+ PLACED ( 288 1603 ) N ;
- and_107_ and
+ PLACED ( 305 1539 ) N ;
- and_108_ and
+ PLACED ( 346 2385 ) N ;
- and_109_ and
+ PLACED ( 308 2183 ) N ;
- and_110_ and
+ PLACED ( 327 2264 ) N ;
- and_111_ and
+ PLACED ( 331 2193 ) N ;
- and_112_ and
+ PLACED ( 261 2353 ) N ;
- and_113_ and
+ PLACED ( 265 2397 ) N ;
- and_114_ and
+ PLACED ( 206 2187 ) N ;
- and_115_ and
+ PLACED ( 241 2096 ) N ;
- and_116_ and
+ PLACED ( 290 2393 ) N ;
- and_117_ and
+ PLACED ( 267 2029 ) N ;
- and_118_ and
+ PLACED ( 308 2041 ) N ;
- and_119_ and
+ PLACED ( 233 1936 ) N ;
- and_120_ and
+ PLACED ( 216 1873 ) N ;
- and_121_ and
+ PLACED ( 252 2005 ) N ;
- and_122_ and
+ PLACED ( 263 2196 ) N ;
- and_123_ and
+ PLACED ( 217 1998 ) N ;
- and_124_ and
+ PLACED ( 215 1874 ) N ;
- and_125_ and
+ PLACED ( 223 1913 ) N ;
- and_126_ and
+ PLACED ( 239 1851 ) N ;
- and_127_ and
+ PLACED ( 273 1759 ) N ;
- and_128_ and
+ PLACED ( 292 1742 ) N ;
- and_129_ and
+ PLACED ( 257 1738 ) N ;
- and_130_ and
+ PLACED ( 283 1695 ) N ;
- and_131_ and
+ PLACED ( 283 1353 ) N ;
- and_132_ and
+ PLACED ( 264 1282 ) N ;
- and_133_ and
+ PLACED ( 305 1546 ) N ;
- and_134_ and
+ PLACED ( 339 1711 ) N ;
- and_135_ and
+ PLACED ( 343 1481 ) N ;
- and_136_ and
+ PLACED ( 339 1615 ) N ;
- and_137_ and
+ PLACED ( 316 1972 ) N ;
- and_138_ and
+ PLACED ( 308 2115 ) N ;
- and_139_ and
+ PLACED ( 303 2104 ) N ;
- and_140_ and
+ PLACED ( 273 2136 ) N ;
- and_141_ and
+ PLACED ( 265 2039 ) N ;
- and_142_ and
+ PLACED ( 255 1948 ) N ;
- and_143_ and
+ PLACED ( 271 1689 ) N ;
- and_144_ and
+ PLACED ( 318 1652 ) N ;
- and_145_ and
+ PLACED ( 309 1789 ) N ;
- and_146_ and
+ PLACED ( 285 2384 ) N ;
- and_147_ and
+ PLACED ( 283 2733 ) N ;
- and_148_ and
+ PLACED ( 265 2766 ) N ;
- and_149_ and
+ PLACED ( 238 2669 ) N ;
- and_150_ and
+ PLACED ( 235 2556 ) N ;
- and_151_ and
+ PLACED ( 244 2315 ) N ;
- and_152_ and
+ PLACED ( 257 2023 ) N ;
- and_153_ and
+ PLACED ( 252 1854 ) N ;
- and_154_ and
+ PLACED ( 238 1676 ) N ;
- and_155_ and
+ PLACED ( 264 1872 ) N ;
- and_156_ and
+ PLACED ( 288 1660 ) N ;
- and_157_ and
+ PLACED ( 235 2521 ) N ;
- and_158_ and
+ PLACED ( 269 2239 ) N ;
- and_159_ and
+ PLACED ( 304 1991 ) N ;
- and_160_ and
+ PLACED ( 324 2064 ) N ;
- and_161_ and
+ PLACED ( 329 2322 ) N ;
- and_162_ and
+ PLACED ( 327 2514 ) N ;
- and_163_ and
+ PLACED ( 316 2452 ) N ;
- and_164_ and
+ PLACED ( 318 2129 ) N ;
- and_165_ and
+ PLACED ( 332 2052 ) N ;
- and_166_ and
+ PLACED ( 297 1862 ) N ;
- and_167_ and
+ PLACED ( 259 1808 ) N ;
- and_168_ and
+ PLACED ( 234 1632 ) N ;
- and_169_ and
+ PLACED ( 240 1637 ) N ;
- and_170_ and
+ PLACED ( 283 1638 ) N ;
- and_171_ and
+ PLACED ( 290 1746 ) N ;
- and_172_ and
+ PLACED ( 304 1747 ) N ;
- and_173_ and
+ PLACED ( 343 1524 ) N ;
- and_174_ and
+ PLACED ( 357 1552 ) N ;
- and_175_ and
+ PLACED ( 334 1953 ) N ;
- and_176_ and
+ PLACED ( 270 1854 ) N ;
- and_177_ and
+ PLACED ( 208 1512 ) N ;
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+ PLACED ( 223 2000 ) N ;
- and_316_ and
+ PLACED ( 313 1711 ) N ;
- and_317_ and
+ PLACED ( 529 888 ) N ;
END COMPONENTS
PINS 91 ;
- output_0 + NET output_0
+ DIRECTION OUTPUT
+ PLACED ( 0 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_1 + NET output_1
+ DIRECTION OUTPUT
+ PLACED ( 10 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_2 + NET output_2
+ DIRECTION OUTPUT
+ PLACED ( 20 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_3 + NET output_3
+ DIRECTION OUTPUT
+ PLACED ( 30 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_4 + NET output_4
+ DIRECTION OUTPUT
+ PLACED ( 40 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_5 + NET output_5
+ DIRECTION OUTPUT
+ PLACED ( 50 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_6 + NET output_6
+ DIRECTION OUTPUT
+ PLACED ( 60 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_7 + NET output_7
+ DIRECTION OUTPUT
+ PLACED ( 70 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_8 + NET output_8
+ DIRECTION OUTPUT
+ PLACED ( 80 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_9 + NET output_9
+ DIRECTION OUTPUT
+ PLACED ( 90 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_10 + NET output_10
+ DIRECTION OUTPUT
+ PLACED ( 100 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_11 + NET output_11
+ DIRECTION OUTPUT
+ PLACED ( 110 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_12 + NET output_12
+ DIRECTION OUTPUT
+ PLACED ( 120 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_13 + NET output_13
+ DIRECTION OUTPUT
+ PLACED ( 130 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_14 + NET output_14
+ DIRECTION OUTPUT
+ PLACED ( 140 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_15 + NET output_15
+ DIRECTION OUTPUT
+ PLACED ( 150 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_16 + NET output_16
+ DIRECTION OUTPUT
+ PLACED ( 160 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_17 + NET output_17
+ DIRECTION OUTPUT
+ PLACED ( 170 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_18 + NET output_18
+ DIRECTION OUTPUT
+ PLACED ( 180 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_19 + NET output_19
+ DIRECTION OUTPUT
+ PLACED ( 190 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_20 + NET output_20
+ DIRECTION OUTPUT
+ PLACED ( 200 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_21 + NET output_21
+ DIRECTION OUTPUT
+ PLACED ( 210 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_22 + NET output_22
+ DIRECTION OUTPUT
+ PLACED ( 220 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_23 + NET output_23
+ DIRECTION OUTPUT
+ PLACED ( 230 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_24 + NET output_24
+ DIRECTION OUTPUT
+ PLACED ( 240 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_25 + NET output_25
+ DIRECTION OUTPUT
+ PLACED ( 250 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_26 + NET output_26
+ DIRECTION OUTPUT
+ PLACED ( 260 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_27 + NET output_27
+ DIRECTION OUTPUT
+ PLACED ( 270 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_28 + NET output_28
+ DIRECTION OUTPUT
+ PLACED ( 280 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- output_29 + NET output_29
+ DIRECTION OUTPUT
+ PLACED ( 290 3470 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_0 + NET input_0
+ DIRECTION INPUT
+ PLACED ( 0 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_1 + NET input_1
+ DIRECTION INPUT
+ PLACED ( 10 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_2 + NET input_2
+ DIRECTION INPUT
+ PLACED ( 20 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_3 + NET input_3
+ DIRECTION INPUT
+ PLACED ( 30 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_4 + NET input_4
+ DIRECTION INPUT
+ PLACED ( 40 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_5 + NET input_5
+ DIRECTION INPUT
+ PLACED ( 50 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_6 + NET input_6
+ DIRECTION INPUT
+ PLACED ( 60 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_7 + NET input_7
+ DIRECTION INPUT
+ PLACED ( 70 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_8 + NET input_8
+ DIRECTION INPUT
+ PLACED ( 80 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_9 + NET input_9
+ DIRECTION INPUT
+ PLACED ( 90 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_10 + NET input_10
+ DIRECTION INPUT
+ PLACED ( 100 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_11 + NET input_11
+ DIRECTION INPUT
+ PLACED ( 110 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_12 + NET input_12
+ DIRECTION INPUT
+ PLACED ( 120 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_13 + NET input_13
+ DIRECTION INPUT
+ PLACED ( 130 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_14 + NET input_14
+ DIRECTION INPUT
+ PLACED ( 140 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_15 + NET input_15
+ DIRECTION INPUT
+ PLACED ( 150 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_16 + NET input_16
+ DIRECTION INPUT
+ PLACED ( 160 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_17 + NET input_17
+ DIRECTION INPUT
+ PLACED ( 170 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_18 + NET input_18
+ DIRECTION INPUT
+ PLACED ( 180 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_19 + NET input_19
+ DIRECTION INPUT
+ PLACED ( 190 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_20 + NET input_20
+ DIRECTION INPUT
+ PLACED ( 200 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_21 + NET input_21
+ DIRECTION INPUT
+ PLACED ( 210 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_22 + NET input_22
+ DIRECTION INPUT
+ PLACED ( 220 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_23 + NET input_23
+ DIRECTION INPUT
+ PLACED ( 230 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_24 + NET input_24
+ DIRECTION INPUT
+ PLACED ( 240 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_25 + NET input_25
+ DIRECTION INPUT
+ PLACED ( 250 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_26 + NET input_26
+ DIRECTION INPUT
+ PLACED ( 260 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_27 + NET input_27
+ DIRECTION INPUT
+ PLACED ( 270 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_28 + NET input_28
+ DIRECTION INPUT
+ PLACED ( 280 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_29 + NET input_29
+ DIRECTION INPUT
+ PLACED ( 290 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_30 + NET input_30
+ DIRECTION INPUT
+ PLACED ( 300 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_31 + NET input_31
+ DIRECTION INPUT
+ PLACED ( 310 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_32 + NET input_32
+ DIRECTION INPUT
+ PLACED ( 320 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_33 + NET input_33
+ DIRECTION INPUT
+ PLACED ( 330 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_34 + NET input_34
+ DIRECTION INPUT
+ PLACED ( 340 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_35 + NET input_35
+ DIRECTION INPUT
+ PLACED ( 350 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_36 + NET input_36
+ DIRECTION INPUT
+ PLACED ( 360 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_37 + NET input_37
+ DIRECTION INPUT
+ PLACED ( 370 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_38 + NET input_38
+ DIRECTION INPUT
+ PLACED ( 380 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_39 + NET input_39
+ DIRECTION INPUT
+ PLACED ( 390 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_40 + NET input_40
+ DIRECTION INPUT
+ PLACED ( 400 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_41 + NET input_41
+ DIRECTION INPUT
+ PLACED ( 410 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_42 + NET input_42
+ DIRECTION INPUT
+ PLACED ( 420 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_43 + NET input_43
+ DIRECTION INPUT
+ PLACED ( 430 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_44 + NET input_44
+ DIRECTION INPUT
+ PLACED ( 440 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_45 + NET input_45
+ DIRECTION INPUT
+ PLACED ( 450 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_46 + NET input_46
+ DIRECTION INPUT
+ PLACED ( 460 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_47 + NET input_47
+ DIRECTION INPUT
+ PLACED ( 470 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_48 + NET input_48
+ DIRECTION INPUT
+ PLACED ( 480 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_49 + NET input_49
+ DIRECTION INPUT
+ PLACED ( 490 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_50 + NET input_50
+ DIRECTION INPUT
+ PLACED ( 500 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_51 + NET input_51
+ DIRECTION INPUT
+ PLACED ( 510 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_52 + NET input_52
+ DIRECTION INPUT
+ PLACED ( 520 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_53 + NET input_53
+ DIRECTION INPUT
+ PLACED ( 530 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_54 + NET input_54
+ DIRECTION INPUT
+ PLACED ( 540 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_55 + NET input_55
+ DIRECTION INPUT
+ PLACED ( 550 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_56 + NET input_56
+ DIRECTION INPUT
+ PLACED ( 560 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_57 + NET input_57
+ DIRECTION INPUT
+ PLACED ( 570 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_58 + NET input_58
+ DIRECTION INPUT
+ PLACED ( 580 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_59 + NET input_59
+ DIRECTION INPUT
+ PLACED ( 590 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
- input_clk + NET input_clk
+ DIRECTION INPUT
+ PLACED ( 600 0 ) N
+ LAYER metal3 ( 0 0 ) ( 510 100 ) ;
END PINS

11037
src/def/sin.def Normal file
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File diff suppressed because it is too large Load Diff

50013
src/def/sqrt.def Normal file
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File diff suppressed because it is too large Load Diff

37745
src/def/square.def Normal file
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File diff suppressed because it is too large Load Diff

31533
src/def/voter.def Normal file
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File diff suppressed because it is too large Load Diff

2
src/networks/stp/stp_npn.hpp
View File

@ -73,7 +73,7 @@ class stp_npn_resynthesis {
std::unordered_map<std::string, std::vector<std::string>> opt_klut; std::unordered_map<std::string, std::vector<std::string>> opt_klut;
void load_optimal_klut() { void load_optimal_klut() {
std::ifstream infile("../src/networks/stp/opt_map.txt"); std::ifstream infile("../src/networks/stp/opt_stp.txt");
if (!infile) { if (!infile) {
std::cout << " Cannot open file " << std::endl; std::cout << " Cannot open file " << std::endl;
assert(false); assert(false);

3
src/phyLS.cpp
View File

@ -77,8 +77,7 @@
#include "commands/xmg/xmgrs.hpp" #include "commands/xmg/xmgrs.hpp"
#include "commands/xmg/xmgrw.hpp" #include "commands/xmg/xmgrw.hpp"
#include "commands/exact/exact_multi.hpp" #include "commands/exact/exact_multi.hpp"
#include "commands/to_npz.hpp"
// #include "commands/exact/exact_klut.hpp" // #include "commands/exact/exact_klut.hpp"
// #include "commands/exact/exactlut.hpp" // #include "commands/exact/exactlut.hpp"
#include "commands/to_npz.hpp"
ALICE_MAIN(phyLS) ALICE_MAIN(phyLS)