PigMAP update
panhomyoung
parent
d95f10767a
commit
d7ee97b059
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GATE _const0_ 0.00 z=CONST0;
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GATE _const1_ 0.00 z=CONST1;
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GATE AO211x2_ASAP7_75t_R 3.73 Y=(A1 * A2) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO21x1_ASAP7_75t_R 1.40 Y=(A1 * A2) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO21x2_ASAP7_75t_R 1.63 Y=(A1 * A2) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO221x1_ASAP7_75t_R 2.33 Y=(A1 * A2) + (B1 * B2) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO221x2_ASAP7_75t_R 2.57 Y=(A1 * A2) + (B1 * B2) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO222x2_ASAP7_75t_R 5.13 Y=(A1 * A2) + (B1 * B2) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO22x1_ASAP7_75t_R 2.10 Y=(A1 * A2) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO22x2_ASAP7_75t_R 2.33 Y=(A1 * A2) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO31x2_ASAP7_75t_R 3.73 Y=(A1 * A2 * A3) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO322x2_ASAP7_75t_R 3.50 Y=(A1 * A2 * A3) + (B1 * B2) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO32x1_ASAP7_75t_R 1.87 Y=(A1 * A2 * A3) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO32x2_ASAP7_75t_R 2.10 Y=(A1 * A2 * A3) + (B1 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO331x1_ASAP7_75t_R 2.33 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO331x2_ASAP7_75t_R 2.57 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO332x1_ASAP7_75t_R 2.57 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO332x2_ASAP7_75t_R 2.80 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO333x1_ASAP7_75t_R 2.80 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO333x2_ASAP7_75t_R 3.03 Y=(A1 * A2 * A3) + (B1 * B2 * B3) + (C1 * C2 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AO33x2_ASAP7_75t_R 2.33 Y=(A1 * A2 * A3) + (B1 * B2 * B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI211x1_ASAP7_75t_R 2.80 Y=(!A1 * !B * !C) + (!A2 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI211xp5_ASAP7_75t_R 1.40 Y=(!A1 * !B * !C) + (!A2 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI21x1_ASAP7_75t_R 1.87 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI21xp33_ASAP7_75t_R 1.17 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI21xp5_ASAP7_75t_R 1.17 Y=(!A1 * !B) + (!A2 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI221x1_ASAP7_75t_R 3.27 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI221xp5_ASAP7_75t_R 1.63 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI222xp33_ASAP7_75t_R 2.33 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI22x1_ASAP7_75t_R 2.33 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI22xp33_ASAP7_75t_R 1.40 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI22xp5_ASAP7_75t_R 1.40 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI311xp33_ASAP7_75t_R 1.63 Y=(!A1 * !B * !C) + (!A2 * !B * !C) + (!A3 * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI31xp33_ASAP7_75t_R 1.40 Y=(!A1 * !B) + (!A2 * !B) + (!A3 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI31xp67_ASAP7_75t_R 3.03 Y=(!A1 * !B) + (!A2 * !B) + (!A3 * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI321xp33_ASAP7_75t_R 1.87 Y=(!A1 * !B1 * !C) + (!A1 * !B2 * !C) + (!A2 * !B1 * !C) + (!A2 * !B2 * !C) + (!A3 * !B1 * !C) + (!A3 * !B2 * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI322xp5_ASAP7_75t_R 2.10 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI32xp33_ASAP7_75t_R 1.63 Y=(!A1 * !B1) + (!A1 * !B2) + (!A2 * !B1) + (!A2 * !B2) + (!A3 * !B1) + (!A3 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI331xp33_ASAP7_75t_R 2.10 Y=(!A1 * !B1 * !C1) + (!A1 * !B2 * !C1) + (!A1 * !B3 * !C1) + (!A2 * !B1 * !C1) + (!A2 * !B2 * !C1) + (!A2 * !B3 * !C1) + (!A3 * !B1 * !C1) + (!A3 * !B2 * !C1) + (!A3 * !B3 * !C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI332xp33_ASAP7_75t_R 2.33 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A1 * !B3 * !C1) + (!A1 * !B3 * !C2) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A2 * !B3 * !C1) + (!A2 * !B3 * !C2) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2) + (!A3 * !B3 * !C1) + (!A3 * !B3 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI333xp33_ASAP7_75t_R 2.57 Y=(!A1 * !B1 * !C1) + (!A1 * !B1 * !C2) + (!A1 * !B1 * !C3) + (!A1 * !B2 * !C1) + (!A1 * !B2 * !C2) + (!A1 * !B2 * !C3) + (!A1 * !B3 * !C1) + (!A1 * !B3 * !C2) + (!A1 * !B3 * !C3) + (!A2 * !B1 * !C1) + (!A2 * !B1 * !C2) + (!A2 * !B1 * !C3) + (!A2 * !B2 * !C1) + (!A2 * !B2 * !C2) + (!A2 * !B2 * !C3) + (!A2 * !B3 * !C1) + (!A2 * !B3 * !C2) + (!A2 * !B3 * !C3) + (!A3 * !B1 * !C1) + (!A3 * !B1 * !C2) + (!A3 * !B1 * !C3) + (!A3 * !B2 * !C1) + (!A3 * !B2 * !C2) + (!A3 * !B2 * !C3) + (!A3 * !B3 * !C1) + (!A3 * !B3 * !C2) + (!A3 * !B3 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE AOI33xp33_ASAP7_75t_R 1.87 Y=(!A1 * !B1) + (!A1 * !B2) + (!A1 * !B3) + (!A2 * !B1) + (!A2 * !B2) + (!A2 * !B3) + (!A3 * !B1) + (!A3 * !B2) + (!A3 * !B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA211x2_ASAP7_75t_R 1.87 Y=(A1 * B * C) + (A2 * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA21x2_ASAP7_75t_R 1.63 Y=(A1 * B) + (A2 * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA221x2_ASAP7_75t_R 3.73 Y=(A1 * B1 * C) + (A1 * B2 * C) + (A2 * B1 * C) + (A2 * B2 * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA222x2_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA22x2_ASAP7_75t_R 2.33 Y=(A1 * B1) + (A1 * B2) + (A2 * B1) + (A2 * B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA31x2_ASAP7_75t_R 3.50 Y=(A1 * B1) + (A2 * B1) + (A3 * B1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA331x1_ASAP7_75t_R 2.33 Y=(A1 * B1 * C1) + (A1 * B2 * C1) + (A1 * B3 * C1) + (A2 * B1 * C1) + (A2 * B2 * C1) + (A2 * B3 * C1) + (A3 * B1 * C1) + (A3 * B2 * C1) + (A3 * B3 * C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA331x2_ASAP7_75t_R 2.57 Y=(A1 * B1 * C1) + (A1 * B2 * C1) + (A1 * B3 * C1) + (A2 * B1 * C1) + (A2 * B2 * C1) + (A2 * B3 * C1) + (A3 * B1 * C1) + (A3 * B2 * C1) + (A3 * B3 * C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA332x1_ASAP7_75t_R 2.57 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B3 * C1) + (A3 * B3 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA332x2_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B3 * C1) + (A3 * B3 * C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA333x1_ASAP7_75t_R 2.80 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B1 * C3) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B2 * C3) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A1 * B3 * C3) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B1 * C3) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B2 * C3) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A2 * B3 * C3) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B1 * C3) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B2 * C3) + (A3 * B3 * C1) + (A3 * B3 * C2) + (A3 * B3 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA333x2_ASAP7_75t_R 3.03 Y=(A1 * B1 * C1) + (A1 * B1 * C2) + (A1 * B1 * C3) + (A1 * B2 * C1) + (A1 * B2 * C2) + (A1 * B2 * C3) + (A1 * B3 * C1) + (A1 * B3 * C2) + (A1 * B3 * C3) + (A2 * B1 * C1) + (A2 * B1 * C2) + (A2 * B1 * C3) + (A2 * B2 * C1) + (A2 * B2 * C2) + (A2 * B2 * C3) + (A2 * B3 * C1) + (A2 * B3 * C2) + (A2 * B3 * C3) + (A3 * B1 * C1) + (A3 * B1 * C2) + (A3 * B1 * C3) + (A3 * B2 * C1) + (A3 * B2 * C2) + (A3 * B2 * C3) + (A3 * B3 * C1) + (A3 * B3 * C2) + (A3 * B3 * C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OA33x2_ASAP7_75t_R 2.33 Y=(A1 * B1) + (A1 * B2) + (A1 * B3) + (A2 * B1) + (A2 * B2) + (A2 * B3) + (A3 * B1) + (A3 * B2) + (A3 * B3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI211xp5_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI21x1_ASAP7_75t_R 1.87 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI21xp33_ASAP7_75t_R 1.17 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI21xp5_ASAP7_75t_R 1.17 Y=(!A1 * !A2) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI221xp5_ASAP7_75t_R 1.63 Y=(!A1 * !A2) + (!B1 * !B2) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI222xp33_ASAP7_75t_R 2.33 Y=(!A1 * !A2) + (!B1 * !B2) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI22x1_ASAP7_75t_R 2.33 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI22xp33_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI22xp5_ASAP7_75t_R 1.40 Y=(!A1 * !A2) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI311xp33_ASAP7_75t_R 1.63 Y=(!A1 * !A2 * !A3) + (!B1) + (!C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI31xp33_ASAP7_75t_R 1.40 Y=(!A1 * !A2 * !A3) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI31xp67_ASAP7_75t_R 3.03 Y=(!A1 * !A2 * !A3) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI321xp33_ASAP7_75t_R 1.87 Y=(!A1 * !A2 * !A3) + (!B1 * !B2) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI322xp33_ASAP7_75t_R 2.10 Y=(!A1 * !A2 * !A3) + (!B1 * !B2) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI32xp33_ASAP7_75t_R 1.63 Y=(!A1 * !A2 * !A3) + (!B1 * !B2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI331xp33_ASAP7_75t_R 2.10 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI332xp33_ASAP7_75t_R 2.33 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI333xp33_ASAP7_75t_R 2.57 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE OAI33xp33_ASAP7_75t_R 2.57 Y=(!A1 * !A2 * !A3) + (!B1 * !B2 * !B3) + (!C1 * !C2 * !C3); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx10_ASAP7_75t_R 3.27 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx12_ASAP7_75t_R 3.73 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx12f_ASAP7_75t_R 4.20 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx16f_ASAP7_75t_R 5.13 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx24_ASAP7_75t_R 7.00 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx2_ASAP7_75t_R 1.17 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx3_ASAP7_75t_R 1.40 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx4_ASAP7_75t_R 1.63 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx4f_ASAP7_75t_R 1.87 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx5_ASAP7_75t_R 1.87 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx6f_ASAP7_75t_R 2.33 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
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GATE BUFx8_ASAP7_75t_R 2.80 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HB1xp67_ASAP7_75t_R 0.93 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HB2xp67_ASAP7_75t_R 1.17 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HB3xp67_ASAP7_75t_R 1.40 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HB4xp67_ASAP7_75t_R 1.63 Y=A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx11_ASAP7_75t_R 3.03 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx13_ASAP7_75t_R 3.50 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx1_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx2_ASAP7_75t_R 0.93 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx3_ASAP7_75t_R 1.17 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx4_ASAP7_75t_R 1.40 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx5_ASAP7_75t_R 1.63 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx6_ASAP7_75t_R 1.87 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVx8_ASAP7_75t_R 2.33 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVxp33_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE INVxp67_ASAP7_75t_R 0.70 Y=!A; PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND2x2_ASAP7_75t_R 1.40 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND2x4_ASAP7_75t_R 2.33 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND2x6_ASAP7_75t_R 2.80 Y=(A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND3x1_ASAP7_75t_R 1.40 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND3x2_ASAP7_75t_R 1.63 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND3x4_ASAP7_75t_R 3.73 Y=(A * B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND4x1_ASAP7_75t_R 1.63 Y=(A * B * C * D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND4x2_ASAP7_75t_R 3.73 Y=(A * B * C * D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND5x1_ASAP7_75t_R 1.87 Y=(A * B * C * D * E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE AND5x2_ASAP7_75t_R 4.67 Y=(A * B * C * D * E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE FAx1_ASAP7_75t_R 3.27 CON=(!A * !B) + (!A * !CI) + (!B * !CI); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE FAx1_ASAP7_75t_R 3.27 SN=(A * B * !CI) + (A * !B * CI) + (!A * B * CI) + (!A * !B * !CI); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HAxp5_ASAP7_75t_R 2.10 CON=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE HAxp5_ASAP7_75t_R 2.10 SN=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE MAJIxp5_ASAP7_75t_R 1.63 Y=(!A * !B) + (!A * !C) + (!B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE MAJx2_ASAP7_75t_R 2.10 Y=(A * B) + (A * C) + (B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE MAJx3_ASAP7_75t_R 2.33 Y=(A * B) + (A * C) + (B * C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2x1_ASAP7_75t_R 1.40 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2x1p5_ASAP7_75t_R 1.87 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2x2_ASAP7_75t_R 2.33 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2xp33_ASAP7_75t_R 0.93 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2xp5_ASAP7_75t_R 0.93 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND2xp67_ASAP7_75t_R 1.40 Y=(!A) + (!B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND3x1_ASAP7_75t_R 2.57 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND3x2_ASAP7_75t_R 4.67 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND3xp33_ASAP7_75t_R 1.17 Y=(!A) + (!B) + (!C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND4xp25_ASAP7_75t_R 1.40 Y=(!A) + (!B) + (!C) + (!D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND4xp75_ASAP7_75t_R 3.27 Y=(!A) + (!B) + (!C) + (!D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NAND5xp2_ASAP7_75t_R 1.63 Y=(!A) + (!B) + (!C) + (!D) + (!E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR2x1_ASAP7_75t_R 1.40 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR2x1p5_ASAP7_75t_R 1.87 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR2x2_ASAP7_75t_R 2.33 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR2xp33_ASAP7_75t_R 0.93 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR2xp67_ASAP7_75t_R 1.40 Y=(!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR3x1_ASAP7_75t_R 2.57 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR3x2_ASAP7_75t_R 4.67 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR3xp33_ASAP7_75t_R 1.17 Y=(!A * !B * !C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR4xp25_ASAP7_75t_R 1.40 Y=(!A * !B * !C * !D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR4xp75_ASAP7_75t_R 3.27 Y=(!A * !B * !C * !D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE NOR5xp2_ASAP7_75t_R 1.63 Y=(!A * !B * !C * !D * !E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR2x2_ASAP7_75t_R 1.40 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR2x4_ASAP7_75t_R 1.87 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR2x6_ASAP7_75t_R 2.80 Y=(A) + (B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR3x1_ASAP7_75t_R 1.40 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR3x2_ASAP7_75t_R 1.63 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR3x4_ASAP7_75t_R 2.10 Y=(A) + (B) + (C); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR4x1_ASAP7_75t_R 1.63 Y=(A) + (B) + (C) + (D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR4x2_ASAP7_75t_R 1.87 Y=(A) + (B) + (C) + (D); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR5x1_ASAP7_75t_R 1.87 Y=(A) + (B) + (C) + (D) + (E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE OR5x2_ASAP7_75t_R 2.10 Y=(A) + (B) + (C) + (D) + (E); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XNOR2x1_ASAP7_75t_R 2.80 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XNOR2x2_ASAP7_75t_R 2.57 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XNOR2xp5_ASAP7_75t_R 2.10 Y=(A * B) + (!A * !B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XOR2x1_ASAP7_75t_R 2.80 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XOR2x2_ASAP7_75t_R 2.57 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
GATE XOR2xp5_ASAP7_75t_R 2.10 Y=(A * !B) + (!A * B); PIN * UNKNOWN 1 999 1.00 0.00 1.00 0.00
|
||||||
|
|
@ -13,6 +13,7 @@
|
||||||
#ifndef TECHMAP_HPP
|
#ifndef TECHMAP_HPP
|
||||||
#define TECHMAP_HPP
|
#define TECHMAP_HPP
|
||||||
|
|
||||||
|
#include <iostream>
|
||||||
#include <mockturtle/algorithms/mapper.hpp>
|
#include <mockturtle/algorithms/mapper.hpp>
|
||||||
#include <mockturtle/io/genlib_reader.hpp>
|
#include <mockturtle/io/genlib_reader.hpp>
|
||||||
#include <mockturtle/io/write_verilog.hpp>
|
#include <mockturtle/io/write_verilog.hpp>
|
||||||
|
|
@ -21,8 +22,10 @@
|
||||||
#include <mockturtle/networks/xmg.hpp>
|
#include <mockturtle/networks/xmg.hpp>
|
||||||
#include <mockturtle/properties/xmgcost.hpp>
|
#include <mockturtle/properties/xmgcost.hpp>
|
||||||
#include <mockturtle/utils/tech_library.hpp>
|
#include <mockturtle/utils/tech_library.hpp>
|
||||||
|
#include <string>
|
||||||
|
|
||||||
#include "../core/properties.hpp"
|
#include "../core/properties.hpp"
|
||||||
|
#include "../core/read_placement_file.hpp"
|
||||||
|
|
||||||
namespace alice {
|
namespace alice {
|
||||||
|
|
||||||
|
|
@ -34,6 +37,14 @@ class techmap_command : public command {
|
||||||
add_flag("--mig, -m", "Standard cell mapping for MIG");
|
add_flag("--mig, -m", "Standard cell mapping for MIG");
|
||||||
add_flag("--lut, -l", "Standard cell mapping for k-LUT");
|
add_flag("--lut, -l", "Standard cell mapping for k-LUT");
|
||||||
add_option("--output, -o", filename, "the verilog filename");
|
add_option("--output, -o", filename, "the verilog filename");
|
||||||
|
add_option("--cut_limit, -c", cut_limit,
|
||||||
|
"Maximum number of cuts for a node");
|
||||||
|
add_option("--node_position_pl, -p", pl_filename, "the pl filename");
|
||||||
|
add_option("--node_position_def, -d", def_filename, "the def filename");
|
||||||
|
add_flag("--area, -a", "Area-only standard cell mapping");
|
||||||
|
add_flag("--delay, -e", "Delay-only standard cell mapping");
|
||||||
|
add_flag("--wirelength, -w", "Wirelength-only standard cell mapping");
|
||||||
|
add_flag("--balance, -b", "Balanced wirelength standard cell mapping");
|
||||||
add_flag("--verbose, -v", "print the information");
|
add_flag("--verbose, -v", "print the information");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -43,6 +54,9 @@ class techmap_command : public command {
|
||||||
|
|
||||||
private:
|
private:
|
||||||
std::string filename = "techmap.v";
|
std::string filename = "techmap.v";
|
||||||
|
std::string pl_filename = "";
|
||||||
|
std::string def_filename = "";
|
||||||
|
uint32_t cut_limit{49u};
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void execute() {
|
void execute() {
|
||||||
|
|
@ -53,84 +67,109 @@ class techmap_command : public command {
|
||||||
|
|
||||||
mockturtle::map_params ps;
|
mockturtle::map_params ps;
|
||||||
mockturtle::map_stats st;
|
mockturtle::map_stats st;
|
||||||
|
ps.cut_enumeration_ps.cut_limit = cut_limit;
|
||||||
|
|
||||||
if (is_set("xmg")) {
|
if (is_set("area"))
|
||||||
if (store<xmg_network>().size() == 0u)
|
ps.strategy = map_params::area;
|
||||||
std::cerr << "[e] no XMG in the store\n";
|
else if (is_set("delay"))
|
||||||
else {
|
ps.strategy = map_params::delay;
|
||||||
auto xmg = store<xmg_network>().current();
|
else if (is_set("wirelength"))
|
||||||
xmg_gate_stats stats;
|
ps.strategy = map_params::wirelength;
|
||||||
xmg_profile_gates(xmg, stats);
|
else if (is_set("balance"))
|
||||||
std::cout << "[i] ";
|
ps.strategy = map_params::balance;
|
||||||
stats.report();
|
else
|
||||||
|
ps.strategy = map_params::def;
|
||||||
|
if (is_set("verbose")) ps.verbose = true;
|
||||||
|
|
||||||
phyLS::xmg_critical_path_stats critical_stats;
|
stopwatch<>::duration time{0};
|
||||||
phyLS::xmg_critical_path_profile_gates(xmg, critical_stats);
|
call_with_stopwatch(time, [&]() {
|
||||||
std::cout << "[i] ";
|
if (is_set("xmg")) {
|
||||||
critical_stats.report();
|
if (store<xmg_network>().size() == 0u)
|
||||||
|
std::cerr << "[e] no XMG in the store\n";
|
||||||
|
else {
|
||||||
|
auto xmg = store<xmg_network>().current();
|
||||||
|
xmg_gate_stats stats;
|
||||||
|
xmg_profile_gates(xmg, stats);
|
||||||
|
std::cout << "[i] ";
|
||||||
|
stats.report();
|
||||||
|
|
||||||
auto res = mockturtle::map(xmg, lib, ps, &st);
|
phyLS::xmg_critical_path_stats critical_stats;
|
||||||
|
phyLS::xmg_critical_path_profile_gates(xmg, critical_stats);
|
||||||
|
std::cout << "[i] ";
|
||||||
|
critical_stats.report();
|
||||||
|
|
||||||
if (is_set("output")) {
|
auto res = mockturtle::map(xmg, lib, ps, &st);
|
||||||
write_verilog_with_binding(res, filename);
|
|
||||||
|
if (is_set("output")) {
|
||||||
|
write_verilog_with_binding(res, filename);
|
||||||
|
}
|
||||||
|
|
||||||
|
std::cout << fmt::format(
|
||||||
|
"[i] Mapped XMG into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
||||||
|
res.num_gates(), st.area, st.delay);
|
||||||
}
|
}
|
||||||
|
} else if (is_set("mig")) {
|
||||||
|
if (store<mig_network>().size() == 0u) {
|
||||||
|
std::cerr << "[e] no MIG in the store\n";
|
||||||
|
} else {
|
||||||
|
auto mig = store<mig_network>().current();
|
||||||
|
|
||||||
std::cout << fmt::format(
|
auto res = mockturtle::map(mig, lib, ps, &st);
|
||||||
"[i] Mapped XMG into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
|
||||||
res.num_gates(), st.area, st.delay);
|
|
||||||
}
|
|
||||||
} else if (is_set("mig")) {
|
|
||||||
if (store<mig_network>().size() == 0u) {
|
|
||||||
std::cerr << "[e] no MIG in the store\n";
|
|
||||||
} else {
|
|
||||||
auto mig = store<mig_network>().current();
|
|
||||||
|
|
||||||
auto res = mockturtle::map(mig, lib, ps, &st);
|
if (is_set("output")) {
|
||||||
|
write_verilog_with_binding(res, filename);
|
||||||
|
}
|
||||||
|
|
||||||
if (is_set("output")) {
|
std::cout << fmt::format(
|
||||||
write_verilog_with_binding(res, filename);
|
"Mapped MIG into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
||||||
|
res.num_gates(), st.area, st.delay);
|
||||||
}
|
}
|
||||||
|
} else if (is_set("lut")) {
|
||||||
|
if (store<klut_network>().size() == 0u) {
|
||||||
|
std::cerr << "[e] no k-LUT in the store\n";
|
||||||
|
} else {
|
||||||
|
auto lut = store<klut_network>().current();
|
||||||
|
|
||||||
std::cout << fmt::format(
|
auto res = mockturtle::map(lut, lib, ps, &st);
|
||||||
"Mapped MIG into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
|
||||||
res.num_gates(), st.area, st.delay);
|
|
||||||
}
|
|
||||||
} else if (is_set("lut")) {
|
|
||||||
if (store<klut_network>().size() == 0u) {
|
|
||||||
std::cerr << "[e] no k-LUT in the store\n";
|
|
||||||
} else {
|
|
||||||
auto lut = store<klut_network>().current();
|
|
||||||
|
|
||||||
auto res = mockturtle::map(lut, lib, ps, &st);
|
if (is_set("output")) {
|
||||||
|
write_verilog_with_binding(res, filename);
|
||||||
|
}
|
||||||
|
|
||||||
if (is_set("output")) {
|
std::cout << fmt::format(
|
||||||
write_verilog_with_binding(res, filename);
|
"Mapped k-LUT into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
||||||
|
res.num_gates(), st.area, st.delay);
|
||||||
}
|
}
|
||||||
|
|
||||||
std::cout << fmt::format(
|
|
||||||
"Mapped k-LUT into #gates = {} area = {:.2f} delay = {:.2f}\n",
|
|
||||||
res.num_gates(), st.area, st.delay);
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
if (store<aig_network>().size() == 0u) {
|
|
||||||
std::cerr << "[e] no AIG in the store\n";
|
|
||||||
} else {
|
} else {
|
||||||
auto aig = store<aig_network>().current();
|
if (store<aig_network>().size() == 0u) {
|
||||||
auto res = mockturtle::map(aig, lib, ps, &st);
|
std::cerr << "[e] no AIG in the store\n";
|
||||||
|
} else {
|
||||||
if (is_set("output")) write_verilog_with_binding(res, filename);
|
auto aig = store<aig_network>().current();
|
||||||
|
if (is_set("node_position_def")) {
|
||||||
// std::cout << fmt::format(
|
std::vector<mockturtle::node_position> np(aig.size());
|
||||||
// "Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, "
|
phyLS::read_def_file(def_filename, np);
|
||||||
// "power = {:.2f}\n",
|
ps.wirelength_rounds = true;
|
||||||
// res.num_gates(), st.area, st.delay, st.power);
|
auto res = mockturtle::map(aig, lib, np, ps, &st);
|
||||||
|
if (is_set("output")) write_verilog_with_binding(res, filename);
|
||||||
|
std::cout << fmt::format(
|
||||||
|
"Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, "
|
||||||
|
"power = {:.2f}, wirelength = {:.2f}, total_wirelength = "
|
||||||
|
"{:.2f}\n",
|
||||||
|
res.num_gates(), st.area, st.delay, st.power, st.wirelength,
|
||||||
|
st.total_wirelength);
|
||||||
|
} else {
|
||||||
|
auto res = mockturtle::map(aig, lib, ps, &st);
|
||||||
|
if (is_set("output")) write_verilog_with_binding_new(res, filename);
|
||||||
|
std::cout << fmt::format(
|
||||||
|
"Mapped AIG into #gates = {}, area = {:.2f}, delay = {:.2f}, "
|
||||||
|
"power = {:.2f}\n",
|
||||||
|
res.num_gates(), st.area, st.delay, st.power);
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
});
|
||||||
if (is_set("verbose")) {
|
if (is_set("verbose")) st.report();
|
||||||
st.report();
|
std::cout << fmt::format("[CPU time]: {:5.3f} seconds\n", to_seconds(time));
|
||||||
cout << "Cut enumeration stats: " << endl;
|
|
||||||
st.cut_enumeration_st.report();
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,154 @@
|
||||||
|
#pragma once
|
||||||
|
|
||||||
|
#include <fmt/format.h>
|
||||||
|
|
||||||
|
#include <cstdint>
|
||||||
|
#include <fstream>
|
||||||
|
#include <iostream>
|
||||||
|
#include <limits>
|
||||||
|
#include <mockturtle/algorithms/mapper.hpp>
|
||||||
|
#include <sstream>
|
||||||
|
#include <string>
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
|
#include "assert.h"
|
||||||
|
|
||||||
|
namespace phyLS {
|
||||||
|
|
||||||
|
void read_def_file(std::string file_path,
|
||||||
|
std::vector<mockturtle::node_position> &Vec_position) {
|
||||||
|
std::ifstream ifs(file_path, std::ifstream::in);
|
||||||
|
assert(ifs.is_open());
|
||||||
|
std::string line;
|
||||||
|
while (std::getline(ifs, line)) {
|
||||||
|
if (line.substr(0, 4) == "COMP") {
|
||||||
|
while (std::getline(ifs, line)) {
|
||||||
|
if (line.substr(0, 3) == "END") {
|
||||||
|
break;
|
||||||
|
} else {
|
||||||
|
// get index of AIG node
|
||||||
|
int index;
|
||||||
|
std::string res;
|
||||||
|
std::string::size_type found_b = line.find_first_of("_");
|
||||||
|
std::string::size_type found_e = line.find_last_of("_");
|
||||||
|
while (found_b != found_e - 1) {
|
||||||
|
res += line[found_b + 1];
|
||||||
|
found_b++;
|
||||||
|
}
|
||||||
|
index = std::stoi(res);
|
||||||
|
|
||||||
|
// read next line
|
||||||
|
std::getline(ifs, line);
|
||||||
|
// get position of AIG node
|
||||||
|
bool is_x = true;
|
||||||
|
std::string position = "";
|
||||||
|
for (char c : line) {
|
||||||
|
if (std::isdigit(c)) {
|
||||||
|
position += c;
|
||||||
|
} else if (!position.empty()) {
|
||||||
|
if (is_x) {
|
||||||
|
Vec_position[index].x_coordinate = std::stoi(position);
|
||||||
|
position.clear();
|
||||||
|
is_x = false;
|
||||||
|
} else {
|
||||||
|
Vec_position[index].y_coordinate = std::stoi(position);
|
||||||
|
position.clear();
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else if (line.substr(0, 4) == "PINS") {
|
||||||
|
while (std::getline(ifs, line)) {
|
||||||
|
if (line.substr(0, 3) == "END") {
|
||||||
|
break;
|
||||||
|
} else if (line.find("input") != std::string::npos &&
|
||||||
|
line.find("clk") == std::string::npos) {
|
||||||
|
// get input position
|
||||||
|
std::string::size_type found_1 = line.find("_");
|
||||||
|
std::string::size_type found_2 = line.find("+");
|
||||||
|
int index;
|
||||||
|
std::string res;
|
||||||
|
while (found_1 != found_2 - 2) {
|
||||||
|
res += line[found_1 + 1];
|
||||||
|
found_1++;
|
||||||
|
}
|
||||||
|
index = std::stoi(res);
|
||||||
|
std::getline(ifs, line);
|
||||||
|
std::getline(ifs, line);
|
||||||
|
bool is_x = true;
|
||||||
|
std::string position_input = "";
|
||||||
|
for (char c : line) {
|
||||||
|
if (std::isdigit(c)) {
|
||||||
|
position_input += c;
|
||||||
|
} else if (!position_input.empty()) {
|
||||||
|
if (is_x) {
|
||||||
|
Vec_position[index + 1].x_coordinate =
|
||||||
|
std::stoi(position_input);
|
||||||
|
position_input.clear();
|
||||||
|
is_x = false;
|
||||||
|
} else {
|
||||||
|
Vec_position[index + 1].y_coordinate =
|
||||||
|
std::stoi(position_input);
|
||||||
|
position_input.clear();
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void read_pl_file(std::string file_path,
|
||||||
|
std::vector<mockturtle::node_position> &Vec_position,
|
||||||
|
uint32_t ntk_size) {
|
||||||
|
std::ifstream ifs(file_path, std::ifstream::in);
|
||||||
|
assert(ifs.is_open());
|
||||||
|
std::string line;
|
||||||
|
uint32_t index;
|
||||||
|
Vec_position.reserve(ntk_size);
|
||||||
|
while (getline(ifs, line)) {
|
||||||
|
if (line[0] == 'U') {
|
||||||
|
continue;
|
||||||
|
} else {
|
||||||
|
for (char c : line) {
|
||||||
|
std::string str_number = "";
|
||||||
|
uint32_t a = 0;
|
||||||
|
if (c == ':') {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (std::isdigit(c)) {
|
||||||
|
str_number += c;
|
||||||
|
} else {
|
||||||
|
if (!str_number.empty()) {
|
||||||
|
if (a == 0) {
|
||||||
|
index = std::stoi(str_number);
|
||||||
|
str_number = "";
|
||||||
|
a++;
|
||||||
|
} else if (a == 1) {
|
||||||
|
Vec_position[index].x_coordinate = std::stoi(str_number);
|
||||||
|
str_number = "";
|
||||||
|
a++;
|
||||||
|
} else if (a == 2) {
|
||||||
|
Vec_position[index].y_coordinate = std::stoi(str_number);
|
||||||
|
str_number = "";
|
||||||
|
a = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
ifs.close();
|
||||||
|
}
|
||||||
|
|
||||||
|
} // NAMESPACE phyLS
|
||||||
Loading…
Reference in New Issue