From 079b9d3fd4ac101911c9a77f4c492369064c0c86 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=BD=98=E9=B8=BF=E6=B4=8B?= <74575924+panhongyang0@users.noreply.github.com> Date: Wed, 21 Dec 2022 11:05:59 +0800 Subject: [PATCH] Update README.md --- README.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 7d5eff0..8b66ffe 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,7 @@ # powerful heightened yielded Logic Synthesis (phyLS) -phyLS is based on the [EPFL Logic Synthesis Libraries](https://github.com/lsils/lstools-showcase). +phyLS is based on the [mockturtle](https://github.com/lsils/mockturtle), it can optimize different logics attributes. +Currently, it supports AIG, MIG, XAG, and XMG based optimization. ## Requirements A modern compiler is required to build the libraries.