504 lines
27 KiB
Plaintext
504 lines
27 KiB
Plaintext
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# This constrs file is used on the MZ7035 board
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set_property IOSTANDARD LVCMOS18 [get_ports IIC_0_0_scl_io]
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set_property IOSTANDARD LVCMOS18 [get_ports IIC_0_0_sda_io]
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set_property IOSTANDARD LVCMOS18 [get_ports oen_0]
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set_property PACKAGE_PIN H11 [get_ports IIC_0_0_scl_io]
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set_property PACKAGE_PIN A9 [get_ports IIC_0_0_sda_io]
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set_property PACKAGE_PIN W17 [get_ports oen_0]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_p[2]}]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_n[2]}]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_p[1]}]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_n[1]}]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_p[0]}]
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set_property IOSTANDARD LVDS [get_ports {TMDS_0_data_n[0]}]
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set_property IOSTANDARD LVDS [get_ports TMDS_0_clk_n]
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set_property IOSTANDARD LVDS [get_ports TMDS_0_clk_p]
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set_property PACKAGE_PIN K13 [get_ports {TMDS_0_data_p[0]}]
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set_property PACKAGE_PIN G14 [get_ports {TMDS_0_data_p[1]}]
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set_property PACKAGE_PIN K15 [get_ports {TMDS_0_data_p[2]}]
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set_property PACKAGE_PIN J14 [get_ports TMDS_0_clk_p]
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set_property PACKAGE_PIN D9 [get_ports {GPIO_0_0_tri_io[1]}]
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set_property PACKAGE_PIN J11 [get_ports {GPIO_0_0_tri_io[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports m_axis_data_tvalid]
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set_property IOSTANDARD LVCMOS18 [get_ports valid_0]
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set_property PACKAGE_PIN AD10 [get_ports valid_0]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[15]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[14]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[13]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[12]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[11]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[10]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[9]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[8]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_0_tri_io[5]}]
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set_property PACKAGE_PIN H13 [get_ports {GPIO_0_0_tri_io[2]}]
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set_property PACKAGE_PIN V19 [get_ports {GPIO_0_0_tri_io[3]}]
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set_property PACKAGE_PIN AE15 [get_ports {GPIO_0_0_tri_io[4]}]
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set_property PACKAGE_PIN AE12 [get_ports {GPIO_0_0_tri_io[5]}]
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set_property PACKAGE_PIN AF12 [get_ports {GPIO_0_0_tri_io[6]}]
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set_property PACKAGE_PIN AE11 [get_ports {GPIO_0_0_tri_io[7]}]
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set_property PACKAGE_PIN AF15 [get_ports {GPIO_0_0_tri_io[8]}]
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set_property PACKAGE_PIN AF14 [get_ports {GPIO_0_0_tri_io[9]}]
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set_property PACKAGE_PIN AE13 [get_ports {GPIO_0_0_tri_io[10]}]
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set_property PACKAGE_PIN AF13 [get_ports {GPIO_0_0_tri_io[11]}]
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set_property PACKAGE_PIN AF10 [get_ports {GPIO_0_0_tri_io[12]}]
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set_property PACKAGE_PIN AC12 [get_ports {GPIO_0_0_tri_io[13]}]
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set_property PACKAGE_PIN AD11 [get_ports {GPIO_0_0_tri_io[14]}]
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set_property PACKAGE_PIN AE16 [get_ports {GPIO_0_0_tri_io[15]}]
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set_property IOSTANDARD LVCMOS18 [get_ports s_axis_s2mm_tready_0]
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set_property PACKAGE_PIN AA10 [get_ports s_axis_s2mm_tready_0]
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set_property PACKAGE_PIN AC23 [get_ports CLK_IN1_D_0_clk_p]
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set_property IOSTANDARD DIFF_HSTL_II_18 [get_ports CLK_IN1_D_0_clk_p]
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set_property IOSTANDARD DIFF_HSTL_II_18 [get_ports CLK_IN1_D_0_clk_n]
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set_property PACKAGE_PIN AD25 [get_ports pll_rst_0]
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set_property IOSTANDARD LVCMOS18 [get_ports pll_rst_0]
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set_property PACKAGE_PIN AE25 [get_ports {port_a_0[7]}]
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set_property PACKAGE_PIN AD26 [get_ports {port_a_0[6]}]
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set_property PACKAGE_PIN AA25 [get_ports {port_a_0[5]}]
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set_property PACKAGE_PIN AB25 [get_ports {port_a_0[4]}]
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set_property PACKAGE_PIN AA22 [get_ports {port_a_0[3]}]
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set_property PACKAGE_PIN AA23 [get_ports {port_a_0[2]}]
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set_property PACKAGE_PIN AC18 [get_ports {port_a_0[1]}]
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set_property PACKAGE_PIN AC19 [get_ports {port_a_0[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a_0[0]}]
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set_property PACKAGE_PIN AF24 [get_ports {port_b_0[7]}]
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set_property PACKAGE_PIN AF25 [get_ports {port_b_0[6]}]
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set_property PACKAGE_PIN AC21 [get_ports {port_b_0[5]}]
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set_property PACKAGE_PIN AC22 [get_ports {port_b_0[4]}]
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set_property PACKAGE_PIN AD23 [get_ports {port_b_0[2]}]
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set_property PACKAGE_PIN AD24 [get_ports {port_b_0[3]}]
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set_property PACKAGE_PIN AB22 [get_ports {port_b_0[1]}]
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set_property PACKAGE_PIN AB21 [get_ports {port_b_0[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b_0[0]}]
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set_property PACKAGE_PIN AC26 [get_ports pll_en_0]
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set_property PACKAGE_PIN AB26 [get_ports power_en_0]
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set_property PACKAGE_PIN AE26 [get_ports pwdn_0]
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set_property IOSTANDARD LVCMOS18 [get_ports pll_en_0]
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set_property IOSTANDARD LVCMOS18 [get_ports power_en_0]
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set_property IOSTANDARD LVCMOS18 [get_ports pwdn_0]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[9]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[8]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {dma_cnt[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_a[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tkeep[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {port_b[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports pll_rst]
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set_property IOSTANDARD LVCMOS18 [get_ports sel_clk]
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set_property IOSTANDARD LVCMOS18 [get_ports rst]
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set_property IOSTANDARD LVCMOS18 [get_ports pwdn]
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set_property IOSTANDARD LVCMOS18 [get_ports power_en]
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set_property IOSTANDARD LVCMOS18 [get_ports locked0]
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set_property IOSTANDARD LVCMOS18 [get_ports m_axis_data_tlast]
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set_property IOSTANDARD LVCMOS18 [get_ports m_axis_data_tready]
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set_property IOSTANDARD LVCMOS18 [get_ports pll_en]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[10]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[9]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[8]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_index[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports sys_clk]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[26]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[25]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[24]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[23]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[22]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[21]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[20]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[19]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[18]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[17]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[16]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[15]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[14]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[13]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[12]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[11]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[10]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[9]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[8]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {fft_abs[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports fft_full]
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set_property IOSTANDARD LVCMOS18 [get_ports fft_wr]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[31]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[30]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[29]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[28]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[27]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[26]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[25]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[24]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[23]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[22]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[21]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[20]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[19]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[18]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[17]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[16]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[15]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[14]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[13]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[12]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[11]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[10]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[9]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[8]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[7]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[6]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[5]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[4]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[3]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[2]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[1]}]
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set_property IOSTANDARD LVCMOS18 [get_ports {m_axis_data_tdata[0]}]
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set_property IOSTANDARD LVCMOS18 [get_ports dma_empty]
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set_property IOSTANDARD LVCMOS18 [get_ports dma_rd]
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set_property IOSTANDARD LVCMOS18 [get_ports adc_clk]
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set_property DRIVE 12 [get_ports {dma_cnt[9]}]
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set_property DRIVE 12 [get_ports {dma_cnt[8]}]
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set_property DRIVE 12 [get_ports {dma_cnt[7]}]
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set_property DRIVE 12 [get_ports {dma_cnt[6]}]
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set_property DRIVE 12 [get_ports {dma_cnt[5]}]
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set_property DRIVE 12 [get_ports {dma_cnt[4]}]
|
||
|
set_property DRIVE 12 [get_ports {dma_cnt[3]}]
|
||
|
set_property DRIVE 12 [get_ports {dma_cnt[2]}]
|
||
|
set_property DRIVE 12 [get_ports {dma_cnt[1]}]
|
||
|
set_property DRIVE 12 [get_ports {dma_cnt[0]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[7]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[6]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[5]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[4]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[3]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[2]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[1]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tkeep[0]}]
|
||
|
set_property DRIVE 12 [get_ports pll_rst]
|
||
|
set_property DRIVE 12 [get_ports pwdn]
|
||
|
set_property DRIVE 12 [get_ports power_en]
|
||
|
set_property DRIVE 12 [get_ports m_axis_data_tlast]
|
||
|
set_property DRIVE 12 [get_ports m_axis_data_tvalid]
|
||
|
set_property DRIVE 12 [get_ports pll_en]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[10]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[9]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[8]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[7]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[6]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[5]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[4]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[3]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[2]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[1]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_index[0]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[26]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[25]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[24]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[23]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[22]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[21]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[20]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[19]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[18]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[17]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[16]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[15]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[14]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[13]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[12]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[11]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[10]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[9]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[8]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[7]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[6]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[5]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[4]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[3]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[2]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[1]}]
|
||
|
set_property DRIVE 12 [get_ports {fft_abs[0]}]
|
||
|
set_property DRIVE 12 [get_ports fft_full]
|
||
|
set_property DRIVE 12 [get_ports fft_wr]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[31]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[30]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[29]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[28]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[27]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[26]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[25]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[24]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[23]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[22]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[21]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[20]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[19]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[18]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[17]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[16]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[15]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[14]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[13]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[12]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[11]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[10]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[9]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[8]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[7]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[6]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[5]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[4]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[3]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[2]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[1]}]
|
||
|
set_property DRIVE 12 [get_ports {m_axis_data_tdata[0]}]
|
||
|
set_property DRIVE 12 [get_ports dma_empty]
|
||
|
set_property DRIVE 12 [get_ports dma_rd]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[9]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[8]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[7]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[6]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[5]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[4]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[3]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[2]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[1]}]
|
||
|
set_property SLEW SLOW [get_ports {dma_cnt[0]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[7]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[6]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[5]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[4]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[3]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[2]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[1]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tkeep[0]}]
|
||
|
set_property SLEW SLOW [get_ports pll_rst]
|
||
|
set_property SLEW SLOW [get_ports pwdn]
|
||
|
set_property SLEW SLOW [get_ports power_en]
|
||
|
set_property SLEW SLOW [get_ports m_axis_data_tlast]
|
||
|
set_property SLEW SLOW [get_ports m_axis_data_tvalid]
|
||
|
set_property SLEW SLOW [get_ports pll_en]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[10]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[9]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[8]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[7]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[6]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[5]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[4]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[3]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[2]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[1]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_index[0]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[26]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[25]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[24]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[23]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[22]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[21]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[20]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[19]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[18]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[17]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[16]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[15]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[14]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[13]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[12]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[11]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[10]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[9]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[8]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[7]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[6]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[5]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[4]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[3]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[2]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[1]}]
|
||
|
set_property SLEW SLOW [get_ports {fft_abs[0]}]
|
||
|
set_property SLEW SLOW [get_ports fft_full]
|
||
|
set_property SLEW SLOW [get_ports fft_wr]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[31]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[30]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[29]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[28]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[27]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[26]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[25]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[24]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[23]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[22]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[21]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[20]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[19]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[18]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[17]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[16]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[15]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[14]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[13]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[12]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[11]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[10]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[9]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[8]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[7]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[6]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[5]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[4]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[3]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[2]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[1]}]
|
||
|
set_property SLEW SLOW [get_ports {m_axis_data_tdata[0]}]
|
||
|
set_property SLEW SLOW [get_ports dma_empty]
|
||
|
set_property SLEW SLOW [get_ports dma_rd]
|
||
|
set_property PACKAGE_PIN C8 [get_ports sys_clk]
|
||
|
set_property PACKAGE_PIN AE25 [get_ports {port_a[7]}]
|
||
|
set_property PACKAGE_PIN AD26 [get_ports {port_a[6]}]
|
||
|
set_property PACKAGE_PIN AA25 [get_ports {port_a[5]}]
|
||
|
set_property PACKAGE_PIN AB25 [get_ports {port_a[4]}]
|
||
|
set_property PACKAGE_PIN AA22 [get_ports {port_a[3]}]
|
||
|
set_property PACKAGE_PIN AA23 [get_ports {port_a[2]}]
|
||
|
set_property PACKAGE_PIN AC18 [get_ports {port_a[1]}]
|
||
|
set_property PACKAGE_PIN AC19 [get_ports {port_a[0]}]
|
||
|
set_property PACKAGE_PIN AF24 [get_ports {port_b[7]}]
|
||
|
set_property PACKAGE_PIN AF25 [get_ports {port_b[6]}]
|
||
|
set_property PACKAGE_PIN AC21 [get_ports {port_b[5]}]
|
||
|
set_property PACKAGE_PIN AC22 [get_ports {port_b[4]}]
|
||
|
set_property PACKAGE_PIN AD23 [get_ports {port_b[3]}]
|
||
|
set_property PACKAGE_PIN AD24 [get_ports {port_b[2]}]
|
||
|
set_property PACKAGE_PIN AB22 [get_ports {port_b[1]}]
|
||
|
set_property PACKAGE_PIN AB21 [get_ports {port_b[0]}]
|
||
|
set_property PACKAGE_PIN AC26 [get_ports pll_en]
|
||
|
set_property PACKAGE_PIN AD25 [get_ports pll_rst]
|
||
|
set_property PACKAGE_PIN AB26 [get_ports power_en]
|
||
|
set_property PACKAGE_PIN AE26 [get_ports pwdn]
|
||
|
|
||
|
set_property PACKAGE_PIN AF17 [get_ports pin_a_0]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports pin_a_0]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports pin_b_0]
|
||
|
set_property PACKAGE_PIN AE17 [get_ports pin_b_0]
|
||
|
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[11]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[10]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[9]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[8]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[7]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[6]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[5]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[4]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[3]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[2]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[1]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {GPIO_0_tri_i[0]}]
|
||
|
set_property PACKAGE_PIN AE16 [get_ports {GPIO_0_tri_i[0]}]
|
||
|
set_property PACKAGE_PIN AE12 [get_ports {GPIO_0_tri_i[1]}]
|
||
|
set_property PACKAGE_PIN AF10 [get_ports {GPIO_0_tri_i[2]}]
|
||
|
set_property PACKAGE_PIN AF12 [get_ports {GPIO_0_tri_i[3]}]
|
||
|
set_property PACKAGE_PIN AC12 [get_ports {GPIO_0_tri_i[4]}]
|
||
|
set_property PACKAGE_PIN AE11 [get_ports {GPIO_0_tri_i[5]}]
|
||
|
set_property PACKAGE_PIN AD11 [get_ports {GPIO_0_tri_i[6]}]
|
||
|
set_property PACKAGE_PIN AF15 [get_ports {GPIO_0_tri_i[7]}]
|
||
|
set_property PACKAGE_PIN AE13 [get_ports {GPIO_0_tri_i[8]}]
|
||
|
set_property PACKAGE_PIN AE15 [get_ports {GPIO_0_tri_i[9]}]
|
||
|
set_property PACKAGE_PIN Y11 [get_ports {GPIO_0_tri_i[10]}]
|
||
|
set_property PACKAGE_PIN AF14 [get_ports {GPIO_0_tri_i[11]}]
|
||
|
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[10]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[9]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[8]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[7]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[6]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[5]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[4]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[3]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[2]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[1]}]
|
||
|
set_property IOSTANDARD LVCMOS18 [get_ports {key_0[0]}]
|
||
|
set_property PACKAGE_PIN AE16 [get_ports {key_0[0]}]
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||
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set_property PACKAGE_PIN AE12 [get_ports {key_0[1]}]
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set_property PACKAGE_PIN AF10 [get_ports {key_0[2]}]
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set_property PACKAGE_PIN AF12 [get_ports {key_0[3]}]
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set_property PACKAGE_PIN AC12 [get_ports {key_0[4]}]
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set_property PACKAGE_PIN AE11 [get_ports {key_0[5]}]
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set_property PACKAGE_PIN AD11 [get_ports {key_0[6]}]
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set_property PACKAGE_PIN AF15 [get_ports {key_0[7]}]
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||
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set_property PACKAGE_PIN AE13 [get_ports {key_0[8]}]
|
||
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set_property PACKAGE_PIN AE15 [get_ports {key_0[9]}]
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||
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set_property PACKAGE_PIN AF14 [get_ports {key_0[10]}]
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