diff --git a/485/nuc120/485.uvprojx b/485/nuc120/485.uvprojx index 87ee49e..d7323c5 100644 --- a/485/nuc120/485.uvprojx +++ b/485/nuc120/485.uvprojx @@ -16,7 +16,7 @@ NUC120RD3AN Nuvoton - Nuvoton.NuMicro_DFP.1.2.0 + Nuvoton.NuMicro_DFP.1.3.5 http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack IRAM(0x20000000,0x4000) IROM(0x00000000,0x10000) CPUTYPE("Cortex-M0") CLOCK(12000000) @@ -464,16 +464,16 @@ RTE\Device\NUC120RD3AN\startup_NUC100Series.s - - + + RTE\Device\NUC120RD3AN\system_NUC100Series.c - - + + diff --git a/arduino/arduino/moveo_moveit/move_moveit/move_moveit.ino b/arduino/arduino/moveo_moveit/move_moveit/move_moveit.ino index ae025b8..ae2b6d0 100644 --- a/arduino/arduino/moveo_moveit/move_moveit/move_moveit.ino +++ b/arduino/arduino/moveo_moveit/move_moveit/move_moveit.ino @@ -108,14 +108,14 @@ void setup() { nh.initNode(); nh.subscribe(arm_sub); nh.subscribe(gripper_sub); - //nh.advertise(steps); + nh.advertise(steps); // Configure each stepper - joint1.setMaxSpeed(1500); - joint2.setMaxSpeed(750); - joint3.setMaxSpeed(2000); - joint4.setMaxSpeed(500); - joint5.setMaxSpeed(1000); + joint1.setMaxSpeed(100); + joint2.setMaxSpeed(200); + joint3.setMaxSpeed(500); + joint4.setMaxSpeed(300); + joint5.setMaxSpeed(80); // Then give them to MultiStepper to manage steppers.addStepper(joint1); @@ -151,7 +151,6 @@ void loop() { } digitalWrite(13, HIGH-digitalRead(13)); //toggle led joint_status = 0; - nh.spinOnce(); delay(1); } diff --git a/c51/gpio_clock/clock b/c51/gpio_clock/clock index 04ddbea..2500ca6 100644 Binary files a/c51/gpio_clock/clock and b/c51/gpio_clock/clock differ diff --git a/c51/gpio_clock/main.c b/c51/gpio_clock/main.c index a674244..6c474ec 100644 --- a/c51/gpio_clock/main.c +++ b/c51/gpio_clock/main.c @@ -45,5 +45,5 @@ void main() while (1) T0CLKO=~T0CLKO; //loop -} +} diff --git a/nuvoton/m451/roboticarm_controller/main.c b/nuvoton/m451/roboticarm_controller/main.c index 1265ece..c2ba820 100644 --- a/nuvoton/m451/roboticarm_controller/main.c +++ b/nuvoton/m451/roboticarm_controller/main.c @@ -123,6 +123,7 @@ int ParsePackage(unsigned char *dat){ Axis6 = (*(dat + 14)*256 + (*(dat + 15))); } } + int main(){ unsigned char recv[32] = {0}; GPIO_SetMode(PC,BIT9,GPIO_MODE_INPUT); //IRQ diff --git a/nuvoton/nuc120/MyProject.c b/nuvoton/nuc120/MyProject.c new file mode 100644 index 0000000..5041763 --- /dev/null +++ b/nuvoton/nuc120/MyProject.c @@ -0,0 +1,49 @@ +/**************************************************************************** + * @file MyProject.c + * @version V1.23 + * @Date 2021/07/31-20:50:25 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2021 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +/******************** +MCU:NUC120RC1DN(LQFP64) +Pin Configuration: +Pin25:I2SDO +Pin26:I2SDI +Pin27:I2SBCLK +Pin28:I2SLRCLK +Pin37:I2SMCLK +********************/ + +#include "NUC100Series.h" + +/* + * @brief This function provides the configured MFP registers + * @param None + * @return None + */ +void SYS_Init(void) +{ + //SYS->ALT_MFP = 0x000003E0UL; + //SYS->ALT_MFP1 = 0x00000000UL; + //SYS->GPA_MFP = 0x00008000UL; + //SYS->GPB_MFP = 0x00000000UL; + //SYS->GPC_MFP = 0x0000000FUL; + //SYS->GPE_MFP = 0x00000000UL; + + /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */ + SYS->ALT_MFP = SYS_ALT_MFP_PC3_I2S_DO | SYS_ALT_MFP_PC2_I2S_DI | SYS_ALT_MFP_PC1_I2S_BCLK | SYS_ALT_MFP_PC0_I2S_LRCLK | SYS_ALT_MFP_PA15_I2S_MCLK; + SYS->ALT_MFP1 = 0x00000000; + SYS->GPA_MFP = SYS_GPA_MFP_PA15_I2S_MCLK; + SYS->GPB_MFP = 0x00000000; + SYS->GPC_MFP = SYS_GPC_MFP_PC3_I2S_DO | SYS_GPC_MFP_PC2_I2S_DI | SYS_GPC_MFP_PC1_I2S_BCLK | SYS_GPC_MFP_PC0_I2S_LRCLK; + SYS->GPE_MFP = 0x00000000; + + return; +} + +/*** (C) COPYRIGHT 2013-2021 Nuvoton Technology Corp. ***/ diff --git a/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.c b/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.c new file mode 100644 index 0000000..18c9572 --- /dev/null +++ b/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.c @@ -0,0 +1,140 @@ +/**************************************************************************** + * @file MyProject.c + * @version V1.06 + * @Date 2021/07/31-20:56:23 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2021 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +/******************** +MCU:NUC120RC1DN(LQFP64) +Base Clocks: +HIRC:22.1184MHz +HCLK:22.1184MHz +PCLK:22.1184MHz +Enabled-Module Frequencies: +EBI=Bus Clock(HCLK):22.1184MHz +I2S=Bus Clock(PCLK):22.1184MHz/Engine Clock:22.1184MHz +ISP=Bus Clock(HCLK):22.1184MHz/Engine Clock:22.1184MHz +SYSTICK=Bus Clock(HCLK):22.1184MHz/Engine Clock:11.0592MHz +********************/ + +#include "NUC100Series.h" + +void MyProject_init_ebi(void) +{ + CLK_EnableModuleClock(EBI_MODULE); + + return; +} + +void MyProject_deinit_ebi(void) +{ + CLK_DisableModuleClock(EBI_MODULE); + + return; +} + +void MyProject_init_i2s(void) +{ + CLK_EnableModuleClock(I2S_MODULE); + CLK_SetModuleClock(I2S_MODULE, CLK_CLKSEL2_I2S_S_HCLK, MODULE_NoMsk); + + return; +} + +void MyProject_deinit_i2s(void) +{ + CLK_DisableModuleClock(I2S_MODULE); + + return; +} + +void MyProject_init_isp(void) +{ + CLK_EnableModuleClock(ISP_MODULE); + + return; +} + +void MyProject_deinit_isp(void) +{ + CLK_DisableModuleClock(ISP_MODULE); + + return; +} + +void MyProject_init_systick(void) +{ + CLK_EnableSysTick(CLK_CLKSEL0_STCLK_S_HIRC_DIV2, 0); + + return; +} + +void MyProject_deinit_systick(void) +{ + CLK_DisableSysTick(); + + return; +} + +void MyProject_init_base(void) +{ + /* If the macros do not exist in your project, please refer to the related clk.h in Header folder of the tool package */ + /* Enable clock source */ + CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk); + + /* Waiting for clock source ready */ + CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk); + + /* Set HCLK clock */ + CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1)); + + return; +} + +void MyProject_init(void) +{ + /*---------------------------------------------------------------------------------------------------------*/ + /* Init System Clock */ + /*---------------------------------------------------------------------------------------------------------*/ + //CLK->PWRCON = (CLK->PWRCON & ~(0x0000000FUL)) | 0x00000014UL; + //CLK->PLLCON = (CLK->PLLCON & ~(0x000FFFFFUL)) | 0x0005C22EUL; + //CLK->CLKDIV = (CLK->CLKDIV & ~(0x00FF0FFFUL)) | 0x00000000UL; + //CLK->CLKDIV1 = (CLK->CLKDIV1 & ~(0x00FFFFFFUL)) | 0x00000000UL; + //CLK->CLKSEL0 = (CLK->CLKSEL0 & ~(0x0000003FUL)) | 0x0000003FUL; + //CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(0xF37777FFUL)) | 0xFFFFFFFFUL; + //CLK->CLKSEL2 = (CLK->CLKSEL2 & ~(0x00030FFFUL)) | 0x000200FEUL; + //CLK->CLKSEL3 = (CLK->CLKSEL3 & ~(0x0000003FUL)) | 0x0000003FUL; + //CLK->AHBCLK = (CLK->AHBCLK & ~(0x0000000EUL)) | 0x0000000DUL; + //CLK->APBCLK = (CLK->APBCLK & ~(0xF8F7F37FUL)) | 0x20000000UL; + //CLK->APBCLK1 = (CLK->APBCLK1 & ~(0x00000007UL)) | 0x00000000UL; + //CLK->FRQDIV = (CLK->FRQDIV & ~(0x0000001FUL)) | 0x00000000UL; + //SysTick->CTRL = (SysTick->CTRL & ~(0x00000005UL)) | 0x00000001UL; + + /* Unlock protected registers */ + SYS_UnlockReg(); + + /* Enable base clock */ + MyProject_init_base(); + + /* Enable module clock and set clock source */ + MyProject_init_ebi(); + MyProject_init_i2s(); + MyProject_init_isp(); + MyProject_init_systick(); + + /* Update System Core Clock */ + /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */ + SystemCoreClockUpdate(); + + /* Lock protected registers */ + SYS_LockReg(); + + return; +} + +/*** (C) COPYRIGHT 2013-2021 Nuvoton Technology Corp. ***/ diff --git a/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.h b/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.h new file mode 100644 index 0000000..deeabb3 --- /dev/null +++ b/nuvoton/nuc120/NuClockConfig/MyProject/MyProject.h @@ -0,0 +1,34 @@ +/**************************************************************************** + * @file MyProject.h + * @version V1.06 + * @Date 2021/07/31-20:56:23 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2021 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +#ifndef __MYPROJECT_H__ +#define __MYPROJECT_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif +void MyProject_init_ebi(void); +void MyProject_deinit_ebi(void); +void MyProject_init_i2s(void); +void MyProject_deinit_i2s(void); +void MyProject_init_isp(void); +void MyProject_deinit_isp(void); +void MyProject_init_systick(void); +void MyProject_deinit_systick(void); +void MyProject_init_base(void); +void MyProject_init(void); +#ifdef __cplusplus +} +#endif +#endif /*__MYPROJECT_H__*/ + +/*** (C) COPYRIGHT 2013-2021 Nuvoton Technology Corp. ***/ diff --git a/nuvoton/nuc120/NuPinConfig/MyProject/MyProject.c b/nuvoton/nuc120/NuPinConfig/MyProject/MyProject.c new file mode 100644 index 0000000..14ef45a --- /dev/null +++ b/nuvoton/nuc120/NuPinConfig/MyProject/MyProject.c @@ -0,0 +1,52 @@ +/**************************************************************************** + * @file MyProject.c + * @version V1.23 + * @Date 2021/07/31-21:16:54 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2021 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +/******************** +MCU:NUC120RC1DN(LQFP64) +Pin Configuration: +Pin25:I2SDO +Pin26:I2SDI +Pin27:I2SBCLK +Pin28:I2SLRCLK +Pin29:PE.5 +Pin37:I2SMCLK +Pin53:PC.7 +Pin54:PC.6 +********************/ + +#include "NUC100Series.h" + +/* + * @brief This function provides the configured MFP registers + * @param None + * @return None + */ +void SYS_Init(void) +{ + //SYS->ALT_MFP = 0x000003E0UL; + //SYS->ALT_MFP1 = 0x00000000UL; + //SYS->GPA_MFP = 0x00008000UL; + //SYS->GPB_MFP = 0x00000000UL; + //SYS->GPC_MFP = 0x0000000FUL; + //SYS->GPE_MFP = 0x00000000UL; + + /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */ + SYS->ALT_MFP = SYS_ALT_MFP_PC3_I2S_DO | SYS_ALT_MFP_PC2_I2S_DI | SYS_ALT_MFP_PC1_I2S_BCLK | SYS_ALT_MFP_PC0_I2S_LRCLK | SYS_ALT_MFP_PA15_I2S_MCLK; + SYS->ALT_MFP1 = 0x00000000; + SYS->GPA_MFP = SYS_GPA_MFP_PA15_I2S_MCLK; + SYS->GPB_MFP = 0x00000000; + SYS->GPC_MFP = SYS_GPC_MFP_PC3_I2S_DO | SYS_GPC_MFP_PC2_I2S_DI | SYS_GPC_MFP_PC1_I2S_BCLK | SYS_GPC_MFP_PC0_I2S_LRCLK; + SYS->GPE_MFP = 0x00000000; + + return; +} + +/*** (C) COPYRIGHT 2013-2021 Nuvoton Technology Corp. ***/ diff --git a/nuvoton/nuc120/main.c b/nuvoton/nuc120/main.c new file mode 100644 index 0000000..5f6859b --- /dev/null +++ b/nuvoton/nuc120/main.c @@ -0,0 +1,192 @@ +#include "NUC100Series.h" +#include +#include "uda1341.h" + +uint32_t g_u32TxValue; + +/* + * @brief This function provides the configured MFP registers + * @param None + * @return None + */ +void GPIO_INIT_I2S(void) +{ + //SYS->ALT_MFP = 0x000003E0UL; + //SYS->ALT_MFP1 = 0x00000000UL; + //SYS->GPA_MFP = 0x00008000UL; + //SYS->GPB_MFP = 0x00000000UL; + //SYS->GPC_MFP = 0x0000000FUL; + //SYS->GPE_MFP = 0x00000000UL; + + /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */ + SYS->ALT_MFP = SYS_ALT_MFP_PC3_I2S_DO | SYS_ALT_MFP_PC2_I2S_DI | SYS_ALT_MFP_PC1_I2S_BCLK | SYS_ALT_MFP_PC0_I2S_LRCLK | SYS_ALT_MFP_PA15_I2S_MCLK; + SYS->ALT_MFP1 = 0x00000000; + SYS->GPA_MFP = SYS_GPA_MFP_PA15_I2S_MCLK; + SYS->GPB_MFP = 0x00000000; + SYS->GPC_MFP = SYS_GPC_MFP_PC3_I2S_DO | SYS_GPC_MFP_PC2_I2S_DI | SYS_GPC_MFP_PC1_I2S_BCLK | SYS_GPC_MFP_PC0_I2S_LRCLK; + SYS->GPE_MFP = 0x00000000; + + return; +} + +void MyProject_init_ebi(void) +{ + CLK_EnableModuleClock(EBI_MODULE); + + return; +} + +void MyProject_deinit_ebi(void) +{ + CLK_DisableModuleClock(EBI_MODULE); + + return; +} + +void MyProject_init_i2s(void) +{ + CLK_EnableModuleClock(I2S_MODULE); + CLK_SetModuleClock(I2S_MODULE, CLK_CLKSEL2_I2S_S_HCLK, MODULE_NoMsk); + + return; +} + +void MyProject_deinit_i2s(void) +{ + CLK_DisableModuleClock(I2S_MODULE); + + return; +} + +void MyProject_init_isp(void) +{ + CLK_EnableModuleClock(ISP_MODULE); + + return; +} + +void MyProject_deinit_isp(void) +{ + CLK_DisableModuleClock(ISP_MODULE); + + return; +} + +void MyProject_init_systick(void) +{ + CLK_EnableSysTick(CLK_CLKSEL0_STCLK_S_HIRC_DIV2, 0); + + return; +} + +void MyProject_deinit_systick(void) +{ + CLK_DisableSysTick(); + + return; +} + +void MyProject_init_base(void) +{ + /* If the macros do not exist in your project, please refer to the related clk.h in Header folder of the tool package */ + /* Enable clock source */ + CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk); + + /* Waiting for clock source ready */ + CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk); + + /* Set HCLK clock */ + CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1)); + + return; +} + +void MyProject_init(void) +{ + /*---------------------------------------------------------------------------------------------------------*/ + /* Init System Clock */ + /*---------------------------------------------------------------------------------------------------------*/ + //CLK->PWRCON = (CLK->PWRCON & ~(0x0000000FUL)) | 0x00000014UL; + //CLK->PLLCON = (CLK->PLLCON & ~(0x000FFFFFUL)) | 0x0005C22EUL; + //CLK->CLKDIV = (CLK->CLKDIV & ~(0x00FF0FFFUL)) | 0x00000000UL; + //CLK->CLKDIV1 = (CLK->CLKDIV1 & ~(0x00FFFFFFUL)) | 0x00000000UL; + //CLK->CLKSEL0 = (CLK->CLKSEL0 & ~(0x0000003FUL)) | 0x0000003FUL; + //CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(0xF37777FFUL)) | 0xFFFFFFFFUL; + //CLK->CLKSEL2 = (CLK->CLKSEL2 & ~(0x00030FFFUL)) | 0x000200FEUL; + //CLK->CLKSEL3 = (CLK->CLKSEL3 & ~(0x0000003FUL)) | 0x0000003FUL; + //CLK->AHBCLK = (CLK->AHBCLK & ~(0x0000000EUL)) | 0x0000000DUL; + //CLK->APBCLK = (CLK->APBCLK & ~(0xF8F7F37FUL)) | 0x20000000UL; + //CLK->APBCLK1 = (CLK->APBCLK1 & ~(0x00000007UL)) | 0x00000000UL; + //CLK->FRQDIV = (CLK->FRQDIV & ~(0x0000001FUL)) | 0x00000000UL; + //SysTick->CTRL = (SysTick->CTRL & ~(0x00000005UL)) | 0x00000001UL; + + /* Unlock protected registers */ + SYS_UnlockReg(); + + /* Enable base clock */ + MyProject_init_base(); + + /* Enable module clock and set clock source */ + MyProject_init_ebi(); + MyProject_init_i2s(); + MyProject_init_isp(); + MyProject_init_systick(); + + /* Update System Core Clock */ + /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */ + SystemCoreClockUpdate(); + + /* Lock protected registers */ + SYS_LockReg(); + + return; +} + +void I2S_IRQHandler() +{ + /* Write 4 Tx values to TX FIFO */ + I2S_WRITE_TX_FIFO(I2S, g_u32TxValue); + I2S_WRITE_TX_FIFO(I2S, g_u32TxValue); + I2S_WRITE_TX_FIFO(I2S, g_u32TxValue); + I2S_WRITE_TX_FIFO(I2S, g_u32TxValue); +} + +int main(){ + uint32_t u32DataCount, u32RxValue1, u32RxValue2; + + MyProject_init(); + GPIO_INIT_I2S(); + read_data(UDA1341_REG_DATA1); + set_data(UDA1341_REG_STATUS,STAT0_SC_256FS|STAT0_IF_I2S|STAT0_DC_FILTER); + set_data(UDA1341_REG_DATA0,DATA0_VOLUME(0) & DATA0_VOLUME_MASK); + + I2S_Open(I2S,I2S_MODE_MASTER, 8000, I2S_DATABIT_16, I2S_STEREO, I2S_FORMAT_I2S); + I2S_EnableMCLK(I2S,256*8000); + + NVIC_EnableIRQ(I2S_IRQn); + + /* Initiate data counter */ + u32DataCount = 0; + /* Initiate Tx value and Rx value */ + g_u32TxValue = 0x0; + u32RxValue1 = 0; + u32RxValue2 = 0; + /* Enable Tx threshold level interrupt */ + I2S_EnableInt(I2S, I2S_IE_TXTHIE_Msk); + + while(1){ + if((I2S->STATUS & I2S_STATUS_RXEMPTY_Msk) == 0) + { + u32DataCount++; + + if(u32DataCount >= 1000) + { + g_u32TxValue = 0x0; /* g_u32TxValue: 0x55005501, 0x55025503, ..., 0x55FE55FF */ + u32DataCount = 0; + }else{ + g_u32TxValue += 0x11223344; + } + } + } + return 0; +} \ No newline at end of file diff --git a/nuvoton/nuc120/test.uvoptx b/nuvoton/nuc120/test.uvoptx new file mode 100644 index 0000000..272066c --- /dev/null +++ b/nuvoton/nuc120/test.uvoptx @@ -0,0 +1,266 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 6 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 7 + + + + + + + + + + + NULink\Nu_Link.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + Nu_Link + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NUC100_AP_128 -FS00 -FL020000 -FP0($$Device:NUC120LE3AN$Flash\NUC100_AP_128.FLM)) + + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + System Viewer\I2S + 35905 + + + + + + + Source Group 1 + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\uda1341.c + uda1341.c + 0 + 0 + + + 1 + 3 + 5 + 0 + 0 + 0 + .\uda1341.h + uda1341.h + 0 + 0 + + + + + ::CMSIS + 1 + 0 + 0 + 1 + + + + ::CMSIS Driver + 1 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/nuvoton/nuc120/test.uvprojx b/nuvoton/nuc120/test.uvprojx new file mode 100644 index 0000000..6015301 --- /dev/null +++ b/nuvoton/nuc120/test.uvprojx @@ -0,0 +1,527 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Target 1 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + NUC120LE3AN + Nuvoton + Nuvoton.NuMicro_DFP.1.2.0 + http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack + IRAM(0x20000000,0x4000) IROM(0x00000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NUC100_AP_128 -FS00 -FL020000 -FP0($$Device:NUC120LE3AN$Flash\NUC100_AP_128.FLM)) + 0 + $$Device:NUC120LE3AN$Device\NUC100\Include\NUC100Series.h + + + + + + + + + + $$Device:NUC120LE3AN$SVD\Nuvoton\NUC100BN_v1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + test + 1 + 0 + 0 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + Source Group 1 + + + main.c + 1 + .\main.c + + + uda1341.c + 1 + .\uda1341.c + + + uda1341.h + 5 + .\uda1341.h + + + + + ::CMSIS + + + ::CMSIS Driver + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\CMSIS_Driver\I2C_MultiSlave_Config.h + + + + + + RTE\Device\NUC120LE3AN\startup_NUC100Series.s + + + + + + + + RTE\Device\NUC120LE3AN\system_NUC100Series.c + + + + + + + + + + diff --git a/nuvoton/nuc120/uda1341.c b/nuvoton/nuc120/uda1341.c new file mode 100644 index 0000000..2ce7710 --- /dev/null +++ b/nuvoton/nuc120/uda1341.c @@ -0,0 +1,109 @@ +#include "uda1341.h" + +#define L2DATA PE5 +#define L2MODE PC7 +#define L2CLK PC6 + +void delaylong(){ + for(uint16_t i = 0;i < 1500;i++){ + + } +} +void delayshort(){ + for(uint16_t i = 0;i < 500;i++){ + + } +} + +int read_data(int8_t addr){ + delaylong(); + delaylong(); + delaylong(); + delaylong(); + delaylong(); + GPIO_SetMode(PC,BIT6,GPIO_PMD_OUTPUT); + GPIO_SetMode(PC,BIT7,GPIO_PMD_OUTPUT); + GPIO_SetMode(PE,BIT5,GPIO_PMD_OUTPUT); + delayshort(); + L2CLK = 1; + L2MODE = 0; + L2DATA = 1; + delaylong(); + + int8_t ret = 0; + for(int i = 0; i < 8;i++){ + L2CLK = 0; + L2DATA = (((0x01< 0)?1:0; + delayshort(); + + L2CLK = 1; + delayshort(); + } + L2CLK = 0; + L2MODE = 1; + delayshort(); + L2MODE = 0; + delayshort(); + L2MODE = 1; + GPIO_SetMode(PE,BIT5,GPIO_PMD_INPUT); + delaylong(); + + for(int i = 0; i < 8;i++){ + L2CLK = 0; + delayshort(); + if(L2DATA == 1) + ret += (0x01< 0)?1:0; + delayshort(); + L2CLK = 1; + delayshort(); + } + L2CLK = 0; + L2MODE = 1; + delayshort(); + L2MODE = 0; + delayshort(); + L2MODE = 1; + delayshort(); + + for(int i = 0; i < 8;i++){ + L2CLK = 0; + delayshort(); + L2DATA = (((0x01< 0)?1:0; + delayshort(); + + L2CLK = 1; + delayshort(); + } + L2CLK = 0; + + return ret; +} \ No newline at end of file diff --git a/nuvoton/nuc120/uda1341.h b/nuvoton/nuc120/uda1341.h new file mode 100644 index 0000000..fc0030c --- /dev/null +++ b/nuvoton/nuc120/uda1341.h @@ -0,0 +1,202 @@ +#include "NUC100Series.h" + +#include +#include + +#define UDA1341_ADDR 0x14 + + + +#define UDA1341_REG_DATA0 (UDA1341_ADDR + 0) +#define UDA1341_REG_DATA1 (UDA1341_ADDR + 1) + +#define UDA1341_REG_STATUS (UDA1341_ADDR + 2) + + +#define UDA134X_EXTADDR_PREFIX 0xA0 +#define UDA134X_EXTDATA_PREFIX 0xE0 +#define UDA134X_EA000 0 +#define UDA134X_EA001 1 +#define UDA134X_EA010 2 +#define UDA134X_EA011 3 +#define UDA134X_EA100 4 +#define UDA134X_EA101 5 +#define UDA134X_EA110 6 +#define UDA134X_EA111 7 + + +/* status control *//*UDA1341???????*/ + +#define STAT0 (0x00) /*??8????????,0???0,1???1*/ + +#define STAT0_RST (1 << 6) /*set reset bit*/ + +#define STAT0_SC_MASK (3 << 4) + +#define STAT0_SC_512FS (0 << 4) /*set system clock 512fs*/ + +#define STAT0_SC_384FS (1 << 4) /*set system clock 384fs*/ + + +#define STAT0_SC_256FS (2 << 4) /*set system clock 256fs*/ + +#define STAT0_IF_MASK (7 << 1) + +#define STAT0_IF_I2S (0 << 1) /*set the function of i2s*/ + +#define STAT0_IF_LSB16 (1 << 1) /*LSB-justified 16 bits*/ + +#define STAT0_IF_LSB18 (2 << 1) /*LSB-justified 18 bits*/ + +#define STAT0_IF_LSB20 (3 << 1) /*LSB-justified 20 bits*/ + +#define STAT0_IF_MSB (4 << 1) /*MSB-justified*/ + +/*LSB-justified 16 bits input and MSB-justified output*/ + +#define STAT0_IF_LSB16MSB (5 << 1) + +/*LSB-justified 18 bits input and MSB-justified output*/ + +#define STAT0_IF_LSB18MSB (6 << 1) + +/*LSB-justified 20 bits input and MSB-justified output*/ + +#define STAT0_IF_LSB20MSB (7 << 1) + + +#define STAT0_DC_FILTER (1 << 0)/*?DC??*/ + +#define STAT0_DC_NO_FILTER (0 << 0) /*??DC??*/ + + +#define STAT1 (0x80) /*status control set model 1*/ + +#define STAT1_DAC_GAIN (1 << 6) /* gain of DAC */ + +#define STAT1_ADC_GAIN (1 << 5) /* gain of ADC */ + +#define STAT1_ADC_POL (1 << 4) /* polarity of ADC */ + +#define STAT1_DAC_POL (1 << 3) /* polarity of DAC */ + +#define STAT1_DBL_SPD (1 << 2) /* double speed playback */ + +#define STAT1_ADC_ON (1 << 1) /* ADC powered */ + +#define STAT1_DAC_ON (1 << 0) /* DAC powered */ + + + +/* data0 direct control */ + +#define DATA0 (0x00) /*model 0 volume control*/ + +#define DATA0_VOLUME_MASK (0x3f) + +#define DATA0_VOLUME(x) (x) + + +#define DATA1 (0x40) + +#define DATA1_BASS(x) ((x) << 2) + +#define DATA1_BASS_MASK (15 << 2) + +#define DATA1_TREBLE(x) ((x)) + +#define DATA1_TREBLE_MASK (3) + + +#define DATA2 (0x80) + +#define DATA2_PEAKAFTER (0x1 << 5) + +#define DATA2_DEEMP_NONE (0x0 << 3) + +#define DATA2_DEEMP_32KHz (0x1 << 3) + +#define DATA2_DEEMP_44KHz (0x2 << 3) + +#define DATA2_DEEMP_48KHz (0x3 << 3) + +#define DATA2_MUTE (0x1 << 2) + +#define DATA2_FILTER_FLAT (0x0 << 0) + +#define DATA2_FILTER_MIN (0x1 << 0) + +#define DATA2_FILTER_MAX (0x3 << 0) + +/* data0 extend control */ + +#define EXTADDR(n) (0xc0 | (n)) + +#define EXTDATA(d) (0xe0 | (d)) + + + +#define EXT0 0 + +#define EXT0_CH1_GAIN(x) (x) + +#define EXT1 1 + +#define EXT1_CH2_GAIN(x) (x) + +#define EXT2 2 + +#define EXT2_MIC_GAIN_MASK (7 << 2) + +#define EXT2_MIC_GAIN(x) ((x) << 2) + +#define EXT2_MIXMODE_DOUBLEDIFF (0) + +#define EXT2_MIXMODE_CH1 (1) + +#define EXT2_MIXMODE_CH2 (2) + +#define EXT2_MIXMODE_MIX (3) + +#define EXT4 4 + +#define EXT4_AGC_ENABLE (1 << 4) + +#define EXT4_INPUT_GAIN_MASK (3) + +#define EXT4_INPUT_GAIN(x) ((x) & 3) + +#define EXT5 5 + +#define EXT5_INPUT_GAIN(x) ((x) >> 2) + +#define EXT6 6 + +#define EXT6_AGC_CONSTANT_MASK (7 << 2) + +#define EXT6_AGC_CONSTANT(x) ((x) << 2) + +#define EXT6_AGC_LEVEL_MASK (3) + +#define EXT6_AGC_LEVEL(x) (x) + + +#define AUDIO_FMT_MASK (AFMT_S16_LE) + +#define AUDIO_FMT_DEFAULT (AFMT_S16_LE) + + + +#define AUDIO_CHANNELS_DEFAULT 2 + +#define AUDIO_RATE_DEFAULT 44100 + + + +#define AUDIO_NBFRAGS_DEFAULT 8 + +#define AUDIO_FRAGSIZE_DEFAULT 8192 + +int read_data(int8_t addr); + +int set_data(int8_t addr,int8_t data); \ No newline at end of file