shit,用51单片机来h和esp8266 AT指令集通信，shit.且low逼得项目
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<SchemaVersion>1.0</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Extensions>
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<cExt>*.c</cExt>
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<aExt>*.s*; *.src; *.a*</aExt>
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<oExt>*.obj; *.o</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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||||||
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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||||||
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<nMigrate>0</nMigrate>
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||||||
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</Extensions>
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<DaveTm>
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</DaveTm>
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<Target>
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<TargetName>Target 1</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<CLKADS>12000000</CLKADS>
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<OPTTT>
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</OPTTT>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<FlashByte>65535</FlashByte>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<OPTLEX>
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<TabStop>8</TabStop>
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<ListingPath>.\Listings\</ListingPath>
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</OPTLEX>
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<ListingPage>
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<CreateCListing>1</CreateCListing>
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<CreateAListing>1</CreateAListing>
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<CreateLListing>1</CreateLListing>
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<LMap>1</LMap>
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<LComments>1</LComments>
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<LGenerateSymbols>1</LGenerateSymbols>
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<LLibSym>1</LLibSym>
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<LLines>1</LLines>
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<LLocSym>1</LLocSym>
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<LPubSym>1</LPubSym>
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<LXref>0</LXref>
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<LExpSel>0</LExpSel>
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</OPTXL>
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<OPTFL>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<IsCurrentTarget>1</IsCurrentTarget>
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</OPTFL>
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<CpuCode>6</CpuCode>
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<DebugOpt>
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<uSim>0</uSim>
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<uTrg>1</uTrg>
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<sLdApp>1</sLdApp>
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<sGomain>1</sGomain>
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<sRbreak>1</sRbreak>
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<sRwatch>1</sRwatch>
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<sRmem>1</sRmem>
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<sRfunc>1</sRfunc>
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<sRbox>1</sRbox>
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<tLdApp>1</tLdApp>
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<tGomain>1</tGomain>
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<tRbreak>1</tRbreak>
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<tRwatch>1</tRwatch>
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<tRmem>1</tRmem>
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<tRfunc>0</tRfunc>
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<tRbox>1</tRbox>
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<tRtrace>1</tRtrace>
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<sRSysVw>1</sRSysVw>
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<tRSysVw>1</tRSysVw>
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<sRunDeb>0</sRunDeb>
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<sLrtime>0</sLrtime>
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<bEvRecOn>1</bEvRecOn>
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<bSchkAxf>0</bSchkAxf>
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<bTchkAxf>0</bTchkAxf>
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<nTsel>7</nTsel>
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<sDll></sDll>
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<sDllPa></sDllPa>
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<sDlgDll></sDlgDll>
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<sDlgPa></sDlgPa>
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<sIfile></sIfile>
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<tDll></tDll>
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<tDllPa></tDllPa>
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<tDlgDll></tDlgDll>
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<tDlgPa></tDlgPa>
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<tIfile></tIfile>
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<pMon>NULink\Nu_Link.dll</pMon>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ARMRTXEVENTFLAGS</Key>
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<Name>-L70 -Z18 -C0 -M0 -T1</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>DLGTARM</Key>
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<Name>(1010=-1,-1,-1,-1,0)(1007=105,177,312,398,0)(1008=-1,-1,-1,-1,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ARMDBGFLAGS</Key>
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<Name></Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>Nu_Link</Key>
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<Name></Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>UL2CM3</Key>
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<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NUC100_AP_64 -FS00 -FL010000 -FP0($$Device:NUC120RD3AN$Flash\NUC100_AP_64.FLM))</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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<Tracepoint>
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<THDelay>0</THDelay>
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</Tracepoint>
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<DebugFlag>
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<trace>0</trace>
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<periodic>1</periodic>
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<aLwin>1</aLwin>
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<aCover>0</aCover>
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<aSer1>0</aSer1>
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<aSer2>0</aSer2>
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<aPa>0</aPa>
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<viewmode>1</viewmode>
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<vrSel>0</vrSel>
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<aSym>0</aSym>
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<aTbox>0</aTbox>
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<AscS1>0</AscS1>
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<AscS2>0</AscS2>
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<AscS3>0</AscS3>
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<aSer3>0</aSer3>
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||||||
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<eProf>0</eProf>
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||||||
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<aLa>0</aLa>
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<aPa1>0</aPa1>
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<AscS4>0</AscS4>
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<aSer4>0</aSer4>
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<StkLoc>0</StkLoc>
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<TrcWin>0</TrcWin>
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<newCpu>0</newCpu>
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<uProt>0</uProt>
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</DebugFlag>
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<LintExecutable></LintExecutable>
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<LintConfigFile></LintConfigFile>
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<bLintAuto>0</bLintAuto>
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<bAutoGenD>0</bAutoGenD>
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<LntExFlags>0</LntExFlags>
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<pMisraName></pMisraName>
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<pszMrule></pszMrule>
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<pSingCmds></pSingCmds>
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<pMultCmds></pMultCmds>
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<pMisraNamep></pMisraNamep>
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<pszMrulep></pszMrulep>
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<pSingCmdsp></pSingCmdsp>
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<pMultCmdsp></pMultCmdsp>
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<SystemViewers>
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<Entry>
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<Name>System Viewer\CLK</Name>
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<WinId>35903</WinId>
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</Entry>
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<Entry>
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<Name>System Viewer\GCR</Name>
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<WinId>35904</WinId>
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</Entry>
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<Entry>
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<Name>System Viewer\UART1</Name>
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<WinId>35905</WinId>
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</Entry>
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</SystemViewers>
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</TargetOption>
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</Target>
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<Group>
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<GroupName>src</GroupName>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<RteFlg>0</RteFlg>
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<File>
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<GroupNumber>1</GroupNumber>
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<FileNumber>1</FileNumber>
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<bDave2>0</bDave2>
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<PathWithFileName>.\main.c</PathWithFileName>
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<FilenameWithoutPath>main.c</FilenameWithoutPath>
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<RteFlg>0</RteFlg>
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<bShared>0</bShared>
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</File>
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</Group>
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<Group>
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<GroupName>::CMSIS</GroupName>
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<tvExp>0</tvExp>
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||||||
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<tvExpOptDlg>0</tvExpOptDlg>
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||||||
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<cbSel>0</cbSel>
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||||||
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<RteFlg>1</RteFlg>
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</Group>
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<Group>
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<GroupName>::CMSIS Driver</GroupName>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<RteFlg>1</RteFlg>
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</Group>
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<Group>
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<GroupName>::Device</GroupName>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<RteFlg>1</RteFlg>
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</Group>
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</ProjectOpt>
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@ -0,0 +1,484 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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<SchemaVersion>2.1</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Targets>
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<Target>
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<TargetName>Target 1</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
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<uAC6>0</uAC6>
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<TargetOption>
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<TargetCommonOption>
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<Device>NUC120RD3AN</Device>
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<Vendor>Nuvoton</Vendor>
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<PackID>Nuvoton.NuMicro_DFP.1.2.0</PackID>
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<PackURL>http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack</PackURL>
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<Cpu>IRAM(0x20000000,0x4000) IROM(0x00000000,0x10000) CPUTYPE("Cortex-M0") CLOCK(12000000)</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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<StartupFile></StartupFile>
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<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NUC100_AP_64 -FS00 -FL010000 -FP0($$Device:NUC120RD3AN$Flash\NUC100_AP_64.FLM))</FlashDriverDll>
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<DeviceId>0</DeviceId>
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<RegisterFile>$$Device:NUC120RD3AN$Device\NUC100\Include\NUC100Series.h</RegisterFile>
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<MemoryEnv></MemoryEnv>
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<Cmp></Cmp>
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<Asm></Asm>
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<Linker></Linker>
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<OHString></OHString>
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<InfinionOptionDll></InfinionOptionDll>
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<SLE66CMisc></SLE66CMisc>
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<SLE66AMisc></SLE66AMisc>
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<SLE66LinkerMisc></SLE66LinkerMisc>
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<SFDFile>$$Device:NUC120RD3AN$SVD\Nuvoton\NUC100BN_v1.svd</SFDFile>
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<bCustSvd>0</bCustSvd>
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||||||
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<UseEnv>0</UseEnv>
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||||||
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<BinPath></BinPath>
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<IncludePath></IncludePath>
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<LibPath></LibPath>
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<RegisterFilePath></RegisterFilePath>
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<DBRegisterFilePath></DBRegisterFilePath>
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<TargetStatus>
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<Error>0</Error>
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||||||
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<ExitCodeStop>0</ExitCodeStop>
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<ButtonStop>0</ButtonStop>
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||||||
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<NotGenerated>0</NotGenerated>
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||||||
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<InvalidFlash>1</InvalidFlash>
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||||||
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</TargetStatus>
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||||||
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<OutputDirectory>.\Objects\</OutputDirectory>
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||||||
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<OutputName>485</OutputName>
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||||||
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<CreateExecutable>1</CreateExecutable>
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||||||
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<CreateLib>0</CreateLib>
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||||||
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<CreateHexFile>0</CreateHexFile>
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||||||
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<DebugInformation>1</DebugInformation>
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||||||
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<BrowseInformation>1</BrowseInformation>
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<ListingPath>.\Listings\</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<Merge32K>0</Merge32K>
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<CreateBatchFile>0</CreateBatchFile>
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<BeforeCompile>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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||||||
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<UserProg1Name></UserProg1Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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||||||
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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||||||
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<nStopU1X>0</nStopU1X>
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||||||
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<nStopU2X>0</nStopU2X>
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||||||
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</BeforeCompile>
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||||||
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<BeforeMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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||||||
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<UserProg1Name></UserProg1Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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||||||
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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||||||
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<nStopB1X>0</nStopB1X>
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<nStopB2X>0</nStopB2X>
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||||||
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</BeforeMake>
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<AfterMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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||||||
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<UserProg1Name></UserProg1Name>
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||||||
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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||||||
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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||||||
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<nStopA1X>0</nStopA1X>
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||||||
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<nStopA2X>0</nStopA2X>
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||||||
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</AfterMake>
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||||||
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<SelectedForBatchBuild>0</SelectedForBatchBuild>
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||||||
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<SVCSIdString></SVCSIdString>
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||||||
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</TargetCommonOption>
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||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> </SimDllArguments>
|
||||||
|
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> </TargetDllArguments>
|
||||||
|
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>-1</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M0"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>0</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>0</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<nSecure>0</nSecure>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x4000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x4000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>2</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<uGnu>1</uGnu>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<v6Lang>1</v6Lang>
|
||||||
|
<v6LangP>1</v6LangP>
|
||||||
|
<vShortEn>1</vShortEn>
|
||||||
|
<vShortWch>1</vShortWch>
|
||||||
|
<v6Lto>0</v6Lto>
|
||||||
|
<v6WtE>0</v6WtE>
|
||||||
|
<v6Rtti>0</v6Rtti>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<uClangAs>0</uClangAs>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x00000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile></ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>src</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>main.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>.\main.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>::CMSIS</GroupName>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>::CMSIS Driver</GroupName>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>::Device</GroupName>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
<RTE>
|
||||||
|
<apis>
|
||||||
|
<api Capiversion="2.3.0" Cclass="CMSIS Driver" Cgroup="USART" exclusive="0">
|
||||||
|
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</api>
|
||||||
|
</apis>
|
||||||
|
<components>
|
||||||
|
<component Capiversion="2.3.0" Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cvendor="ARM" Cversion="2.3.0">
|
||||||
|
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.3.0" condition="ARMv6_7_8-M Device">
|
||||||
|
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Driver" Csub="ADC" Cvendor="Nuvoton" Cversion="3.00.004" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Driver" Csub="CLK" Cvendor="Nuvoton" Cversion="3.00.004" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Driver" Csub="SYS" Cvendor="Nuvoton" Cversion="3.00.004" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Driver" Csub="Timer" Cvendor="Nuvoton" Cversion="3.00.004" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Driver" Csub="UART" Cvendor="Nuvoton" Cversion="3.00.004" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.00.002" condition="M0NuMicro NUC100 Device">
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
</components>
|
||||||
|
<files>
|
||||||
|
<file attr="config" category="sourceAsm" condition="Compiler ARM" name="Device\NUC100\Source\ARM\startup_NUC100Series.s" version="3.00.002">
|
||||||
|
<instance index="0">RTE\Device\NUC120RD3AN\startup_NUC100Series.s</instance>
|
||||||
|
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.00.002" condition="M0NuMicro NUC100 Device"/>
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</file>
|
||||||
|
<file attr="config" category="source" name="Device\NUC100\Source\system_NUC100Series.c" version="3.00.002">
|
||||||
|
<instance index="0">RTE\Device\NUC120RD3AN\system_NUC100Series.c</instance>
|
||||||
|
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.00.002" condition="M0NuMicro NUC100 Device"/>
|
||||||
|
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</file>
|
||||||
|
</files>
|
||||||
|
</RTE>
|
||||||
|
|
||||||
|
</Project>
|
||||||
|
|
@ -0,0 +1,9 @@
|
||||||
|
<?xml version="1.0" encoding="utf-8"?>
|
||||||
|
|
||||||
|
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
|
||||||
|
|
||||||
|
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
|
||||||
|
<events>
|
||||||
|
</events>
|
||||||
|
|
||||||
|
</component_viewer>
|
||||||
|
|
@ -0,0 +1,975 @@
|
||||||
|
Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Section Cross References
|
||||||
|
|
||||||
|
main.o(i.SYS_Init) refers to clk.o(i.CLK_EnableXtalRC) for CLK_EnableXtalRC
|
||||||
|
main.o(i.SYS_Init) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
|
||||||
|
main.o(i.SYS_Init) refers to clk.o(i.CLK_SetHCLK) for CLK_SetHCLK
|
||||||
|
main.o(i.SYS_Init) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock
|
||||||
|
main.o(i.UART02_IRQHandler) refers to main.o(i.UART_TEST_HANDLE) for UART_TEST_HANDLE
|
||||||
|
main.o(i.UART1_Init) refers to sys.o(i.SYS_ResetModule) for SYS_ResetModule
|
||||||
|
main.o(i.UART1_Init) refers to uart.o(i.UART_Open) for UART_Open
|
||||||
|
main.o(i.UART_FunctionTest) refers to noretval__2printf.o(.text) for __2printf
|
||||||
|
main.o(i.UART_FunctionTest) refers to uart.o(i.UART_EnableInt) for UART_EnableInt
|
||||||
|
main.o(i.UART_FunctionTest) refers to uart.o(i.UART_DisableInt) for UART_DisableInt
|
||||||
|
main.o(i.UART_FunctionTest) refers to main.o(.data) for g_bWait
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to _printf_c.o(.ARM.Collect$$_printf_percent$$00000013) for _printf_c
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to _printf_str.o(.text) for _printf_str
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to noretval__2printf.o(.text) for __2printf
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to main.o(.data) for g_bWait
|
||||||
|
main.o(i.UART_TEST_HANDLE) refers to main.o(.bss) for g_u8RecData
|
||||||
|
main.o(i.main) refers to main.o(i.SYS_Init) for SYS_Init
|
||||||
|
main.o(i.main) refers to main.o(i.UART1_Init) for UART1_Init
|
||||||
|
main.o(i.main) refers to uart.o(i.UART_Write) for UART_Write
|
||||||
|
main.o(i.main) refers to main.o(i.delay_ms) for delay_ms
|
||||||
|
clk.o(i.CLK_DisableCKO) refers to clk.o(i.CLK_DisableModuleClock) for CLK_DisableModuleClock
|
||||||
|
clk.o(i.CLK_DisableModuleClock) refers to clk.o(.constdata) for .constdata
|
||||||
|
clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock
|
||||||
|
clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock
|
||||||
|
clk.o(i.CLK_EnableModuleClock) refers to clk.o(.constdata) for .constdata
|
||||||
|
clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
|
||||||
|
clk.o(i.CLK_EnablePLL) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
|
||||||
|
clk.o(i.CLK_GetCPUFreq) refers to system_nuc100series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
|
||||||
|
clk.o(i.CLK_GetCPUFreq) refers to system_nuc100series.o(.data) for SystemCoreClock
|
||||||
|
clk.o(i.CLK_GetHCLKFreq) refers to system_nuc100series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
|
||||||
|
clk.o(i.CLK_GetHCLKFreq) refers to system_nuc100series.o(.data) for SystemCoreClock
|
||||||
|
clk.o(i.CLK_GetPCLKFreq) refers to system_nuc100series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
|
||||||
|
clk.o(i.CLK_GetPCLKFreq) refers to system_nuc100series.o(.data) for SystemCoreClock
|
||||||
|
clk.o(i.CLK_GetPLLClockFreq) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_EnablePLL) for CLK_EnablePLL
|
||||||
|
clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_SetHCLK) for CLK_SetHCLK
|
||||||
|
clk.o(i.CLK_SetHCLK) refers to system_nuc100series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
|
||||||
|
clk.o(i.CLK_SetModuleClock) refers to clk.o(.constdata) for .constdata
|
||||||
|
retarget.o(.emb_text) refers to retarget.o(i.Hard_Fault_Handler) for Hard_Fault_Handler
|
||||||
|
retarget.o(i.Hard_Fault_Handler) refers to noretval__2printf.o(.text) for __2printf
|
||||||
|
retarget.o(i.Hard_Fault_Handler) refers to retarget.o(i.stackDump) for stackDump
|
||||||
|
retarget.o(i.SendChar) refers to retarget.o(i.SendChar_ToUART) for SendChar_ToUART
|
||||||
|
retarget.o(i._ttywrch) refers to retarget.o(i.SendChar) for SendChar
|
||||||
|
retarget.o(i.fgetc) refers to retarget.o(i.GetChar) for GetChar
|
||||||
|
retarget.o(i.fputc) refers to retarget.o(i.SendChar) for SendChar
|
||||||
|
retarget.o(i.stackDump) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
retarget.o(i.stackDump) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
|
||||||
|
retarget.o(i.stackDump) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
|
||||||
|
retarget.o(i.stackDump) refers to noretval__2printf.o(.text) for __2printf
|
||||||
|
timer.o(i.TIMER_Delay) refers to timer.o(i.TIMER_GetModuleClock) for TIMER_GetModuleClock
|
||||||
|
timer.o(i.TIMER_Delay) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
timer.o(i.TIMER_Delay) refers to system_nuc100series.o(.data) for SystemCoreClock
|
||||||
|
timer.o(i.TIMER_GetModuleClock) refers to rt_memcpy.o(.emb_text) for __aeabi_memcpy4
|
||||||
|
timer.o(i.TIMER_GetModuleClock) refers to timer.o(.constdata) for .constdata
|
||||||
|
timer.o(i.TIMER_GetModuleClock) refers to system_nuc100series.o(.data) for SystemCoreClock
|
||||||
|
timer.o(i.TIMER_Open) refers to timer.o(i.TIMER_GetModuleClock) for TIMER_GetModuleClock
|
||||||
|
timer.o(i.TIMER_Open) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
uart.o(i.CLK_GetPLLClockFreq) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
uart.o(i.UART_DisableInt) refers to uart.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ
|
||||||
|
uart.o(i.UART_EnableInt) refers to uart.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ
|
||||||
|
uart.o(i.UART_Open) refers to uart.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
|
||||||
|
uart.o(i.UART_Open) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
uart.o(i.UART_Open) refers to uart.o(.constdata) for .constdata
|
||||||
|
uart.o(i.UART_SelectIrDAMode) refers to uart.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
|
||||||
|
uart.o(i.UART_SelectIrDAMode) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
uart.o(i.UART_SelectIrDAMode) refers to uart.o(.constdata) for .constdata
|
||||||
|
uart.o(i.UART_SetLine_Config) refers to uart.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
|
||||||
|
uart.o(i.UART_SetLine_Config) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
uart.o(i.UART_SetLine_Config) refers to uart.o(.constdata) for .constdata
|
||||||
|
startup_nuc100series.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
|
||||||
|
startup_nuc100series.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
|
||||||
|
startup_nuc100series.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
|
||||||
|
startup_nuc100series.o(RESET) refers to startup_nuc100series.o(STACK) for __initial_sp
|
||||||
|
startup_nuc100series.o(RESET) refers to startup_nuc100series.o(.text) for Reset_Handler
|
||||||
|
startup_nuc100series.o(RESET) refers to retarget.o(.emb_text) for HardFault_Handler
|
||||||
|
startup_nuc100series.o(RESET) refers to main.o(i.UART02_IRQHandler) for UART02_IRQHandler
|
||||||
|
startup_nuc100series.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
|
||||||
|
startup_nuc100series.o(.text) refers to system_nuc100series.o(i.SystemInit) for SystemInit
|
||||||
|
startup_nuc100series.o(.text) refers to __main.o(!!!main) for __main
|
||||||
|
startup_nuc100series.o(.text) refers to startup_nuc100series.o(HEAP) for Heap_Mem
|
||||||
|
startup_nuc100series.o(.text) refers to startup_nuc100series.o(STACK) for Stack_Mem
|
||||||
|
system_nuc100series.o(i.CLK_GetPLLClockFreq) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
system_nuc100series.o(i.SystemCoreClockUpdate) refers to system_nuc100series.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
|
||||||
|
system_nuc100series.o(i.SystemCoreClockUpdate) refers to aeabi_sdiv.o(.text) for __aeabi_uidivmod
|
||||||
|
system_nuc100series.o(i.SystemCoreClockUpdate) refers to system_nuc100series.o(.data) for PllClock
|
||||||
|
__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file
|
||||||
|
__2printf.o(.text) refers to retarget.o(.data) for __stdout
|
||||||
|
noretval__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file
|
||||||
|
noretval__2printf.o(.text) refers to retarget.o(.data) for __stdout
|
||||||
|
__printf.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
_printf_str.o(.text) refers (Special) to _printf_char.o(.text) for _printf_cs_common
|
||||||
|
_printf_hex_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_ll.o(.text) refers to _printf_hex_ll.o(.constdata) for .constdata
|
||||||
|
_printf_hex_int.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_int.o(.text) refers to _printf_hex_int.o(.constdata) for .constdata
|
||||||
|
_printf_hex_int_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_int_ll.o(.text) refers to _printf_hex_int_ll.o(.constdata) for .constdata
|
||||||
|
_printf_hex_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_ptr.o(.text) refers to _printf_hex_ptr.o(.constdata) for .constdata
|
||||||
|
_printf_hex_int_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_int_ptr.o(.text) refers to _printf_hex_int_ptr.o(.constdata) for .constdata
|
||||||
|
_printf_hex_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_ll_ptr.o(.text) refers to _printf_hex_ll_ptr.o(.constdata) for .constdata
|
||||||
|
_printf_hex_int_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
|
||||||
|
_printf_hex_int_ll_ptr.o(.text) refers to _printf_hex_int_ll_ptr.o(.constdata) for .constdata
|
||||||
|
__printf_flags.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags.o(.text) refers to __printf_flags.o(.constdata) for .constdata
|
||||||
|
__printf_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_ss.o(.text) refers to __printf_flags_ss.o(.constdata) for .constdata
|
||||||
|
__printf_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
|
||||||
|
__printf_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
|
||||||
|
__printf_flags_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_wp.o(.text) refers to __printf_flags_wp.o(.constdata) for .constdata
|
||||||
|
__printf_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
|
||||||
|
__printf_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
|
||||||
|
__printf_flags_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
|
||||||
|
__printf_flags_ss_wp.o(.text) refers to __printf_flags_ss_wp.o(.constdata) for .constdata
|
||||||
|
_printf_c.o(.ARM.Collect$$_printf_percent$$00000013) refers (Weak) to _printf_char.o(.text) for _printf_char
|
||||||
|
_printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) refers (Weak) to _printf_hex_int.o(.text) for _printf_int_hex
|
||||||
|
_printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) refers (Special) to _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) for _printf_percent_end
|
||||||
|
rt_memcpy.o(.text) refers to rt_memcpy.o(.emb_text) for __aeabi_memcpy4
|
||||||
|
__main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1
|
||||||
|
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh
|
||||||
|
aeabi_idiv0_sigfpe.o(.text) refers to rt_div0.o(.text) for __rt_div0
|
||||||
|
_printf_char.o(.text) refers (Weak) to _printf_str.o(.text) for _printf_str
|
||||||
|
_printf_char_file.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common
|
||||||
|
_printf_char_file.o(.text) refers to retarget.o(i.ferror) for ferror
|
||||||
|
_printf_char_file.o(.text) refers to retarget.o(i.fputc) for fputc
|
||||||
|
__rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init
|
||||||
|
__rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init
|
||||||
|
__rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init
|
||||||
|
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main
|
||||||
|
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit
|
||||||
|
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001
|
||||||
|
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008
|
||||||
|
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A
|
||||||
|
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B
|
||||||
|
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D
|
||||||
|
__rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap
|
||||||
|
__rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004
|
||||||
|
rt_div0.o(.text) refers to defsig_fpe_outer.o(.text) for __rt_SIGFPE
|
||||||
|
_printf_char_common.o(.text) refers to __printf_wp.o(.text) for __printf
|
||||||
|
sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace
|
||||||
|
sys_stackheap_outer.o(.text) refers to startup_nuc100series.o(.text) for __user_initial_stackheap
|
||||||
|
sys_stackheap_outer.o(__vectab_stack_and_reset_area) refers to tempstk.o(.text) for __temporary_stack_top
|
||||||
|
sys_stackheap_outer.o(__vectab_stack_and_reset_area) refers to __main.o(!!!main) for __main
|
||||||
|
exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit
|
||||||
|
defsig_fpe_outer.o(.text) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner
|
||||||
|
defsig_fpe_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit
|
||||||
|
defsig_fpe_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1
|
||||||
|
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1
|
||||||
|
libspace.o(.text) refers to libspace.o(.bss) for __libspace_start
|
||||||
|
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
|
||||||
|
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
|
||||||
|
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
|
||||||
|
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
|
||||||
|
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
|
||||||
|
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
|
||||||
|
rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000
|
||||||
|
rt_raise.o(.text) refers to __raise.o(.text) for __raise
|
||||||
|
rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit
|
||||||
|
defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit
|
||||||
|
defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.text) for __ARM_argv_veneer
|
||||||
|
libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.text) for __ARM_argv_veneer
|
||||||
|
sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
|
||||||
|
sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
|
||||||
|
rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown
|
||||||
|
rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit
|
||||||
|
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001
|
||||||
|
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003
|
||||||
|
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004
|
||||||
|
__raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler
|
||||||
|
defsig_general.o(.text) refers to retarget.o(i._ttywrch) for _ttywrch
|
||||||
|
defsig.o(CL$$defsig) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner
|
||||||
|
defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
|
||||||
|
_get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard
|
||||||
|
_get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM
|
||||||
|
_get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1
|
||||||
|
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1
|
||||||
|
sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
|
||||||
|
sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
|
||||||
|
defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
|
||||||
|
defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit
|
||||||
|
defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise
|
||||||
|
defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||||
|
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Removing Unused input sections from the image.
|
||||||
|
|
||||||
|
Removing main.o(.rev16_text), (4 bytes).
|
||||||
|
Removing main.o(.revsh_text), (4 bytes).
|
||||||
|
Removing main.o(i.UART_FunctionTest), (436 bytes).
|
||||||
|
Removing adc.o(.rev16_text), (4 bytes).
|
||||||
|
Removing adc.o(.revsh_text), (4 bytes).
|
||||||
|
Removing adc.o(i.ADC_Close), (10 bytes).
|
||||||
|
Removing adc.o(i.ADC_DisableHWTrigger), (12 bytes).
|
||||||
|
Removing adc.o(i.ADC_DisableInt), (50 bytes).
|
||||||
|
Removing adc.o(i.ADC_EnableHWTrigger), (30 bytes).
|
||||||
|
Removing adc.o(i.ADC_EnableInt), (50 bytes).
|
||||||
|
Removing adc.o(i.ADC_Open), (32 bytes).
|
||||||
|
Removing clk.o(.rev16_text), (4 bytes).
|
||||||
|
Removing clk.o(.revsh_text), (4 bytes).
|
||||||
|
Removing clk.o(i.CLK_DisableCKO), (16 bytes).
|
||||||
|
Removing clk.o(i.CLK_DisableModuleClock), (60 bytes).
|
||||||
|
Removing clk.o(i.CLK_DisablePLL), (20 bytes).
|
||||||
|
Removing clk.o(i.CLK_DisableSysTick), (12 bytes).
|
||||||
|
Removing clk.o(i.CLK_DisableXtalRC), (16 bytes).
|
||||||
|
Removing clk.o(i.CLK_EnableCKO), (44 bytes).
|
||||||
|
Removing clk.o(i.CLK_EnablePLL), (388 bytes).
|
||||||
|
Removing clk.o(i.CLK_EnableSysTick), (72 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetCPUFreq), (16 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetHCLKFreq), (16 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetHXTFreq), (28 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetLXTFreq), (24 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetPCLKFreq), (16 bytes).
|
||||||
|
Removing clk.o(i.CLK_GetPLLClockFreq), (128 bytes).
|
||||||
|
Removing clk.o(i.CLK_Idle), (36 bytes).
|
||||||
|
Removing clk.o(i.CLK_PowerDown), (40 bytes).
|
||||||
|
Removing clk.o(i.CLK_SetCoreClock), (168 bytes).
|
||||||
|
Removing clk.o(i.CLK_SetModuleClock), (264 bytes).
|
||||||
|
Removing clk.o(i.CLK_SetSysTickClockSrc), (20 bytes).
|
||||||
|
Removing retarget.o(.rev16_text), (4 bytes).
|
||||||
|
Removing retarget.o(.revsh_text), (4 bytes).
|
||||||
|
Removing retarget.o(i.GetChar), (32 bytes).
|
||||||
|
Removing retarget.o(i.IsDebugFifoEmpty), (20 bytes).
|
||||||
|
Removing retarget.o(i._ttywrch), (12 bytes).
|
||||||
|
Removing retarget.o(i.fgetc), (10 bytes).
|
||||||
|
Removing retarget.o(i.kbhit), (20 bytes).
|
||||||
|
Removing sys.o(.rev16_text), (4 bytes).
|
||||||
|
Removing sys.o(.revsh_text), (4 bytes).
|
||||||
|
Removing sys.o(i.SYS_ClearResetSrc), (16 bytes).
|
||||||
|
Removing sys.o(i.SYS_DisableBOD), (18 bytes).
|
||||||
|
Removing sys.o(i.SYS_EnableBOD), (50 bytes).
|
||||||
|
Removing sys.o(i.SYS_GetBODStatus), (14 bytes).
|
||||||
|
Removing sys.o(i.SYS_GetResetSrc), (8 bytes).
|
||||||
|
Removing sys.o(i.SYS_IsRegLocked), (20 bytes).
|
||||||
|
Removing sys.o(i.SYS_ReadPDID), (8 bytes).
|
||||||
|
Removing sys.o(i.SYS_ResetCPU), (18 bytes).
|
||||||
|
Removing sys.o(i.SYS_ResetChip), (18 bytes).
|
||||||
|
Removing timer.o(.rev16_text), (4 bytes).
|
||||||
|
Removing timer.o(.revsh_text), (4 bytes).
|
||||||
|
Removing timer.o(i.TIMER_Close), (8 bytes).
|
||||||
|
Removing timer.o(i.TIMER_Delay), (272 bytes).
|
||||||
|
Removing timer.o(i.TIMER_DisableCapture), (10 bytes).
|
||||||
|
Removing timer.o(i.TIMER_DisableEventCounter), (12 bytes).
|
||||||
|
Removing timer.o(i.TIMER_EnableCapture), (20 bytes).
|
||||||
|
Removing timer.o(i.TIMER_EnableEventCounter), (22 bytes).
|
||||||
|
Removing timer.o(i.TIMER_GetModuleClock), (132 bytes).
|
||||||
|
Removing timer.o(i.TIMER_Open), (118 bytes).
|
||||||
|
Removing timer.o(.constdata), (32 bytes).
|
||||||
|
Removing uart.o(.rev16_text), (4 bytes).
|
||||||
|
Removing uart.o(.revsh_text), (4 bytes).
|
||||||
|
Removing uart.o(i.UART_ClearIntFlag), (80 bytes).
|
||||||
|
Removing uart.o(i.UART_Close), (6 bytes).
|
||||||
|
Removing uart.o(i.UART_DisableFlowCtrl), (12 bytes).
|
||||||
|
Removing uart.o(i.UART_DisableInt), (56 bytes).
|
||||||
|
Removing uart.o(i.UART_EnableFlowCtrl), (30 bytes).
|
||||||
|
Removing uart.o(i.UART_EnableInt), (56 bytes).
|
||||||
|
Removing uart.o(i.UART_Read), (54 bytes).
|
||||||
|
Removing uart.o(i.UART_SelectIrDAMode), (164 bytes).
|
||||||
|
Removing uart.o(i.UART_SelectLINMode), (26 bytes).
|
||||||
|
Removing uart.o(i.UART_SelectRS485Mode), (32 bytes).
|
||||||
|
Removing uart.o(i.UART_SetLine_Config), (184 bytes).
|
||||||
|
Removing uart.o(i.UART_SetTimeoutCnt), (22 bytes).
|
||||||
|
Removing uart.o(i.__NVIC_DisableIRQ), (56 bytes).
|
||||||
|
Removing uart.o(i.__NVIC_EnableIRQ), (32 bytes).
|
||||||
|
Removing system_nuc100series.o(.rev16_text), (4 bytes).
|
||||||
|
Removing system_nuc100series.o(.revsh_text), (4 bytes).
|
||||||
|
|
||||||
|
79 unused section(s) (total 3768 bytes) removed from the image.
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Image Symbol Table
|
||||||
|
|
||||||
|
Local Symbols
|
||||||
|
|
||||||
|
Symbol Name Value Ov Type Size Object(Section)
|
||||||
|
|
||||||
|
RESET 0x00000000 Section 192 startup_nuc100series.o(RESET)
|
||||||
|
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE
|
||||||
|
../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE
|
||||||
|
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE
|
||||||
|
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE
|
||||||
|
../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE
|
||||||
|
../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE
|
||||||
|
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE
|
||||||
|
../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE
|
||||||
|
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE
|
||||||
|
../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE
|
||||||
|
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE
|
||||||
|
../clib/angel/rt.s 0x00000000 Number 0 aeabi_idiv0_sigfpe.o ABSOLUTE
|
||||||
|
../clib/angel/rt.s 0x00000000 Number 0 aeabi_idiv0.o ABSOLUTE
|
||||||
|
../clib/angel/rt.s 0x00000000 Number 0 rt_div0.o ABSOLUTE
|
||||||
|
../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE
|
||||||
|
../clib/angel/scatterp.s 0x00000000 Number 0 __scatter.o ABSOLUTE
|
||||||
|
../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE
|
||||||
|
../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE
|
||||||
|
../clib/angel/sys.s 0x00000000 Number 0 tempstk.o ABSOLUTE
|
||||||
|
../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE
|
||||||
|
../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE
|
||||||
|
../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE
|
||||||
|
../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE
|
||||||
|
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|
||||||
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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|
||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\NUC100\Driver\sys.c 0x00000000 Number 0 sys.o ABSOLUTE
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
dc.s 0x00000000 Number 0 dc.o ABSOLUTE
|
||||||
|
main.c 0x00000000 Number 0 main.o ABSOLUTE
|
||||||
|
main.c 0x00000000 Number 0 main.o ABSOLUTE
|
||||||
|
!!!main 0x000000c0 Section 8 __main.o(!!!main)
|
||||||
|
!!!scatter 0x000000c8 Section 60 __scatter.o(!!!scatter)
|
||||||
|
!!handler_copy 0x00000104 Section 26 __scatter_copy.o(!!handler_copy)
|
||||||
|
!!handler_zi 0x00000120 Section 28 __scatter_zi.o(!!handler_zi)
|
||||||
|
.ARM.Collect$$_printf_percent$$00000000 0x0000013c Section 2 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000)
|
||||||
|
.ARM.Collect$$_printf_percent$$0000000C 0x0000013e Section 10 _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C)
|
||||||
|
.ARM.Collect$$_printf_percent$$00000013 0x00000148 Section 10 _printf_c.o(.ARM.Collect$$_printf_percent$$00000013)
|
||||||
|
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|
||||||
|
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|
||||||
|
.ARM.Collect$$libinit$$00000002 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000002)
|
||||||
|
.ARM.Collect$$libinit$$00000004 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004)
|
||||||
|
.ARM.Collect$$libinit$$0000000A 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000A)
|
||||||
|
.ARM.Collect$$libinit$$0000000C 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C)
|
||||||
|
.ARM.Collect$$libinit$$0000000E 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
.ARM.Collect$$libinit$$00000019 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019)
|
||||||
|
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|
||||||
|
.ARM.Collect$$libinit$$0000001D 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D)
|
||||||
|
.ARM.Collect$$libinit$$0000001F 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F)
|
||||||
|
.ARM.Collect$$libinit$$00000021 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021)
|
||||||
|
.ARM.Collect$$libinit$$00000023 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023)
|
||||||
|
.ARM.Collect$$libinit$$00000025 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000025)
|
||||||
|
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|
||||||
|
.ARM.Collect$$libinit$$0000002E 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002E)
|
||||||
|
.ARM.Collect$$libinit$$00000030 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000030)
|
||||||
|
.ARM.Collect$$libinit$$00000032 0x00000158 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000032)
|
||||||
|
.ARM.Collect$$libinit$$00000033 0x00000158 Section 2 libinit2.o(.ARM.Collect$$libinit$$00000033)
|
||||||
|
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|
||||||
|
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|
||||||
|
.ARM.Collect$$libshutdown$$00000004 0x0000015c Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)
|
||||||
|
.ARM.Collect$$libshutdown$$00000007 0x0000015c Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)
|
||||||
|
.ARM.Collect$$libshutdown$$0000000A 0x0000015c Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)
|
||||||
|
.ARM.Collect$$libshutdown$$0000000C 0x0000015c Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)
|
||||||
|
.ARM.Collect$$libshutdown$$0000000F 0x0000015c Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)
|
||||||
|
.ARM.Collect$$libshutdown$$00000010 0x0000015c Section 2 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)
|
||||||
|
.ARM.Collect$$rtentry$$00000000 0x0000015e Section 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000)
|
||||||
|
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|
||||||
|
.ARM.Collect$$rtentry$$00000004 0x0000015e Section 6 __rtentry4.o(.ARM.Collect$$rtentry$$00000004)
|
||||||
|
.ARM.Collect$$rtentry$$00000009 0x00000164 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009)
|
||||||
|
.ARM.Collect$$rtentry$$0000000A 0x00000164 Section 4 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)
|
||||||
|
.ARM.Collect$$rtentry$$0000000C 0x00000168 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)
|
||||||
|
.ARM.Collect$$rtentry$$0000000D 0x00000168 Section 8 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)
|
||||||
|
.ARM.Collect$$rtexit$$00000000 0x00000170 Section 2 rtexit.o(.ARM.Collect$$rtexit$$00000000)
|
||||||
|
.ARM.Collect$$rtexit$$00000002 0x00000172 Section 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002)
|
||||||
|
.ARM.Collect$$rtexit$$00000003 0x00000172 Section 4 rtexit2.o(.ARM.Collect$$rtexit$$00000003)
|
||||||
|
.ARM.Collect$$rtexit$$00000004 0x00000176 Section 6 rtexit2.o(.ARM.Collect$$rtexit$$00000004)
|
||||||
|
.emb_text 0x0000017c Section 28 retarget.o(.emb_text)
|
||||||
|
.text 0x00000198 Section 100 startup_nuc100series.o(.text)
|
||||||
|
Default_Handler 0x000001c3 Thumb Code 2 startup_nuc100series.o(.text)
|
||||||
|
.text 0x000001fc Section 0 noretval__2printf.o(.text)
|
||||||
|
.text 0x00000218 Section 0 _printf_str.o(.text)
|
||||||
|
.text 0x0000026c Section 0 _printf_hex_int.o(.text)
|
||||||
|
.text 0x000002c4 Section 0 __printf_wp.o(.text)
|
||||||
|
.text 0x000003d2 Section 346 aeabi_sdiv.o(.text)
|
||||||
|
.text 0x0000052c Section 0 heapauxi.o(.text)
|
||||||
|
.text 0x00000532 Section 0 _printf_intcommon.o(.text)
|
||||||
|
.text 0x000005e2 Section 0 _printf_char.o(.text)
|
||||||
|
.text 0x00000610 Section 0 _printf_char_file.o(.text)
|
||||||
|
.text 0x00000638 Section 0 _printf_char_common.o(.text)
|
||||||
|
_printf_input_char 0x00000639 Thumb Code 10 _printf_char_common.o(.text)
|
||||||
|
.text 0x00000668 Section 62 sys_stackheap_outer.o(.text)
|
||||||
|
.text 0x000006a6 Section 0 exit.o(.text)
|
||||||
|
.text 0x000006b8 Section 8 libspace.o(.text)
|
||||||
|
.text 0x000006c0 Section 0 sys_exit.o(.text)
|
||||||
|
.text 0x000006cc Section 2 use_no_semi.o(.text)
|
||||||
|
.text 0x000006ce Section 0 indicate_semi.o(.text)
|
||||||
|
i.CLK_EnableModuleClock 0x000006d0 Section 0 clk.o(i.CLK_EnableModuleClock)
|
||||||
|
i.CLK_EnableXtalRC 0x0000070c Section 0 clk.o(i.CLK_EnableXtalRC)
|
||||||
|
i.CLK_GetPLLClockFreq 0x0000071c Section 0 uart.o(i.CLK_GetPLLClockFreq)
|
||||||
|
CLK_GetPLLClockFreq 0x0000071d Thumb Code 112 uart.o(i.CLK_GetPLLClockFreq)
|
||||||
|
i.CLK_GetPLLClockFreq 0x0000079c Section 0 system_nuc100series.o(i.CLK_GetPLLClockFreq)
|
||||||
|
CLK_GetPLLClockFreq 0x0000079d Thumb Code 112 system_nuc100series.o(i.CLK_GetPLLClockFreq)
|
||||||
|
i.CLK_SetHCLK 0x0000081c Section 0 clk.o(i.CLK_SetHCLK)
|
||||||
|
i.CLK_WaitClockReady 0x00000888 Section 0 clk.o(i.CLK_WaitClockReady)
|
||||||
|
i.Hard_Fault_Handler 0x000008b0 Section 0 retarget.o(i.Hard_Fault_Handler)
|
||||||
|
__tagsym$$used 0x000008b1 Number 0 retarget.o(i.Hard_Fault_Handler)
|
||||||
|
i.SYS_Init 0x000008dc Section 0 main.o(i.SYS_Init)
|
||||||
|
i.SYS_ResetModule 0x0000091c Section 0 sys.o(i.SYS_ResetModule)
|
||||||
|
i.SendChar 0x0000094c Section 0 retarget.o(i.SendChar)
|
||||||
|
i.SendChar_ToUART 0x00000958 Section 0 retarget.o(i.SendChar_ToUART)
|
||||||
|
i.SystemCoreClockUpdate 0x0000098c Section 0 system_nuc100series.o(i.SystemCoreClockUpdate)
|
||||||
|
i.SystemInit 0x000009f0 Section 0 system_nuc100series.o(i.SystemInit)
|
||||||
|
i.UART02_IRQHandler 0x000009f2 Section 0 main.o(i.UART02_IRQHandler)
|
||||||
|
i.UART1_Init 0x000009fc Section 0 main.o(i.UART1_Init)
|
||||||
|
i.UART_Open 0x00000a18 Section 0 uart.o(i.UART_Open)
|
||||||
|
i.UART_TEST_HANDLE 0x00000ad0 Section 0 main.o(i.UART_TEST_HANDLE)
|
||||||
|
i.UART_Write 0x00000bd4 Section 0 uart.o(i.UART_Write)
|
||||||
|
i._is_digit 0x00000c0a Section 0 __printf_wp.o(i._is_digit)
|
||||||
|
i.delay_ms 0x00000c18 Section 0 main.o(i.delay_ms)
|
||||||
|
i.ferror 0x00000c34 Section 0 retarget.o(i.ferror)
|
||||||
|
i.fputc 0x00000c3c Section 0 retarget.o(i.fputc)
|
||||||
|
i.main 0x00000c4c Section 0 main.o(i.main)
|
||||||
|
i.stackDump 0x00000c9c Section 0 retarget.o(i.stackDump)
|
||||||
|
stackDump 0x00000c9d Thumb Code 70 retarget.o(i.stackDump)
|
||||||
|
.constdata 0x00000d44 Section 56 clk.o(.constdata)
|
||||||
|
.constdata 0x00000d7c Section 48 uart.o(.constdata)
|
||||||
|
.constdata 0x00000dac Section 40 _printf_hex_int.o(.constdata)
|
||||||
|
uc_hextab 0x00000dac Data 20 _printf_hex_int.o(.constdata)
|
||||||
|
lc_hextab 0x00000dc0 Data 20 _printf_hex_int.o(.constdata)
|
||||||
|
.data 0x20000000 Section 16 main.o(.data)
|
||||||
|
.data 0x20000010 Section 8 retarget.o(.data)
|
||||||
|
.data 0x20000018 Section 44 system_nuc100series.o(.data)
|
||||||
|
.bss 0x20000044 Section 1024 main.o(.bss)
|
||||||
|
.bss 0x20000444 Section 96 libspace.o(.bss)
|
||||||
|
HEAP 0x200004a8 Section 0 startup_nuc100series.o(HEAP)
|
||||||
|
STACK 0x200004a8 Section 1024 startup_nuc100series.o(STACK)
|
||||||
|
Heap_Mem 0x200004a8 Data 0 startup_nuc100series.o(HEAP)
|
||||||
|
Stack_Mem 0x200004a8 Data 1024 startup_nuc100series.o(STACK)
|
||||||
|
__initial_sp 0x200008a8 Data 0 startup_nuc100series.o(STACK)
|
||||||
|
|
||||||
|
Global Symbols
|
||||||
|
|
||||||
|
Symbol Name Value Ov Type Size Object(Section)
|
||||||
|
|
||||||
|
BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$ROPI$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE
|
||||||
|
__ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE
|
||||||
|
__Vectors 0x00000000 Data 4 startup_nuc100series.o(RESET)
|
||||||
|
_printf_flags 0x00000000 Number 0 printf_stubs.o ABSOLUTE
|
||||||
|
_printf_return_value 0x00000000 Number 0 printf_stubs.o ABSOLUTE
|
||||||
|
_printf_sizespec 0x00000000 Number 0 printf_stubs.o ABSOLUTE
|
||||||
|
_printf_widthprec 0x00000000 Number 0 printf_stubs.o ABSOLUTE
|
||||||
|
__ARM_exceptions_init - Undefined Weak Reference
|
||||||
|
__alloca_initialize - Undefined Weak Reference
|
||||||
|
__arm_preinit_ - Undefined Weak Reference
|
||||||
|
__cpp_initialize__aeabi_ - Undefined Weak Reference
|
||||||
|
__cxa_finalize - Undefined Weak Reference
|
||||||
|
__rt_locale - Undefined Weak Reference
|
||||||
|
__sigvec_lookup - Undefined Weak Reference
|
||||||
|
_atexit_init - Undefined Weak Reference
|
||||||
|
_call_atexit_fns - Undefined Weak Reference
|
||||||
|
_clock_init - Undefined Weak Reference
|
||||||
|
_fp_trap_init - Undefined Weak Reference
|
||||||
|
_fp_trap_shutdown - Undefined Weak Reference
|
||||||
|
_get_lc_collate - Undefined Weak Reference
|
||||||
|
_get_lc_ctype - Undefined Weak Reference
|
||||||
|
_get_lc_monetary - Undefined Weak Reference
|
||||||
|
_get_lc_numeric - Undefined Weak Reference
|
||||||
|
_get_lc_time - Undefined Weak Reference
|
||||||
|
_getenv_init - Undefined Weak Reference
|
||||||
|
_handle_redirection - Undefined Weak Reference
|
||||||
|
_init_alloc - Undefined Weak Reference
|
||||||
|
_init_user_alloc - Undefined Weak Reference
|
||||||
|
_initio - Undefined Weak Reference
|
||||||
|
_printf_mbtowc - Undefined Weak Reference
|
||||||
|
_printf_post_padding - Undefined Weak Reference
|
||||||
|
_printf_pre_padding - Undefined Weak Reference
|
||||||
|
_printf_truncate_unsigned - Undefined Weak Reference
|
||||||
|
_rand_init - Undefined Weak Reference
|
||||||
|
_signal_finish - Undefined Weak Reference
|
||||||
|
_signal_init - Undefined Weak Reference
|
||||||
|
_terminate_alloc - Undefined Weak Reference
|
||||||
|
_terminate_user_alloc - Undefined Weak Reference
|
||||||
|
_terminateio - Undefined Weak Reference
|
||||||
|
__main 0x000000c1 Thumb Code 8 __main.o(!!!main)
|
||||||
|
__scatterload 0x000000c9 Thumb Code 0 __scatter.o(!!!scatter)
|
||||||
|
__scatterload_rt2 0x000000c9 Thumb Code 52 __scatter.o(!!!scatter)
|
||||||
|
__scatterload_rt2_thumb_only 0x000000c9 Thumb Code 0 __scatter.o(!!!scatter)
|
||||||
|
__scatterload_null 0x000000d9 Thumb Code 0 __scatter.o(!!!scatter)
|
||||||
|
__scatterload_copy 0x00000105 Thumb Code 26 __scatter_copy.o(!!handler_copy)
|
||||||
|
__scatterload_zeroinit 0x00000121 Thumb Code 28 __scatter_zi.o(!!handler_zi)
|
||||||
|
_printf_percent 0x0000013d Thumb Code 0 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000)
|
||||||
|
_printf_x 0x0000013f Thumb Code 0 _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C)
|
||||||
|
_printf_c 0x00000149 Thumb Code 0 _printf_c.o(.ARM.Collect$$_printf_percent$$00000013)
|
||||||
|
_printf_percent_end 0x00000153 Thumb Code 0 _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017)
|
||||||
|
__rt_lib_init 0x00000157 Thumb Code 0 libinit.o(.ARM.Collect$$libinit$$00000000)
|
||||||
|
__rt_lib_init_alloca_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E)
|
||||||
|
__rt_lib_init_argv_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002C)
|
||||||
|
__rt_lib_init_atexit_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001B)
|
||||||
|
__rt_lib_init_clock_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000021)
|
||||||
|
__rt_lib_init_cpp_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032)
|
||||||
|
__rt_lib_init_exceptions_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030)
|
||||||
|
__rt_lib_init_fp_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000002)
|
||||||
|
__rt_lib_init_fp_trap_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001F)
|
||||||
|
__rt_lib_init_getenv_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000023)
|
||||||
|
__rt_lib_init_heap_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000A)
|
||||||
|
__rt_lib_init_lc_collate_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000011)
|
||||||
|
__rt_lib_init_lc_ctype_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000013)
|
||||||
|
__rt_lib_init_lc_monetary_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000015)
|
||||||
|
__rt_lib_init_lc_numeric_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000017)
|
||||||
|
__rt_lib_init_lc_time_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000019)
|
||||||
|
__rt_lib_init_preinit_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000004)
|
||||||
|
__rt_lib_init_rand_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000E)
|
||||||
|
__rt_lib_init_return 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000033)
|
||||||
|
__rt_lib_init_signal_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D)
|
||||||
|
__rt_lib_init_stdio_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025)
|
||||||
|
__rt_lib_init_user_alloc_1 0x00000159 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C)
|
||||||
|
__rt_lib_shutdown 0x0000015b Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000)
|
||||||
|
__rt_lib_shutdown_cpp_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002)
|
||||||
|
__rt_lib_shutdown_fp_trap_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)
|
||||||
|
__rt_lib_shutdown_heap_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)
|
||||||
|
__rt_lib_shutdown_return 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)
|
||||||
|
__rt_lib_shutdown_signal_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)
|
||||||
|
__rt_lib_shutdown_stdio_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)
|
||||||
|
__rt_lib_shutdown_user_alloc_1 0x0000015d Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)
|
||||||
|
__rt_entry 0x0000015f Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000)
|
||||||
|
__rt_entry_presh_1 0x0000015f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002)
|
||||||
|
__rt_entry_sh 0x0000015f Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004)
|
||||||
|
__rt_entry_li 0x00000165 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)
|
||||||
|
__rt_entry_postsh_1 0x00000165 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009)
|
||||||
|
__rt_entry_main 0x00000169 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)
|
||||||
|
__rt_entry_postli_1 0x00000169 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)
|
||||||
|
__rt_exit 0x00000171 Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000)
|
||||||
|
__rt_exit_ls 0x00000173 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003)
|
||||||
|
__rt_exit_prels_1 0x00000173 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002)
|
||||||
|
__rt_exit_exit 0x00000177 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004)
|
||||||
|
HardFault_Handler 0x0000017d Thumb Code 24 retarget.o(.emb_text)
|
||||||
|
Reset_Handler 0x00000199 Thumb Code 32 startup_nuc100series.o(.text)
|
||||||
|
NMI_Handler 0x000001b9 Thumb Code 2 startup_nuc100series.o(.text)
|
||||||
|
SVC_Handler 0x000001bd Thumb Code 2 startup_nuc100series.o(.text)
|
||||||
|
PendSV_Handler 0x000001bf Thumb Code 2 startup_nuc100series.o(.text)
|
||||||
|
SysTick_Handler 0x000001c1 Thumb Code 2 startup_nuc100series.o(.text)
|
||||||
|
ACMP_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
ADC_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
BOD_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
CAN0_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
CAN1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
EINT0_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
EINT1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
GPAB_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
GPCDEF_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
I2C0_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
I2C1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
I2S_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
PDMA_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
PS2_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
PWMA_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
PWMB_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
PWRWU_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
RTC_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
SC012_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
SPI0_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
SPI1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
SPI2_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
SPI3_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
TMR0_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
TMR1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
TMR2_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
TMR3_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
UART1_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
USBD_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
WDT_IRQHandler 0x000001c3 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
__user_initial_stackheap 0x000001c5 Thumb Code 0 startup_nuc100series.o(.text)
|
||||||
|
__2printf 0x000001fd Thumb Code 22 noretval__2printf.o(.text)
|
||||||
|
_printf_str 0x00000219 Thumb Code 82 _printf_str.o(.text)
|
||||||
|
_printf_int_hex 0x0000026d Thumb Code 84 _printf_hex_int.o(.text)
|
||||||
|
_printf_longlong_hex 0x0000026d Thumb Code 0 _printf_hex_int.o(.text)
|
||||||
|
__printf 0x000002c5 Thumb Code 270 __printf_wp.o(.text)
|
||||||
|
__aeabi_uidiv 0x000003d3 Thumb Code 0 aeabi_sdiv.o(.text)
|
||||||
|
__aeabi_uidivmod 0x000003d3 Thumb Code 20 aeabi_sdiv.o(.text)
|
||||||
|
__aeabi_idiv 0x000003e7 Thumb Code 0 aeabi_sdiv.o(.text)
|
||||||
|
__aeabi_idivmod 0x000003e7 Thumb Code 326 aeabi_sdiv.o(.text)
|
||||||
|
__use_two_region_memory 0x0000052d Thumb Code 2 heapauxi.o(.text)
|
||||||
|
__rt_heap_escrow$2region 0x0000052f Thumb Code 2 heapauxi.o(.text)
|
||||||
|
__rt_heap_expand$2region 0x00000531 Thumb Code 2 heapauxi.o(.text)
|
||||||
|
_printf_int_common 0x00000533 Thumb Code 176 _printf_intcommon.o(.text)
|
||||||
|
_printf_cs_common 0x000005e3 Thumb Code 22 _printf_char.o(.text)
|
||||||
|
_printf_char 0x000005f9 Thumb Code 16 _printf_char.o(.text)
|
||||||
|
_printf_string 0x00000609 Thumb Code 8 _printf_char.o(.text)
|
||||||
|
_printf_char_file 0x00000611 Thumb Code 34 _printf_char_file.o(.text)
|
||||||
|
_printf_char_common 0x00000643 Thumb Code 32 _printf_char_common.o(.text)
|
||||||
|
__user_setup_stackheap 0x00000669 Thumb Code 62 sys_stackheap_outer.o(.text)
|
||||||
|
exit 0x000006a7 Thumb Code 16 exit.o(.text)
|
||||||
|
__user_libspace 0x000006b9 Thumb Code 8 libspace.o(.text)
|
||||||
|
__user_perproc_libspace 0x000006b9 Thumb Code 0 libspace.o(.text)
|
||||||
|
__user_perthread_libspace 0x000006b9 Thumb Code 0 libspace.o(.text)
|
||||||
|
_sys_exit 0x000006c1 Thumb Code 8 sys_exit.o(.text)
|
||||||
|
__I$use$semihosting 0x000006cd Thumb Code 0 use_no_semi.o(.text)
|
||||||
|
__use_no_semihosting_swi 0x000006cd Thumb Code 2 use_no_semi.o(.text)
|
||||||
|
__semihosting_library_function 0x000006cf Thumb Code 0 indicate_semi.o(.text)
|
||||||
|
CLK_EnableModuleClock 0x000006d1 Thumb Code 52 clk.o(i.CLK_EnableModuleClock)
|
||||||
|
CLK_EnableXtalRC 0x0000070d Thumb Code 12 clk.o(i.CLK_EnableXtalRC)
|
||||||
|
CLK_SetHCLK 0x0000081d Thumb Code 102 clk.o(i.CLK_SetHCLK)
|
||||||
|
CLK_WaitClockReady 0x00000889 Thumb Code 32 clk.o(i.CLK_WaitClockReady)
|
||||||
|
Hard_Fault_Handler 0x000008b1 Thumb Code 18 retarget.o(i.Hard_Fault_Handler)
|
||||||
|
SYS_Init 0x000008dd Thumb Code 60 main.o(i.SYS_Init)
|
||||||
|
SYS_ResetModule 0x0000091d Thumb Code 48 sys.o(i.SYS_ResetModule)
|
||||||
|
SendChar 0x0000094d Thumb Code 12 retarget.o(i.SendChar)
|
||||||
|
SendChar_ToUART 0x00000959 Thumb Code 48 retarget.o(i.SendChar_ToUART)
|
||||||
|
SystemCoreClockUpdate 0x0000098d Thumb Code 76 system_nuc100series.o(i.SystemCoreClockUpdate)
|
||||||
|
SystemInit 0x000009f1 Thumb Code 2 system_nuc100series.o(i.SystemInit)
|
||||||
|
UART02_IRQHandler 0x000009f3 Thumb Code 8 main.o(i.UART02_IRQHandler)
|
||||||
|
UART1_Init 0x000009fd Thumb Code 20 main.o(i.UART1_Init)
|
||||||
|
UART_Open 0x00000a19 Thumb Code 166 uart.o(i.UART_Open)
|
||||||
|
UART_TEST_HANDLE 0x00000ad1 Thumb Code 194 main.o(i.UART_TEST_HANDLE)
|
||||||
|
UART_Write 0x00000bd5 Thumb Code 54 uart.o(i.UART_Write)
|
||||||
|
_is_digit 0x00000c0b Thumb Code 14 __printf_wp.o(i._is_digit)
|
||||||
|
delay_ms 0x00000c19 Thumb Code 28 main.o(i.delay_ms)
|
||||||
|
ferror 0x00000c35 Thumb Code 8 retarget.o(i.ferror)
|
||||||
|
fputc 0x00000c3d Thumb Code 16 retarget.o(i.fputc)
|
||||||
|
main 0x00000c4d Thumb Code 64 main.o(i.main)
|
||||||
|
Region$$Table$$Base 0x00000dd4 Number 0 anon$$obj.o(Region$$Table)
|
||||||
|
Region$$Table$$Limit 0x00000df4 Number 0 anon$$obj.o(Region$$Table)
|
||||||
|
g_u32comRbytes 0x20000000 Data 4 main.o(.data)
|
||||||
|
g_u32comRhead 0x20000004 Data 4 main.o(.data)
|
||||||
|
g_u32comRtail 0x20000008 Data 4 main.o(.data)
|
||||||
|
g_bWait 0x2000000c Data 4 main.o(.data)
|
||||||
|
__stdout 0x20000010 Data 4 retarget.o(.data)
|
||||||
|
__stdin 0x20000014 Data 4 retarget.o(.data)
|
||||||
|
SystemCoreClock 0x20000018 Data 4 system_nuc100series.o(.data)
|
||||||
|
CyclesPerUs 0x2000001c Data 4 system_nuc100series.o(.data)
|
||||||
|
PllClock 0x20000020 Data 4 system_nuc100series.o(.data)
|
||||||
|
gau32ClkSrcTbl 0x20000024 Data 32 system_nuc100series.o(.data)
|
||||||
|
g_u8RecData 0x20000044 Data 1024 main.o(.bss)
|
||||||
|
__libspace_start 0x20000444 Data 96 libspace.o(.bss)
|
||||||
|
__temporary_stack_top$libspace 0x200004a4 Data 0 libspace.o(.bss)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Memory Map of the image
|
||||||
|
|
||||||
|
Image Entry point : 0x00000199
|
||||||
|
|
||||||
|
Load Region LR_1 (Base: 0x00000000, Size: 0x00000e38, Max: 0xffffffff, ABSOLUTE)
|
||||||
|
|
||||||
|
Execution Region ER_RO (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x00000df4, Max: 0xffffffff, ABSOLUTE)
|
||||||
|
|
||||||
|
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||||
|
|
||||||
|
0x00000000 0x00000000 0x000000c0 Data RO 733 RESET startup_nuc100series.o
|
||||||
|
0x000000c0 0x000000c0 0x00000008 Code RO 839 * !!!main c_p.l(__main.o)
|
||||||
|
0x000000c8 0x000000c8 0x0000003c Code RO 1017 !!!scatter c_p.l(__scatter.o)
|
||||||
|
0x00000104 0x00000104 0x0000001a Code RO 1019 !!handler_copy c_p.l(__scatter_copy.o)
|
||||||
|
0x0000011e 0x0000011e 0x00000002 PAD
|
||||||
|
0x00000120 0x00000120 0x0000001c Code RO 1021 !!handler_zi c_p.l(__scatter_zi.o)
|
||||||
|
0x0000013c 0x0000013c 0x00000002 Code RO 828 .ARM.Collect$$_printf_percent$$00000000 c_p.l(_printf_percent.o)
|
||||||
|
0x0000013e 0x0000013e 0x0000000a Code RO 827 .ARM.Collect$$_printf_percent$$0000000C c_p.l(_printf_x.o)
|
||||||
|
0x00000148 0x00000148 0x0000000a Code RO 826 .ARM.Collect$$_printf_percent$$00000013 c_p.l(_printf_c.o)
|
||||||
|
0x00000152 0x00000152 0x00000004 Code RO 852 .ARM.Collect$$_printf_percent$$00000017 c_p.l(_printf_percent_end.o)
|
||||||
|
0x00000156 0x00000156 0x00000002 Code RO 888 .ARM.Collect$$libinit$$00000000 c_p.l(libinit.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 902 .ARM.Collect$$libinit$$00000002 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 904 .ARM.Collect$$libinit$$00000004 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 907 .ARM.Collect$$libinit$$0000000A c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 909 .ARM.Collect$$libinit$$0000000C c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 911 .ARM.Collect$$libinit$$0000000E c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 914 .ARM.Collect$$libinit$$00000011 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 916 .ARM.Collect$$libinit$$00000013 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 918 .ARM.Collect$$libinit$$00000015 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 920 .ARM.Collect$$libinit$$00000017 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 922 .ARM.Collect$$libinit$$00000019 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 924 .ARM.Collect$$libinit$$0000001B c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 926 .ARM.Collect$$libinit$$0000001D c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 928 .ARM.Collect$$libinit$$0000001F c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 930 .ARM.Collect$$libinit$$00000021 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 932 .ARM.Collect$$libinit$$00000023 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 934 .ARM.Collect$$libinit$$00000025 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 938 .ARM.Collect$$libinit$$0000002C c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 940 .ARM.Collect$$libinit$$0000002E c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 942 .ARM.Collect$$libinit$$00000030 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000000 Code RO 944 .ARM.Collect$$libinit$$00000032 c_p.l(libinit2.o)
|
||||||
|
0x00000158 0x00000158 0x00000002 Code RO 945 .ARM.Collect$$libinit$$00000033 c_p.l(libinit2.o)
|
||||||
|
0x0000015a 0x0000015a 0x00000002 Code RO 974 .ARM.Collect$$libshutdown$$00000000 c_p.l(libshutdown.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1000 .ARM.Collect$$libshutdown$$00000002 c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1002 .ARM.Collect$$libshutdown$$00000004 c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1005 .ARM.Collect$$libshutdown$$00000007 c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1008 .ARM.Collect$$libshutdown$$0000000A c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1010 .ARM.Collect$$libshutdown$$0000000C c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000000 Code RO 1013 .ARM.Collect$$libshutdown$$0000000F c_p.l(libshutdown2.o)
|
||||||
|
0x0000015c 0x0000015c 0x00000002 Code RO 1014 .ARM.Collect$$libshutdown$$00000010 c_p.l(libshutdown2.o)
|
||||||
|
0x0000015e 0x0000015e 0x00000000 Code RO 841 .ARM.Collect$$rtentry$$00000000 c_p.l(__rtentry.o)
|
||||||
|
0x0000015e 0x0000015e 0x00000000 Code RO 854 .ARM.Collect$$rtentry$$00000002 c_p.l(__rtentry2.o)
|
||||||
|
0x0000015e 0x0000015e 0x00000006 Code RO 866 .ARM.Collect$$rtentry$$00000004 c_p.l(__rtentry4.o)
|
||||||
|
0x00000164 0x00000164 0x00000000 Code RO 856 .ARM.Collect$$rtentry$$00000009 c_p.l(__rtentry2.o)
|
||||||
|
0x00000164 0x00000164 0x00000004 Code RO 857 .ARM.Collect$$rtentry$$0000000A c_p.l(__rtentry2.o)
|
||||||
|
0x00000168 0x00000168 0x00000000 Code RO 859 .ARM.Collect$$rtentry$$0000000C c_p.l(__rtentry2.o)
|
||||||
|
0x00000168 0x00000168 0x00000008 Code RO 860 .ARM.Collect$$rtentry$$0000000D c_p.l(__rtentry2.o)
|
||||||
|
0x00000170 0x00000170 0x00000002 Code RO 893 .ARM.Collect$$rtexit$$00000000 c_p.l(rtexit.o)
|
||||||
|
0x00000172 0x00000172 0x00000000 Code RO 949 .ARM.Collect$$rtexit$$00000002 c_p.l(rtexit2.o)
|
||||||
|
0x00000172 0x00000172 0x00000004 Code RO 950 .ARM.Collect$$rtexit$$00000003 c_p.l(rtexit2.o)
|
||||||
|
0x00000176 0x00000176 0x00000006 Code RO 951 .ARM.Collect$$rtexit$$00000004 c_p.l(rtexit2.o)
|
||||||
|
0x0000017c 0x0000017c 0x0000001c Code RO 382 .emb_text retarget.o
|
||||||
|
0x00000198 0x00000198 0x00000064 Code RO 734 * .text startup_nuc100series.o
|
||||||
|
0x000001fc 0x000001fc 0x0000001c Code RO 779 .text c_p.l(noretval__2printf.o)
|
||||||
|
0x00000218 0x00000218 0x00000052 Code RO 783 .text c_p.l(_printf_str.o)
|
||||||
|
0x0000026a 0x0000026a 0x00000002 PAD
|
||||||
|
0x0000026c 0x0000026c 0x00000058 Code RO 788 .text c_p.l(_printf_hex_int.o)
|
||||||
|
0x000002c4 0x000002c4 0x0000010e Code RO 814 .text c_p.l(__printf_wp.o)
|
||||||
|
0x000003d2 0x000003d2 0x0000015a Code RO 833 .text c_p.l(aeabi_sdiv.o)
|
||||||
|
0x0000052c 0x0000052c 0x00000006 Code RO 837 .text c_p.l(heapauxi.o)
|
||||||
|
0x00000532 0x00000532 0x000000b0 Code RO 846 .text c_p.l(_printf_intcommon.o)
|
||||||
|
0x000005e2 0x000005e2 0x0000002e Code RO 848 .text c_p.l(_printf_char.o)
|
||||||
|
0x00000610 0x00000610 0x00000028 Code RO 850 .text c_p.l(_printf_char_file.o)
|
||||||
|
0x00000638 0x00000638 0x00000030 Code RO 870 .text c_p.l(_printf_char_common.o)
|
||||||
|
0x00000668 0x00000668 0x0000003e Code RO 872 .text c_p.l(sys_stackheap_outer.o)
|
||||||
|
0x000006a6 0x000006a6 0x00000010 Code RO 877 .text c_p.l(exit.o)
|
||||||
|
0x000006b6 0x000006b6 0x00000002 PAD
|
||||||
|
0x000006b8 0x000006b8 0x00000008 Code RO 889 .text c_p.l(libspace.o)
|
||||||
|
0x000006c0 0x000006c0 0x0000000c Code RO 946 .text c_p.l(sys_exit.o)
|
||||||
|
0x000006cc 0x000006cc 0x00000002 Code RO 963 .text c_p.l(use_no_semi.o)
|
||||||
|
0x000006ce 0x000006ce 0x00000000 Code RO 965 .text c_p.l(indicate_semi.o)
|
||||||
|
0x000006ce 0x000006ce 0x00000002 PAD
|
||||||
|
0x000006d0 0x000006d0 0x0000003c Code RO 233 i.CLK_EnableModuleClock clk.o
|
||||||
|
0x0000070c 0x0000070c 0x00000010 Code RO 236 i.CLK_EnableXtalRC clk.o
|
||||||
|
0x0000071c 0x0000071c 0x00000080 Code RO 609 i.CLK_GetPLLClockFreq uart.o
|
||||||
|
0x0000079c 0x0000079c 0x00000080 Code RO 740 i.CLK_GetPLLClockFreq system_nuc100series.o
|
||||||
|
0x0000081c 0x0000081c 0x0000006c Code RO 246 i.CLK_SetHCLK clk.o
|
||||||
|
0x00000888 0x00000888 0x00000028 Code RO 249 i.CLK_WaitClockReady clk.o
|
||||||
|
0x000008b0 0x000008b0 0x0000002c Code RO 384 i.Hard_Fault_Handler retarget.o
|
||||||
|
0x000008dc 0x000008dc 0x00000040 Code RO 3 i.SYS_Init main.o
|
||||||
|
0x0000091c 0x0000091c 0x00000030 Code RO 481 i.SYS_ResetModule sys.o
|
||||||
|
0x0000094c 0x0000094c 0x0000000c Code RO 386 i.SendChar retarget.o
|
||||||
|
0x00000958 0x00000958 0x00000034 Code RO 387 i.SendChar_ToUART retarget.o
|
||||||
|
0x0000098c 0x0000098c 0x00000064 Code RO 741 i.SystemCoreClockUpdate system_nuc100series.o
|
||||||
|
0x000009f0 0x000009f0 0x00000002 Code RO 742 i.SystemInit system_nuc100series.o
|
||||||
|
0x000009f2 0x000009f2 0x00000008 Code RO 4 i.UART02_IRQHandler main.o
|
||||||
|
0x000009fa 0x000009fa 0x00000002 PAD
|
||||||
|
0x000009fc 0x000009fc 0x0000001c Code RO 5 i.UART1_Init main.o
|
||||||
|
0x00000a18 0x00000a18 0x000000b8 Code RO 616 i.UART_Open uart.o
|
||||||
|
0x00000ad0 0x00000ad0 0x00000104 Code RO 7 i.UART_TEST_HANDLE main.o
|
||||||
|
0x00000bd4 0x00000bd4 0x00000036 Code RO 623 i.UART_Write uart.o
|
||||||
|
0x00000c0a 0x00000c0a 0x0000000e Code RO 816 i._is_digit c_p.l(__printf_wp.o)
|
||||||
|
0x00000c18 0x00000c18 0x0000001c Code RO 8 i.delay_ms main.o
|
||||||
|
0x00000c34 0x00000c34 0x00000008 Code RO 389 i.ferror retarget.o
|
||||||
|
0x00000c3c 0x00000c3c 0x00000010 Code RO 391 i.fputc retarget.o
|
||||||
|
0x00000c4c 0x00000c4c 0x00000050 Code RO 9 i.main main.o
|
||||||
|
0x00000c9c 0x00000c9c 0x000000a8 Code RO 393 i.stackDump retarget.o
|
||||||
|
0x00000d44 0x00000d44 0x00000038 Data RO 250 .constdata clk.o
|
||||||
|
0x00000d7c 0x00000d7c 0x00000030 Data RO 626 .constdata uart.o
|
||||||
|
0x00000dac 0x00000dac 0x00000028 Data RO 789 .constdata c_p.l(_printf_hex_int.o)
|
||||||
|
0x00000dd4 0x00000dd4 0x00000020 Data RO 1015 Region$$Table anon$$obj.o
|
||||||
|
|
||||||
|
|
||||||
|
Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x00000df4, Size: 0x00000044, Max: 0xffffffff, ABSOLUTE)
|
||||||
|
|
||||||
|
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||||
|
|
||||||
|
0x20000000 0x00000df4 0x00000010 Data RW 11 .data main.o
|
||||||
|
0x20000010 0x00000e04 0x00000008 Data RW 394 .data retarget.o
|
||||||
|
0x20000018 0x00000e0c 0x0000002c Data RW 743 .data system_nuc100series.o
|
||||||
|
|
||||||
|
|
||||||
|
Execution Region ER_ZI (Exec base: 0x20000044, Load base: 0x00000e38, Size: 0x00000864, Max: 0xffffffff, ABSOLUTE)
|
||||||
|
|
||||||
|
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||||
|
|
||||||
|
0x20000044 - 0x00000400 Zero RW 10 .bss main.o
|
||||||
|
0x20000444 - 0x00000060 Zero RW 890 .bss c_p.l(libspace.o)
|
||||||
|
0x200004a4 0x00000e38 0x00000004 PAD
|
||||||
|
0x200004a8 - 0x00000000 Zero RW 732 HEAP startup_nuc100series.o
|
||||||
|
0x200004a8 - 0x00000400 Zero RW 731 STACK startup_nuc100series.o
|
||||||
|
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Image component sizes
|
||||||
|
|
||||||
|
|
||||||
|
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
||||||
|
|
||||||
|
224 26 56 0 0 21526 clk.o
|
||||||
|
468 94 0 16 1024 134578 main.o
|
||||||
|
328 132 0 8 0 5753 retarget.o
|
||||||
|
100 46 192 0 1024 640 startup_nuc100series.o
|
||||||
|
48 0 0 0 0 502 sys.o
|
||||||
|
230 40 0 44 0 2611 system_nuc100series.o
|
||||||
|
366 34 48 0 0 2993 uart.o
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
1766 372 328 68 2048 168603 Object Totals
|
||||||
|
0 0 32 0 0 0 (incl. Generated)
|
||||||
|
2 0 0 0 0 0 (incl. Padding)
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
|
||||||
|
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
|
||||||
|
|
||||||
|
8 0 0 0 0 68 __main.o
|
||||||
|
284 0 0 0 0 136 __printf_wp.o
|
||||||
|
0 0 0 0 0 0 __rtentry.o
|
||||||
|
12 0 0 0 0 0 __rtentry2.o
|
||||||
|
6 0 0 0 0 0 __rtentry4.o
|
||||||
|
60 8 0 0 0 0 __scatter.o
|
||||||
|
26 0 0 0 0 0 __scatter_copy.o
|
||||||
|
28 0 0 0 0 0 __scatter_zi.o
|
||||||
|
10 0 0 0 0 0 _printf_c.o
|
||||||
|
46 0 0 0 0 100 _printf_char.o
|
||||||
|
48 6 0 0 0 88 _printf_char_common.o
|
||||||
|
40 6 0 0 0 72 _printf_char_file.o
|
||||||
|
88 4 40 0 0 72 _printf_hex_int.o
|
||||||
|
176 0 0 0 0 84 _printf_intcommon.o
|
||||||
|
2 0 0 0 0 0 _printf_percent.o
|
||||||
|
4 0 0 0 0 0 _printf_percent_end.o
|
||||||
|
82 0 0 0 0 72 _printf_str.o
|
||||||
|
10 0 0 0 0 0 _printf_x.o
|
||||||
|
346 0 0 0 0 92 aeabi_sdiv.o
|
||||||
|
16 0 0 0 0 68 exit.o
|
||||||
|
6 0 0 0 0 136 heapauxi.o
|
||||||
|
0 0 0 0 0 0 indicate_semi.o
|
||||||
|
2 0 0 0 0 0 libinit.o
|
||||||
|
2 0 0 0 0 0 libinit2.o
|
||||||
|
2 0 0 0 0 0 libshutdown.o
|
||||||
|
2 0 0 0 0 0 libshutdown2.o
|
||||||
|
8 4 0 0 96 68 libspace.o
|
||||||
|
28 6 0 0 0 84 noretval__2printf.o
|
||||||
|
2 0 0 0 0 0 rtexit.o
|
||||||
|
10 0 0 0 0 0 rtexit2.o
|
||||||
|
12 4 0 0 0 60 sys_exit.o
|
||||||
|
62 0 0 0 0 80 sys_stackheap_outer.o
|
||||||
|
2 0 0 0 0 68 use_no_semi.o
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
1438 38 40 0 100 1348 Library Totals
|
||||||
|
8 0 0 0 4 0 (incl. Padding)
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
|
||||||
|
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
|
||||||
|
|
||||||
|
1430 38 40 0 96 1348 c_p.l
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
1438 38 40 0 100 1348 Library Totals
|
||||||
|
|
||||||
|
----------------------------------------------------------------------
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
|
||||||
|
Code (inc. data) RO Data RW Data ZI Data Debug
|
||||||
|
|
||||||
|
3204 410 368 68 2148 168479 Grand Totals
|
||||||
|
3204 410 368 68 2148 168479 ELF Image Totals
|
||||||
|
3204 410 368 68 0 0 ROM Totals
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
Total RO Size (Code + RO Data) 3572 ( 3.49kB)
|
||||||
|
Total RW Size (RW Data + ZI Data) 2216 ( 2.16kB)
|
||||||
|
Total ROM Size (Code + RO Data + RW Data) 3640 ( 3.55kB)
|
||||||
|
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
Binary file not shown.
|
|
@ -0,0 +1,13 @@
|
||||||
|
--cpu Cortex-M0
|
||||||
|
".\objects\main.o"
|
||||||
|
".\objects\adc.o"
|
||||||
|
".\objects\clk.o"
|
||||||
|
".\objects\retarget.o"
|
||||||
|
".\objects\sys.o"
|
||||||
|
".\objects\timer.o"
|
||||||
|
".\objects\uart.o"
|
||||||
|
".\objects\startup_nuc100series.o"
|
||||||
|
".\objects\system_nuc100series.o"
|
||||||
|
--ro-base 0x00000000 --entry 0x00000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
|
||||||
|
--info sizes --info totals --info unused --info veneers
|
||||||
|
--list ".\Listings\485.map" -o .\Objects\485.axf
|
||||||
|
|
@ -0,0 +1,409 @@
|
||||||
|
;/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
;/* */
|
||||||
|
;/* Copyright(c) 2009 Nuvoton Technology Corp. All rights reserved. */
|
||||||
|
;/* */
|
||||||
|
;/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
CLK_BA_base EQU 0x50000200
|
||||||
|
PWRCON EQU 0x00
|
||||||
|
AHBCLK EQU 0x04
|
||||||
|
APBCLK EQU 0x08
|
||||||
|
CLKSEL0 EQU 0x10
|
||||||
|
CLKSEL1 EQU 0x14
|
||||||
|
CLKDIV EQU 0x18
|
||||||
|
PLLCON EQU 0x20
|
||||||
|
TEST_S EQU 0x30
|
||||||
|
|
||||||
|
CLK_BA_APBCLK EQU 0x50000208
|
||||||
|
|
||||||
|
;// Define clock enable registers
|
||||||
|
|
||||||
|
ADC_COMP_CLK EQU 0x50000208
|
||||||
|
ADC_enable EQU 0x10000000
|
||||||
|
COMP_enable EQU 0x40000000
|
||||||
|
|
||||||
|
PDMA_CLK EQU 0x50000204
|
||||||
|
PDMA_enable EQU 0x00000003
|
||||||
|
|
||||||
|
;; bit 0 CPU_EN
|
||||||
|
;; bit 1 PDMA_EN
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
;// Define COMP registers base
|
||||||
|
COMP_base EQU 0x400D0000
|
||||||
|
CMP1CR EQU 0x00
|
||||||
|
CMP2CR EQU 0x04
|
||||||
|
CMPSR EQU 0x08
|
||||||
|
|
||||||
|
;// Define ADC registers base
|
||||||
|
ADC_base EQU 0x400E0000
|
||||||
|
ADDR0 EQU 0x00
|
||||||
|
ADDR1 EQU 0x04
|
||||||
|
ADDR2 EQU 0x08
|
||||||
|
ADDR3 EQU 0x0c
|
||||||
|
ADDR4 EQU 0x10
|
||||||
|
ADDR5 EQU 0x14
|
||||||
|
ADDR6 EQU 0x18
|
||||||
|
ADDR7 EQU 0x1c
|
||||||
|
ADCR EQU 0x20
|
||||||
|
ADCHER EQU 0x24
|
||||||
|
ADCMPR0 EQU 0x28
|
||||||
|
ADCMPR1 EQU 0x2c
|
||||||
|
ADSR EQU 0x30
|
||||||
|
ADCALR EQU 0x34
|
||||||
|
ADCFCR EQU 0x38
|
||||||
|
ADCALD EQU 0x3c
|
||||||
|
|
||||||
|
;// Pattern Table
|
||||||
|
pattern_55555555 EQU 0x55555555
|
||||||
|
pattern_aaaaaaaa EQU 0xaaaaaaaa
|
||||||
|
pattern_00005555 EQU 0x00005555
|
||||||
|
pattern_0000aaaa EQU 0x0000aaaa
|
||||||
|
pattern_05550515 EQU 0x05550515
|
||||||
|
pattern_0aaa0a2a EQU 0x0aaa0a2a
|
||||||
|
|
||||||
|
;// Define PDMA regsiter base
|
||||||
|
PDMA_BA_ch0_base EQU 0x50008000
|
||||||
|
PDMA_BA_ch1_base EQU 0x50008100
|
||||||
|
PDMA_BA_ch2_base EQU 0x50008200
|
||||||
|
PDMA_BA_ch3_base EQU 0x50008300
|
||||||
|
PDMA_BA_ch4_base EQU 0x50008400
|
||||||
|
PDMA_BA_ch5_base EQU 0x50008500
|
||||||
|
PDMA_BA_ch6_base EQU 0x50008600
|
||||||
|
PDMA_BA_ch7_base EQU 0x50008700
|
||||||
|
|
||||||
|
PDMA_BA_GCR EQU 0x50008F00
|
||||||
|
PDMA_BA_GCR_base EQU 0x50008F00
|
||||||
|
|
||||||
|
PDMA_GCRCSR EQU 0X00
|
||||||
|
PDMA_PDSSR2 EQU 0X04
|
||||||
|
PDMA_PDSSR1 EQU 0X08 ;; PDMA channel select 0x77000000
|
||||||
|
PDMA_GCRISR EQU 0X0C
|
||||||
|
|
||||||
|
PDMA_GLOBAL_enable EQU 0x0000FF00
|
||||||
|
|
||||||
|
|
||||||
|
PDMA_CSR EQU 0X00
|
||||||
|
PDMA_SAR EQU 0X04
|
||||||
|
PDMA_DAR EQU 0X08
|
||||||
|
PDMA_BCR EQU 0X0C
|
||||||
|
PDMA_CSAR EQU 0X14
|
||||||
|
PDMA_CDAR EQU 0X18
|
||||||
|
PDMA_CBSR EQU 0X1C
|
||||||
|
PDMA_IER EQU 0X20
|
||||||
|
PDMA_ISR EQU 0X24
|
||||||
|
PDMA_CTCSR EQU 0X28
|
||||||
|
PDMA_SASOCR EQU 0X2C
|
||||||
|
PDMA_DASOCR EQU 0X30
|
||||||
|
PDMA_SBUF0 EQU 0X80
|
||||||
|
PDMA_SBUF1 EQU 0X84
|
||||||
|
PDMA_SBUF2 EQU 0X88
|
||||||
|
PDMA_SBUF3 EQU 0X8C
|
||||||
|
|
||||||
|
|
||||||
|
;// Define VIC control register
|
||||||
|
VIC_base EQU 0xFFFF0000
|
||||||
|
VIC_SCR15 EQU 0x003c
|
||||||
|
VIC_SVR15 EQU 0x00bc
|
||||||
|
VIC_SCR16 EQU 0x0040
|
||||||
|
VIC_SVR16 EQU 0x00c0
|
||||||
|
VIC_SCR30 EQU 0x0078
|
||||||
|
VIC_SVR30 EQU 0x00f8
|
||||||
|
VIC_MECR EQU 0x0318
|
||||||
|
VIC_MDCR EQU 0x031c
|
||||||
|
VIC_EOSCR EQU 0x0130
|
||||||
|
|
||||||
|
;//==================================
|
||||||
|
INT_BA_base EQU 0x50000300
|
||||||
|
|
||||||
|
|
||||||
|
;// Parameter table
|
||||||
|
ADC_PDMA_CFG EQU 0x00002980
|
||||||
|
ADC_PDMA_DST EQU 0xC0000000
|
||||||
|
ADC_PDMA_SRC EQU 0xE0024200
|
||||||
|
ADC_PDMA_TCBL EQU 0x00030008
|
||||||
|
|
||||||
|
;//==================================
|
||||||
|
|
||||||
|
|
||||||
|
GPIO_base EQU 0x50004000
|
||||||
|
GPIOB_PMD EQU 0x0040
|
||||||
|
GPIOB_OFFD EQU 0x0044
|
||||||
|
GPIOB_DOUT EQU 0x0048
|
||||||
|
GPIOB_DMASK EQU 0x004C
|
||||||
|
GPIOB_PIN EQU 0x0050
|
||||||
|
GPIOB_DBEN EQU 0x0054
|
||||||
|
GPIOB_IMD EQU 0x0058
|
||||||
|
GPIOB_IEN EQU 0x005C
|
||||||
|
GPIOB_ISRC EQU 0x0060
|
||||||
|
|
||||||
|
;//==================================
|
||||||
|
|
||||||
|
|
||||||
|
GCR_base EQU 0x50000000
|
||||||
|
GPB_MFP EQU 0x0034
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
IF :LNOT: :DEF: Stack_Size
|
||||||
|
Stack_Size EQU 0x00000400
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||||
|
Stack_Mem SPACE Stack_Size
|
||||||
|
__initial_sp
|
||||||
|
|
||||||
|
|
||||||
|
; <h> Heap Configuration
|
||||||
|
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
IF :LNOT: :DEF: Heap_Size
|
||||||
|
Heap_Size EQU 0x00000000
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||||
|
__heap_base
|
||||||
|
Heap_Mem SPACE Heap_Size
|
||||||
|
__heap_limit
|
||||||
|
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
; maximum of 32 External Interrupts are possible
|
||||||
|
DCD BOD_IRQHandler
|
||||||
|
DCD WDT_IRQHandler
|
||||||
|
DCD EINT0_IRQHandler
|
||||||
|
DCD EINT1_IRQHandler
|
||||||
|
DCD GPAB_IRQHandler
|
||||||
|
DCD GPCDEF_IRQHandler
|
||||||
|
DCD PWMA_IRQHandler
|
||||||
|
DCD PWMB_IRQHandler
|
||||||
|
DCD TMR0_IRQHandler
|
||||||
|
DCD TMR1_IRQHandler
|
||||||
|
DCD TMR2_IRQHandler
|
||||||
|
DCD TMR3_IRQHandler
|
||||||
|
DCD UART02_IRQHandler
|
||||||
|
DCD UART1_IRQHandler
|
||||||
|
DCD SPI0_IRQHandler
|
||||||
|
DCD SPI1_IRQHandler
|
||||||
|
DCD SPI2_IRQHandler
|
||||||
|
DCD SPI3_IRQHandler
|
||||||
|
DCD I2C0_IRQHandler
|
||||||
|
DCD I2C1_IRQHandler
|
||||||
|
DCD CAN0_IRQHandler
|
||||||
|
DCD CAN1_IRQHandler
|
||||||
|
DCD SC012_IRQHandler
|
||||||
|
DCD USBD_IRQHandler
|
||||||
|
DCD PS2_IRQHandler
|
||||||
|
DCD ACMP_IRQHandler
|
||||||
|
DCD PDMA_IRQHandler
|
||||||
|
DCD I2S_IRQHandler
|
||||||
|
DCD PWRWU_IRQHandler
|
||||||
|
DCD ADC_IRQHandler
|
||||||
|
DCD Default_Handler
|
||||||
|
DCD RTC_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
; Reset Handler
|
||||||
|
|
||||||
|
ENTRY
|
||||||
|
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT SystemInit
|
||||||
|
IMPORT __main
|
||||||
|
|
||||||
|
LDR R0, =0x50000100
|
||||||
|
; Unlock Register
|
||||||
|
LDR R1, =0x59
|
||||||
|
STR R1, [R0]
|
||||||
|
LDR R1, =0x16
|
||||||
|
STR R1, [R0]
|
||||||
|
LDR R1, =0x88
|
||||||
|
STR R1, [R0]
|
||||||
|
|
||||||
|
; Init POR
|
||||||
|
LDR R2, =0x50000024
|
||||||
|
LDR R1, =0x00005AA5
|
||||||
|
STR R1, [R2]
|
||||||
|
|
||||||
|
; Lock register
|
||||||
|
MOVS R1, #0
|
||||||
|
STR R1, [R0]
|
||||||
|
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
PendSV_Handler PROC
|
||||||
|
EXPORT PendSV_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SysTick_Handler PROC
|
||||||
|
EXPORT SysTick_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT BOD_IRQHandler [WEAK]
|
||||||
|
EXPORT WDT_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT0_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT1_IRQHandler [WEAK]
|
||||||
|
EXPORT GPAB_IRQHandler [WEAK]
|
||||||
|
EXPORT GPCDEF_IRQHandler [WEAK]
|
||||||
|
EXPORT PWMA_IRQHandler [WEAK]
|
||||||
|
EXPORT PWMB_IRQHandler [WEAK]
|
||||||
|
EXPORT TMR0_IRQHandler [WEAK]
|
||||||
|
EXPORT TMR1_IRQHandler [WEAK]
|
||||||
|
EXPORT TMR2_IRQHandler [WEAK]
|
||||||
|
EXPORT TMR3_IRQHandler [WEAK]
|
||||||
|
EXPORT UART02_IRQHandler [WEAK]
|
||||||
|
EXPORT UART1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI0_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI2_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI3_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C0_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN0_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN1_IRQHandler [WEAK]
|
||||||
|
EXPORT SC012_IRQHandler [WEAK]
|
||||||
|
EXPORT USBD_IRQHandler [WEAK]
|
||||||
|
EXPORT PS2_IRQHandler [WEAK]
|
||||||
|
EXPORT ACMP_IRQHandler [WEAK]
|
||||||
|
EXPORT PDMA_IRQHandler [WEAK]
|
||||||
|
EXPORT I2S_IRQHandler [WEAK]
|
||||||
|
EXPORT PWRWU_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
BOD_IRQHandler
|
||||||
|
WDT_IRQHandler
|
||||||
|
EINT0_IRQHandler
|
||||||
|
EINT1_IRQHandler
|
||||||
|
GPAB_IRQHandler
|
||||||
|
GPCDEF_IRQHandler
|
||||||
|
PWMA_IRQHandler
|
||||||
|
PWMB_IRQHandler
|
||||||
|
TMR0_IRQHandler
|
||||||
|
TMR1_IRQHandler
|
||||||
|
TMR2_IRQHandler
|
||||||
|
TMR3_IRQHandler
|
||||||
|
UART02_IRQHandler
|
||||||
|
UART1_IRQHandler
|
||||||
|
SPI0_IRQHandler
|
||||||
|
SPI1_IRQHandler
|
||||||
|
SPI2_IRQHandler
|
||||||
|
SPI3_IRQHandler
|
||||||
|
I2C0_IRQHandler
|
||||||
|
I2C1_IRQHandler
|
||||||
|
CAN0_IRQHandler
|
||||||
|
CAN1_IRQHandler
|
||||||
|
SC012_IRQHandler
|
||||||
|
USBD_IRQHandler
|
||||||
|
PS2_IRQHandler
|
||||||
|
ACMP_IRQHandler
|
||||||
|
PDMA_IRQHandler
|
||||||
|
I2S_IRQHandler
|
||||||
|
PWRWU_IRQHandler
|
||||||
|
ADC_IRQHandler
|
||||||
|
RTC_IRQHandler
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
|
||||||
|
; User Initial Stack & Heap
|
||||||
|
|
||||||
|
IF :DEF:__MICROLIB
|
||||||
|
|
||||||
|
EXPORT __initial_sp
|
||||||
|
EXPORT __heap_base
|
||||||
|
EXPORT __heap_limit
|
||||||
|
|
||||||
|
ELSE
|
||||||
|
|
||||||
|
IMPORT __use_two_region_memory
|
||||||
|
EXPORT __user_initial_stackheap
|
||||||
|
__user_initial_stackheap
|
||||||
|
|
||||||
|
LDR R0, = Heap_Mem
|
||||||
|
LDR R1, = (Stack_Mem + Stack_Size)
|
||||||
|
LDR R2, = (Heap_Mem + Heap_Size)
|
||||||
|
LDR R3, = Stack_Mem
|
||||||
|
BX LR
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
END
|
||||||
|
|
@ -0,0 +1,74 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file system_NUC100Series.c
|
||||||
|
* @version V3.0
|
||||||
|
* $Revision: 1 $
|
||||||
|
* $Date: 14/12/08 11:47a $
|
||||||
|
* @brief NUC100 Series CMSIS System File
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "NUC100Series.h"
|
||||||
|
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Clock Variable definitions
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
uint32_t SystemCoreClock = __HSI; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */
|
||||||
|
uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */
|
||||||
|
uint32_t gau32ClkSrcTbl[] = {__HXT, __LXT, __HSI, __LIRC, NULL, NULL, NULL, __HIRC};
|
||||||
|
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
Clock functions
|
||||||
|
This function is used to update the variable SystemCoreClock
|
||||||
|
and must be called whenever the core clock is changed.
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */
|
||||||
|
{
|
||||||
|
uint32_t u32Freq, u32ClkSrc;
|
||||||
|
uint32_t u32HclkDiv;
|
||||||
|
|
||||||
|
/* Update PLL Clock */
|
||||||
|
PllClock = CLK_GetPLLClockFreq();
|
||||||
|
|
||||||
|
u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLK_S_Msk;
|
||||||
|
|
||||||
|
if(u32ClkSrc != CLK_CLKSEL0_HCLK_S_PLL)
|
||||||
|
{
|
||||||
|
/* Use the clock sources directly */
|
||||||
|
u32Freq = gau32ClkSrcTbl[u32ClkSrc];
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Use PLL clock */
|
||||||
|
u32Freq = PllClock;
|
||||||
|
}
|
||||||
|
|
||||||
|
u32HclkDiv = (CLK->CLKDIV & CLK_CLKDIV_HCLK_N_Msk) + 1;
|
||||||
|
|
||||||
|
/* Update System Core Clock */
|
||||||
|
SystemCoreClock = u32Freq / u32HclkDiv;
|
||||||
|
|
||||||
|
CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Function: SystemInit */
|
||||||
|
/* */
|
||||||
|
/* Parameters: */
|
||||||
|
/* None */
|
||||||
|
/* */
|
||||||
|
/* Returns: */
|
||||||
|
/* None */
|
||||||
|
/* */
|
||||||
|
/* Description: */
|
||||||
|
/* The necessary initialization of system. */
|
||||||
|
/* */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,31 @@
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Auto generated Run-Time-Environment Configuration File
|
||||||
|
* *** Do not modify ! ***
|
||||||
|
*
|
||||||
|
* Project: '485'
|
||||||
|
* Target: 'Target 1'
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef RTE_COMPONENTS_H
|
||||||
|
#define RTE_COMPONENTS_H
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Define the Device Header File:
|
||||||
|
*/
|
||||||
|
#define CMSIS_device_header "NUC100Series.h"
|
||||||
|
|
||||||
|
/* Nuvoton::Device:Driver:ADC:3.00.004 */
|
||||||
|
#define RTE_Drivers_ADC /* Driver ADC */
|
||||||
|
/* Nuvoton::Device:Driver:CLK:3.00.004 */
|
||||||
|
#define RTE_Drivers_CLK /* Driver CLK */
|
||||||
|
/* Nuvoton::Device:Driver:SYS:3.00.004 */
|
||||||
|
#define RTE_Drivers_SYS /* Driver SYS */
|
||||||
|
/* Nuvoton::Device:Driver:Timer:3.00.004 */
|
||||||
|
#define RTE_Drivers_Timer /* Driver Timer */
|
||||||
|
/* Nuvoton::Device:Driver:UART:3.00.004 */
|
||||||
|
#define RTE_Drivers_UART /* Driver UART */
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* RTE_COMPONENTS_H */
|
||||||
|
|
@ -0,0 +1,224 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* @file main.c
|
||||||
|
* @version V2.00
|
||||||
|
* $Revision: 1 $
|
||||||
|
* $Date: 14/12/08 11:50a $
|
||||||
|
* @brief Transmit and receive data from PC terminal through RS232 interface.
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
#include <stdio.h>
|
||||||
|
#include "NUC100Series.h"
|
||||||
|
|
||||||
|
|
||||||
|
#define PLL_CLOCK 50000000
|
||||||
|
|
||||||
|
#define RXBUFSIZE 1024
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Global variables */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
uint8_t g_u8RecData[RXBUFSIZE] = {0};
|
||||||
|
|
||||||
|
volatile uint32_t g_u32comRbytes = 0;
|
||||||
|
volatile uint32_t g_u32comRhead = 0;
|
||||||
|
volatile uint32_t g_u32comRtail = 0;
|
||||||
|
volatile int32_t g_bWait = TRUE;
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Define functions prototype */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
int32_t main(void);
|
||||||
|
void UART_TEST_HANDLE(void);
|
||||||
|
void UART_FunctionTest(void);
|
||||||
|
|
||||||
|
|
||||||
|
void SYS_Init(void)
|
||||||
|
{
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Init System Clock */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Enable Internal RC 22.1184MHz clock */
|
||||||
|
CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
|
||||||
|
|
||||||
|
/* Waiting for Internal RC clock ready */
|
||||||
|
CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
|
||||||
|
|
||||||
|
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
|
||||||
|
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));
|
||||||
|
|
||||||
|
/* Enable external XTAL 12MHz clock
|
||||||
|
CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);
|
||||||
|
|
||||||
|
/* Waiting for external XTAL clock ready
|
||||||
|
CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);
|
||||||
|
|
||||||
|
/* Set core clock as PLL_CLOCK from PLL */
|
||||||
|
//CLK_SetCoreClock(PLL_CLOCK);
|
||||||
|
|
||||||
|
/* Enable UART module clock */
|
||||||
|
CLK_EnableModuleClock(UART1_MODULE);
|
||||||
|
|
||||||
|
/* Select UART module clock source */
|
||||||
|
//CLK_SetModuleClock(UART1_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Init I/O Multi-function */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Set GPB multi-function pins for UART0 RXD and TXD */
|
||||||
|
SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB5_Msk | SYS_GPB_MFP_PB4_Msk);
|
||||||
|
SYS->GPB_MFP |= SYS_GPB_MFP_PB5_UART1_TXD | SYS_GPB_MFP_PB4_UART1_RXD;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void UART1_Init()
|
||||||
|
{
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Init UART */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* Reset UART0 */
|
||||||
|
SYS_ResetModule(UART1_RST);
|
||||||
|
|
||||||
|
/* Configure UART0 and set UART0 Baudrate */
|
||||||
|
UART_Open(UART1, 115200);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* UART Test Sample */
|
||||||
|
/* Test Item */
|
||||||
|
/* It sends the received data to HyperTerminal. */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* MAIN function */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
void delay_ms(){
|
||||||
|
for(int x = 1000; x > 0;x--){
|
||||||
|
for(int z = 0; z < 300; z++){
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
/* Unlock protected registers */
|
||||||
|
SYS_UnlockReg();
|
||||||
|
|
||||||
|
/* Init System, peripheral clock and multi-function I/O */
|
||||||
|
SYS_Init();
|
||||||
|
|
||||||
|
/* Lock protected registers */
|
||||||
|
SYS_LockReg();
|
||||||
|
|
||||||
|
/* Init UART0 for printf and testing */
|
||||||
|
UART1_Init();
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* SAMPLE CODE */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* UART sample function */
|
||||||
|
//UART_FunctionTest();
|
||||||
|
|
||||||
|
while(1){
|
||||||
|
UART_Write(UART1,"shit",4);
|
||||||
|
delay_ms();
|
||||||
|
};
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* ISR to handle UART Channel 0 interrupt event */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
void UART02_IRQHandler(void)
|
||||||
|
{
|
||||||
|
UART_TEST_HANDLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* UART Callback function */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
void UART_TEST_HANDLE()
|
||||||
|
{
|
||||||
|
uint8_t u8InChar = 0xFF;
|
||||||
|
uint32_t u32IntSts = UART0->ISR;
|
||||||
|
|
||||||
|
if(u32IntSts & UART_ISR_RDA_INT_Msk)
|
||||||
|
{
|
||||||
|
printf("\nInput:");
|
||||||
|
|
||||||
|
/* Get all the input characters */
|
||||||
|
while(UART_IS_RX_READY(UART1))
|
||||||
|
{
|
||||||
|
/* Get the character from UART Buffer */
|
||||||
|
u8InChar = UART_READ(UART1);
|
||||||
|
|
||||||
|
printf("%c ", u8InChar);
|
||||||
|
|
||||||
|
if(u8InChar == '0')
|
||||||
|
{
|
||||||
|
g_bWait = FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check if buffer full */
|
||||||
|
if(g_u32comRbytes < RXBUFSIZE)
|
||||||
|
{
|
||||||
|
/* Enqueue the character */
|
||||||
|
g_u8RecData[g_u32comRtail] = u8InChar;
|
||||||
|
g_u32comRtail = (g_u32comRtail == (RXBUFSIZE - 1)) ? 0 : (g_u32comRtail + 1);
|
||||||
|
g_u32comRbytes++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
printf("\nTransmission Test:");
|
||||||
|
}
|
||||||
|
|
||||||
|
if(u32IntSts & UART_ISR_THRE_INT_Msk)
|
||||||
|
{
|
||||||
|
uint16_t tmp;
|
||||||
|
tmp = g_u32comRtail;
|
||||||
|
if(g_u32comRhead != tmp)
|
||||||
|
{
|
||||||
|
u8InChar = g_u8RecData[g_u32comRhead];
|
||||||
|
UART_WRITE(UART0, u8InChar);
|
||||||
|
g_u32comRhead = (g_u32comRhead == (RXBUFSIZE - 1)) ? 0 : (g_u32comRhead + 1);
|
||||||
|
g_u32comRbytes--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
/* UART Function Test */
|
||||||
|
/*---------------------------------------------------------------------------------------------------------*/
|
||||||
|
void UART_FunctionTest()
|
||||||
|
{
|
||||||
|
printf("+-----------------------------------------------------------+\n");
|
||||||
|
printf("| UART Function Test |\n");
|
||||||
|
printf("+-----------------------------------------------------------+\n");
|
||||||
|
printf("| Description : |\n");
|
||||||
|
printf("| The sample code will print input char on terminal |\n");
|
||||||
|
printf("| Please enter any to start (Press '0' to exit) |\n");
|
||||||
|
printf("+-----------------------------------------------------------+\n");
|
||||||
|
|
||||||
|
/*
|
||||||
|
Using a RS232 cable to connect UART0 and PC.
|
||||||
|
UART0 is set to debug port. UART0 is enable RDA and RLS interrupt.
|
||||||
|
When inputting char to terminal screen, RDA interrupt will happen and
|
||||||
|
UART0 will print the received char on screen.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Enable Interrupt and install the call back function */
|
||||||
|
UART_EnableInt(UART1, (UART_IER_RDA_IEN_Msk | UART_IER_THRE_IEN_Msk | UART_IER_TOUT_IEN_Msk));
|
||||||
|
while(g_bWait);
|
||||||
|
|
||||||
|
/* Disable Interrupt */
|
||||||
|
UART_DisableInt(UART1, (UART_IER_RDA_IEN_Msk | UART_IER_THRE_IEN_Msk | UART_IER_TOUT_IEN_Msk));
|
||||||
|
g_bWait = TRUE;
|
||||||
|
printf("\nUART Sample Demo End.\n");
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
Binary file not shown.
|
|
@ -1 +1 @@
|
||||||
"main.c" ROM(COMPACT) BROWSE DEBUG OBJECTEXTEND TABS (2)
|
"main.c" BROWSE DEBUG OBJECTEXTEND
|
||||||
|
|
@ -12,7 +12,7 @@
|
||||||
|
|
||||||
#include "STC11.h"
|
#include "STC11.h"
|
||||||
#include "intrins.h"
|
#include "intrins.h"
|
||||||
|
#include "string.h"
|
||||||
typedef unsigned char BYTE;
|
typedef unsigned char BYTE;
|
||||||
typedef unsigned int WORD;
|
typedef unsigned int WORD;
|
||||||
|
|
||||||
|
|
@ -31,15 +31,21 @@ typedef unsigned int WORD;
|
||||||
|
|
||||||
sbit bit9 = P2^2; //P2.2 show UART data bit9
|
sbit bit9 = P2^2; //P2.2 show UART data bit9
|
||||||
bit busy;
|
bit busy;
|
||||||
bit recv_flag = 0;
|
bit connected_flag = 0;
|
||||||
|
bit recv_flag_global = 0;
|
||||||
bit overflow_flag = 0;
|
bit overflow_flag = 0;
|
||||||
char recv_buf[30] = {0};
|
char recv_buf[30] = {0};
|
||||||
char index = 0;
|
char index = 0;
|
||||||
|
char index_tmp = 0;
|
||||||
void SendData(BYTE dat);
|
void SendData(BYTE dat);
|
||||||
void SendString(char *s);
|
void SendString(char *s);
|
||||||
|
void SendWifi(char *dat);
|
||||||
|
|
||||||
code char SetUp[30] = "ATE0\r\n";
|
code char AT_SetUp[30] = "ATE0\r\n";
|
||||||
code char Connect[] = "AT+CIPSTART=\"TCP\",\"192.168.2.108\",8080\r\n";
|
code char AT_Connect[] = "AT+CIPSTART=\"TCP\",\"192.168.2.108\",8080\r\n";
|
||||||
|
code char AT_SendData[] = "AT+CIPSEND=5\r\n";
|
||||||
|
|
||||||
|
char gSendbuf[14];
|
||||||
void P1_Uart(){
|
void P1_Uart(){
|
||||||
AUXR1 &= 0x7f;
|
AUXR1 &= 0x7f;
|
||||||
AUXR1 |= UART_P1;
|
AUXR1 |= UART_P1;
|
||||||
|
|
@ -64,6 +70,23 @@ void Delay3020ms() //@11.0592MHz
|
||||||
} while (--j);
|
} while (--j);
|
||||||
} while (--i);
|
} while (--i);
|
||||||
}
|
}
|
||||||
|
void Delay500ms() //@11.0592MHz
|
||||||
|
{
|
||||||
|
unsigned char i, j, k;
|
||||||
|
|
||||||
|
_nop_();
|
||||||
|
_nop_();
|
||||||
|
i = 22;
|
||||||
|
j = 3;
|
||||||
|
k = 227;
|
||||||
|
do
|
||||||
|
{
|
||||||
|
do
|
||||||
|
{
|
||||||
|
while (--k);
|
||||||
|
} while (--j);
|
||||||
|
} while (--i);
|
||||||
|
}
|
||||||
|
|
||||||
void Delay1020us() //@11.0592MHz
|
void Delay1020us() //@11.0592MHz
|
||||||
{
|
{
|
||||||
|
|
@ -90,16 +113,18 @@ void Uart_Init(){
|
||||||
}
|
}
|
||||||
|
|
||||||
void callbackUart(){
|
void callbackUart(){
|
||||||
if (recv_flag == 1 || overflow_flag == 1){
|
if (recv_flag_global == 1 || overflow_flag == 1){
|
||||||
P3_Uart();
|
P3_Uart();
|
||||||
SendString(recv_buf);
|
SendString(recv_buf);
|
||||||
recv_flag = 0;
|
memset(recv_buf,0,30);
|
||||||
|
recv_flag_global = 0;
|
||||||
overflow_flag = 0;
|
overflow_flag = 0;
|
||||||
P1_Uart();
|
P1_Uart();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
void main()
|
void main()
|
||||||
{
|
{
|
||||||
|
char i = 0;
|
||||||
bit flag1 = 0;
|
bit flag1 = 0;
|
||||||
bit flag2 = 0;
|
bit flag2 = 0;
|
||||||
Delay3020ms();
|
Delay3020ms();
|
||||||
|
|
@ -121,38 +146,83 @@ void main()
|
||||||
//P1 = 0X00;
|
//P1 = 0X00;
|
||||||
Delay1020us();
|
Delay1020us();
|
||||||
|
|
||||||
|
for( i = 0;i < 13;i++){
|
||||||
|
gSendbuf[i] = i+1;
|
||||||
|
}
|
||||||
while(1){
|
while(1){
|
||||||
if (flag1 == 0){
|
if (flag1 == 0){
|
||||||
flag1 = 1;
|
flag1 = 1;
|
||||||
SendString(SetUp);
|
SendString(AT_SetUp);
|
||||||
Delay3020ms();
|
Delay3020ms();
|
||||||
|
|
||||||
}
|
}
|
||||||
callbackUart();
|
callbackUart();
|
||||||
if ((flag1 == 1) && (flag2 == 0)) {
|
if ((flag1 == 1) && (flag2 == 0)) {
|
||||||
flag2 = 1;
|
flag2 = 1;
|
||||||
SendString(Connect);
|
SendString(AT_Connect);
|
||||||
Delay3020ms();
|
Delay3020ms();
|
||||||
|
connected_flag = 1;
|
||||||
|
//SendWifi("12345");
|
||||||
}
|
}
|
||||||
callbackUart();
|
callbackUart();
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
/*
|
||||||
|
0D 0A 4F 4B 0D 0A \r\nOK\r\n
|
||||||
|
43 4F 4E 4E 45 43 54 0D 0A 0D 0A 4F 4B 0D 0A CONNECT\r\nOK
|
||||||
|
+IPD,5:12345
|
||||||
|
*/
|
||||||
/*----------------------------
|
/*----------------------------
|
||||||
UART interrupt service routine
|
UART interrupt service routine
|
||||||
----------------------------*/
|
----------------------------*/
|
||||||
void Uart_Isr() interrupt 4
|
void Uart_Isr() interrupt 4
|
||||||
{
|
{
|
||||||
static char last_byte;
|
static char last_byte;
|
||||||
|
|
||||||
|
static bit flag_recv = 0;
|
||||||
|
static bit flag_need_read = 0;
|
||||||
|
static char recv_cnt = 0;
|
||||||
if (RI)
|
if (RI)
|
||||||
{
|
{
|
||||||
RI = 0; //Clear receive interrupt flag
|
RI = 0; //Clear receive interrupt flag
|
||||||
if((last_byte == '\r') &&(SBUF == '\n' )&& (index != 1)) {
|
if((last_byte == '\r')
|
||||||
recv_flag = 1;
|
&&(SBUF == '\n' )
|
||||||
|
&& (index != 1)
|
||||||
|
&&(connected_flag == 0)){
|
||||||
|
recv_buf[index + 1] = '\0';
|
||||||
|
recv_flag_global = 1;
|
||||||
index = 0;
|
index = 0;
|
||||||
|
sec_last_byte = 0;
|
||||||
|
last_byte = 0;
|
||||||
|
trd_last_byte = 0;
|
||||||
|
four_last_byte = 0;
|
||||||
|
//todo
|
||||||
}
|
}
|
||||||
|
if(
|
||||||
|
(last_byte == ':')
|
||||||
|
&&(sec_last_byte == '5' )
|
||||||
|
&&(trd_last_byte == ',' )
|
||||||
|
&&(four_last_byte == 'D'))
|
||||||
|
{
|
||||||
|
flag_need_read = 1;
|
||||||
|
recv_cnt = 5;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
if(flag_need_read == 1){
|
||||||
|
if(recv_cnt > 0){
|
||||||
|
recv_cnt --;
|
||||||
|
}else{
|
||||||
|
recv_buf[index + 1] = "\0";
|
||||||
|
recv_flag_global = 1;
|
||||||
|
index = 0;
|
||||||
|
sec_last_byte = 0;
|
||||||
|
last_byte = 0;
|
||||||
|
trd_last_byte = 0;
|
||||||
|
four_last_byte = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
RI = 0;
|
RI = 0;
|
||||||
recv_buf[index] = SBUF;
|
recv_buf[index] = SBUF;
|
||||||
last_byte = SBUF;
|
last_byte = SBUF;
|
||||||
|
|
@ -197,4 +267,8 @@ void SendString(char *s)
|
||||||
SendData(*s++); //Send current char and increment string ptr
|
SendData(*s++); //Send current char and increment string ptr
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
void SendWifi(char *dat){
|
||||||
|
SendString(AT_SendData);
|
||||||
|
Delay3020ms();
|
||||||
|
SendString(dat);
|
||||||
|
}
|
||||||
Binary file not shown.
|
|
@ -1,8 +1,8 @@
|
||||||
BL51 BANKED LINKER/LOCATER V6.22 07/13/2019 21:58:43 PAGE 1
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 1
|
||||||
|
|
||||||
|
|
||||||
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
|
BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
|
||||||
D:\C51\C51\BIN\BL51.EXE STARTUP.obj, main.obj TO relay RAMSIZE (256)
|
D:\PROGRAMS\C51\C51\BIN\BL51.EXE STARTUP.obj, main.obj TO relay RAMSIZE (256)
|
||||||
|
|
||||||
|
|
||||||
MEMORY MODEL: SMALL
|
MEMORY MODEL: SMALL
|
||||||
|
|
@ -11,8 +11,9 @@ MEMORY MODEL: SMALL
|
||||||
INPUT MODULES INCLUDED:
|
INPUT MODULES INCLUDED:
|
||||||
STARTUP.obj (?C_STARTUP)
|
STARTUP.obj (?C_STARTUP)
|
||||||
main.obj (MAIN)
|
main.obj (MAIN)
|
||||||
D:\C51\C51\LIB\C51S.LIB (?C_INIT)
|
D:\PROGRAMS\C51\C51\LIB\C51S.LIB (?C_INIT)
|
||||||
D:\C51\C51\LIB\C51S.LIB (?C?CLDPTR)
|
D:\PROGRAMS\C51\C51\LIB\C51S.LIB (?C?CLDPTR)
|
||||||
|
D:\PROGRAMS\C51\C51\LIB\C51S.LIB (?C?MEMSET)
|
||||||
|
|
||||||
|
|
||||||
LINK MAP OF MODULE: relay (?C_STARTUP)
|
LINK MAP OF MODULE: relay (?C_STARTUP)
|
||||||
|
|
@ -23,50 +24,52 @@ LINK MAP OF MODULE: relay (?C_STARTUP)
|
||||||
|
|
||||||
* * * * * * * D A T A M E M O R Y * * * * * * *
|
* * * * * * * D A T A M E M O R Y * * * * * * *
|
||||||
REG 0000H 0008H ABSOLUTE "REG BANK 0"
|
REG 0000H 0008H ABSOLUTE "REG BANK 0"
|
||||||
DATA 0008H 0003H UNIT _DATA_GROUP_
|
DATA 0008H 0003H UNIT ?DT?_SENDWIFI?MAIN
|
||||||
000BH 0015H *** GAP ***
|
DATA 000BH 0003H UNIT _DATA_GROUP_
|
||||||
BIT 0020H.0 0000H.3 UNIT ?BI?MAIN
|
000EH 0012H *** GAP ***
|
||||||
BIT 0020H.3 0000H.2 UNIT _BIT_GROUP_
|
BIT 0020H.0 0000H.6 UNIT ?BI?MAIN
|
||||||
0020H.5 0000H.3 *** GAP ***
|
BIT 0020H.6 0000H.2 UNIT _BIT_GROUP_
|
||||||
DATA 0021H 0020H UNIT ?DT?MAIN
|
DATA 0021H 0033H UNIT ?DT?MAIN
|
||||||
IDATA 0041H 0001H UNIT ?STACK
|
IDATA 0054H 0001H UNIT ?STACK
|
||||||
|
|
||||||
* * * * * * * C O D E M E M O R Y * * * * * * *
|
* * * * * * * C O D E M E M O R Y * * * * * * *
|
||||||
CODE 0000H 0003H ABSOLUTE
|
CODE 0000H 0003H ABSOLUTE
|
||||||
0003H 0020H *** GAP ***
|
0003H 0020H *** GAP ***
|
||||||
CODE 0023H 0003H ABSOLUTE
|
CODE 0023H 0003H ABSOLUTE
|
||||||
0026H 07DAH *** GAP ***
|
0026H 07DAH *** GAP ***
|
||||||
CODE 0800H 008CH UNIT ?C_C51STARTUP
|
CODE 0800H 00DBH UNIT ?PR?UART_ISR?MAIN
|
||||||
CODE 088CH 0052H INBLOCK ?PR?MAIN?MAIN
|
CODE 08DBH 008CH UNIT ?C_C51STARTUP
|
||||||
CODE 08DEH 004DH INBLOCK ?PR?UART_ISR?MAIN
|
CODE 0967H 0063H UNIT ?PR?MAIN?MAIN
|
||||||
CODE 092BH 0047H UNIT ?CO?MAIN
|
CODE 09CAH 0058H UNIT ?CO?MAIN
|
||||||
CODE 0972H 002CH INBLOCK ?PR?_SENDSTRING?MAIN
|
CODE 0A22H 0045H UNIT ?C?LIB_CODE
|
||||||
CODE 099EH 0028H UNIT ?C_INITSEG
|
CODE 0A67H 0034H UNIT ?C_INITSEG
|
||||||
CODE 09C6H 001DH INBLOCK ?PR?UART_INIT?MAIN
|
CODE 0A9BH 002CH UNIT ?PR?_SENDSTRING?MAIN
|
||||||
CODE 09E3H 001AH INBLOCK ?PR?CALLBACKUART?MAIN
|
CODE 0AC7H 0029H UNIT ?PR?CALLBACKUART?MAIN
|
||||||
CODE 09FDH 0019H UNIT ?C?LIB_CODE
|
CODE 0AF0H 001DH UNIT ?PR?UART_INIT?MAIN
|
||||||
CODE 0A16H 000FH INBLOCK ?PR?DELAY3020MS?MAIN
|
CODE 0B0DH 001BH UNIT ?PR?_SENDWIFI?MAIN
|
||||||
CODE 0A25H 000DH INBLOCK ?PR?_SENDDATA?MAIN
|
CODE 0B28H 000FH UNIT ?PR?DELAY3020MS?MAIN
|
||||||
CODE 0A32H 0009H INBLOCK ?PR?DELAY1020US?MAIN
|
CODE 0B37H 000FH UNIT ?PR?DELAY500MS?MAIN
|
||||||
CODE 0A3BH 0007H INBLOCK ?PR?P1_UART?MAIN
|
CODE 0B46H 000DH UNIT ?PR?_SENDDATA?MAIN
|
||||||
CODE 0A42H 0004H INBLOCK ?PR?P3_UART?MAIN
|
CODE 0B53H 0009H UNIT ?PR?DELAY1020US?MAIN
|
||||||
|
CODE 0B5CH 0007H UNIT ?PR?P1_UART?MAIN
|
||||||
|
CODE 0B63H 0004H UNIT ?PR?P3_UART?MAIN
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
OVERLAY MAP OF MODULE: relay (?C_STARTUP)
|
OVERLAY MAP OF MODULE: relay (?C_STARTUP)
|
||||||
|
|
||||||
|
|
||||||
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 2
|
||||||
|
|
||||||
|
|
||||||
SEGMENT BIT_GROUP DATA_GROUP
|
SEGMENT BIT_GROUP DATA_GROUP
|
||||||
+--> CALLED SEGMENT START LENGTH START LENGTH
|
+--> CALLED SEGMENT START LENGTH START LENGTH
|
||||||
------------------------------------------------------------------
|
------------------------------------------------------------------
|
||||||
BL51 BANKED LINKER/LOCATER V6.22 07/13/2019 21:58:43 PAGE 2
|
|
||||||
|
|
||||||
|
|
||||||
?C_C51STARTUP ----- ----- ----- -----
|
?C_C51STARTUP ----- ----- ----- -----
|
||||||
+--> ?PR?MAIN?MAIN
|
+--> ?PR?MAIN?MAIN
|
||||||
+--> ?C_INITSEG
|
+--> ?C_INITSEG
|
||||||
|
|
||||||
?PR?MAIN?MAIN 0020H.3 0000H.2 ----- -----
|
?PR?MAIN?MAIN 0020H.6 0000H.2 ----- -----
|
||||||
+--> ?PR?DELAY3020MS?MAIN
|
+--> ?PR?DELAY3020MS?MAIN
|
||||||
+--> ?PR?UART_INIT?MAIN
|
+--> ?PR?UART_INIT?MAIN
|
||||||
+--> ?PR?P1_UART?MAIN
|
+--> ?PR?P1_UART?MAIN
|
||||||
|
|
@ -75,7 +78,7 @@ SEGMENT BIT_GROUP DATA_GROUP
|
||||||
+--> ?PR?_SENDSTRING?MAIN
|
+--> ?PR?_SENDSTRING?MAIN
|
||||||
+--> ?PR?CALLBACKUART?MAIN
|
+--> ?PR?CALLBACKUART?MAIN
|
||||||
|
|
||||||
?PR?_SENDSTRING?MAIN ----- ----- 0008H 0003H
|
?PR?_SENDSTRING?MAIN ----- ----- 000BH 0003H
|
||||||
+--> ?PR?DELAY1020US?MAIN
|
+--> ?PR?DELAY1020US?MAIN
|
||||||
+--> ?PR?_SENDDATA?MAIN
|
+--> ?PR?_SENDDATA?MAIN
|
||||||
|
|
||||||
|
|
@ -84,6 +87,11 @@ SEGMENT BIT_GROUP DATA_GROUP
|
||||||
+--> ?PR?_SENDSTRING?MAIN
|
+--> ?PR?_SENDSTRING?MAIN
|
||||||
+--> ?PR?P1_UART?MAIN
|
+--> ?PR?P1_UART?MAIN
|
||||||
|
|
||||||
|
*** NEW ROOT ***************************************************
|
||||||
|
|
||||||
|
?PR?UART_ISR?MAIN ----- ----- ----- -----
|
||||||
|
+--> ?CO?MAIN
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
||||||
|
|
@ -92,8 +100,8 @@ SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
||||||
----------------------------------
|
----------------------------------
|
||||||
|
|
||||||
------- MODULE ?C_STARTUP
|
------- MODULE ?C_STARTUP
|
||||||
C:0800H SEGMENT ?C_C51STARTUP
|
C:08DBH SEGMENT ?C_C51STARTUP
|
||||||
I:0041H SEGMENT ?STACK
|
I:0054H SEGMENT ?STACK
|
||||||
C:0000H PUBLIC ?C_STARTUP
|
C:0000H PUBLIC ?C_STARTUP
|
||||||
D:00E0H SYMBOL ACC
|
D:00E0H SYMBOL ACC
|
||||||
D:00F0H SYMBOL B
|
D:00F0H SYMBOL B
|
||||||
|
|
@ -102,7 +110,7 @@ SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
||||||
N:0000H SYMBOL IBPSTACK
|
N:0000H SYMBOL IBPSTACK
|
||||||
N:0100H SYMBOL IBPSTACKTOP
|
N:0100H SYMBOL IBPSTACKTOP
|
||||||
N:0080H SYMBOL IDATALEN
|
N:0080H SYMBOL IDATALEN
|
||||||
C:0803H SYMBOL IDATALOOP
|
C:08DEH SYMBOL IDATALOOP
|
||||||
N:0000H SYMBOL PBPSTACK
|
N:0000H SYMBOL PBPSTACK
|
||||||
N:0100H SYMBOL PBPSTACKTOP
|
N:0100H SYMBOL PBPSTACKTOP
|
||||||
N:0000H SYMBOL PDATALEN
|
N:0000H SYMBOL PDATALEN
|
||||||
|
|
@ -111,84 +119,90 @@ SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
||||||
N:0000H SYMBOL PPAGEENABLE
|
N:0000H SYMBOL PPAGEENABLE
|
||||||
D:00A0H SYMBOL PPAGE_SFR
|
D:00A0H SYMBOL PPAGE_SFR
|
||||||
D:0081H SYMBOL SP
|
D:0081H SYMBOL SP
|
||||||
C:0800H SYMBOL STARTUP1
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 3
|
||||||
|
|
||||||
|
|
||||||
|
C:08DBH SYMBOL STARTUP1
|
||||||
N:0000H SYMBOL XBPSTACK
|
N:0000H SYMBOL XBPSTACK
|
||||||
N:0000H SYMBOL XBPSTACKTOP
|
N:0000H SYMBOL XBPSTACKTOP
|
||||||
N:0000H SYMBOL XDATALEN
|
N:0000H SYMBOL XDATALEN
|
||||||
N:0000H SYMBOL XDATASTART
|
N:0000H SYMBOL XDATASTART
|
||||||
C:0000H LINE# 126
|
C:0000H LINE# 126
|
||||||
C:0800H LINE# 133
|
C:08DBH LINE# 133
|
||||||
C:0802H LINE# 134
|
C:08DDH LINE# 134
|
||||||
BL51 BANKED LINKER/LOCATER V6.22 07/13/2019 21:58:43 PAGE 3
|
C:08DEH LINE# 135
|
||||||
|
C:08DFH LINE# 136
|
||||||
|
C:08E1H LINE# 185
|
||||||
C:0803H LINE# 135
|
C:08E4H LINE# 196
|
||||||
C:0804H LINE# 136
|
|
||||||
C:0806H LINE# 185
|
|
||||||
C:0809H LINE# 196
|
|
||||||
------- ENDMOD ?C_STARTUP
|
------- ENDMOD ?C_STARTUP
|
||||||
|
|
||||||
------- MODULE MAIN
|
------- MODULE MAIN
|
||||||
C:0000H SYMBOL _ICE_DUMMY_
|
C:0000H SYMBOL _ICE_DUMMY_
|
||||||
|
C:0A13H PUBLIC AT_SendData
|
||||||
D:0092H PUBLIC P1M0
|
D:0092H PUBLIC P1M0
|
||||||
C:0A3BH PUBLIC P1_Uart
|
C:0B5CH PUBLIC P1_Uart
|
||||||
D:0091H PUBLIC P1M1
|
D:0091H PUBLIC P1M1
|
||||||
D:0080H PUBLIC P0
|
D:0080H PUBLIC P0
|
||||||
D:0090H PUBLIC P1
|
D:0090H PUBLIC P1
|
||||||
C:0A42H PUBLIC P3_Uart
|
C:0B63H PUBLIC P3_Uart
|
||||||
D:00A0H PUBLIC P2
|
D:00A0H PUBLIC P2
|
||||||
D:00B0H PUBLIC P3
|
D:00B0H PUBLIC P3
|
||||||
D:00C0H PUBLIC P4
|
D:00C0H PUBLIC P4
|
||||||
|
B:0020H.2 PUBLIC recv_flag_global
|
||||||
D:00C8H PUBLIC P5
|
D:00C8H PUBLIC P5
|
||||||
B:00A8H.7 PUBLIC EA
|
B:00A8H.7 PUBLIC EA
|
||||||
C:0972H PUBLIC _SendString
|
C:0A9BH PUBLIC _SendString
|
||||||
C:0A25H PUBLIC _SendData
|
C:0B46H PUBLIC _SendData
|
||||||
D:00A8H PUBLIC IE
|
D:00A8H PUBLIC IE
|
||||||
C:09C6H PUBLIC Uart_Init
|
C:0AF0H PUBLIC Uart_Init
|
||||||
B:00A8H.4 PUBLIC ES
|
B:00A8H.4 PUBLIC ES
|
||||||
D:00B8H PUBLIC IP
|
D:00B8H PUBLIC IP
|
||||||
C:0A16H PUBLIC Delay3020ms
|
C:0B28H PUBLIC Delay3020ms
|
||||||
D:0022H PUBLIC index
|
D:0026H PUBLIC index
|
||||||
B:0098H.0 PUBLIC RI
|
B:0098H.0 PUBLIC RI
|
||||||
B:0098H.1 PUBLIC TI
|
B:0098H.1 PUBLIC TI
|
||||||
C:0A32H PUBLIC Delay1020us
|
C:0B0DH PUBLIC _SendWifi
|
||||||
|
C:0B53H PUBLIC Delay1020us
|
||||||
D:00D8H PUBLIC CCON
|
D:00D8H PUBLIC CCON
|
||||||
C:088CH PUBLIC main
|
C:0967H PUBLIC main
|
||||||
C:08DEH PUBLIC Uart_Isr
|
C:0800H PUBLIC Uart_Isr
|
||||||
B:0020H.0 PUBLIC recv_flag
|
|
||||||
D:0099H PUBLIC SBUF
|
D:0099H PUBLIC SBUF
|
||||||
D:0087H PUBLIC PCON
|
D:0087H PUBLIC PCON
|
||||||
|
D:0027H PUBLIC gSendbuf
|
||||||
D:0098H PUBLIC SCON
|
D:0098H PUBLIC SCON
|
||||||
D:0089H PUBLIC TMOD
|
D:0089H PUBLIC TMOD
|
||||||
D:0088H PUBLIC TCON
|
D:0088H PUBLIC TCON
|
||||||
|
B:0020H.3 PUBLIC connected_flag
|
||||||
D:008EH PUBLIC AUXR
|
D:008EH PUBLIC AUXR
|
||||||
B:0020H.1 PUBLIC busy
|
C:09EAH PUBLIC AT_Connect
|
||||||
|
B:0020H.4 PUBLIC busy
|
||||||
D:00E0H PUBLIC ACC
|
D:00E0H PUBLIC ACC
|
||||||
B:00A8H.3 PUBLIC ET1
|
B:00A8H.3 PUBLIC ET1
|
||||||
D:008DH PUBLIC TH1
|
D:008DH PUBLIC TH1
|
||||||
C:0949H PUBLIC Connect
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 4
|
||||||
C:09E3H PUBLIC callbackUart
|
|
||||||
D:0023H PUBLIC recv_buf
|
|
||||||
|
D:0035H PUBLIC index_tmp
|
||||||
|
C:0AC7H PUBLIC callbackUart
|
||||||
|
D:0036H PUBLIC recv_buf
|
||||||
D:008BH PUBLIC TL1
|
D:008BH PUBLIC TL1
|
||||||
B:0088H.6 PUBLIC TR1
|
B:0088H.6 PUBLIC TR1
|
||||||
B:0098H.4 PUBLIC REN
|
B:0098H.4 PUBLIC REN
|
||||||
|
C:0B37H PUBLIC Delay500ms
|
||||||
|
C:09CCH PUBLIC AT_SetUp
|
||||||
D:00A2H PUBLIC AUXR1
|
D:00A2H PUBLIC AUXR1
|
||||||
C:092BH PUBLIC SetUp
|
B:0020H.5 PUBLIC overflow_flag
|
||||||
B:0020H.2 PUBLIC overflow_flag
|
|
||||||
D:00D0H PUBLIC PSW
|
D:00D0H PUBLIC PSW
|
||||||
------- PROC P1_UART
|
------- PROC P1_UART
|
||||||
C:0A3BH LINE# 43
|
C:0B5CH LINE# 49
|
||||||
C:0A3BH LINE# 44
|
C:0B5CH LINE# 50
|
||||||
BL51 BANKED LINKER/LOCATER V6.22 07/13/2019 21:58:43 PAGE 4
|
C:0B5FH LINE# 51
|
||||||
|
C:0B62H LINE# 52
|
||||||
|
|
||||||
C:0A3EH LINE# 45
|
|
||||||
C:0A41H LINE# 46
|
|
||||||
------- ENDPROC P1_UART
|
------- ENDPROC P1_UART
|
||||||
------- PROC P3_UART
|
------- PROC P3_UART
|
||||||
C:0A42H LINE# 47
|
C:0B63H LINE# 53
|
||||||
C:0A42H LINE# 48
|
C:0B63H LINE# 54
|
||||||
C:0A45H LINE# 49
|
C:0B66H LINE# 55
|
||||||
------- ENDPROC P3_UART
|
------- ENDPROC P3_UART
|
||||||
------- PROC DELAY3020MS
|
------- PROC DELAY3020MS
|
||||||
------- DO
|
------- DO
|
||||||
|
|
@ -196,160 +210,249 @@ SYMBOL TABLE OF MODULE: relay (?C_STARTUP)
|
||||||
D:0006H SYMBOL j
|
D:0006H SYMBOL j
|
||||||
D:0005H SYMBOL k
|
D:0005H SYMBOL k
|
||||||
------- ENDDO
|
------- ENDDO
|
||||||
C:0A16H LINE# 50
|
C:0B28H LINE# 56
|
||||||
C:0A16H LINE# 51
|
C:0B28H LINE# 57
|
||||||
C:0A16H LINE# 54
|
C:0B28H LINE# 60
|
||||||
C:0A17H LINE# 55
|
C:0B29H LINE# 61
|
||||||
C:0A18H LINE# 56
|
C:0B2AH LINE# 62
|
||||||
C:0A1AH LINE# 57
|
C:0B2CH LINE# 63
|
||||||
C:0A1CH LINE# 58
|
C:0B2EH LINE# 64
|
||||||
C:0A1EH LINE# 60
|
C:0B30H LINE# 66
|
||||||
C:0A1EH LINE# 62
|
C:0B30H LINE# 68
|
||||||
C:0A1EH LINE# 63
|
C:0B30H LINE# 69
|
||||||
C:0A20H LINE# 64
|
C:0B32H LINE# 70
|
||||||
C:0A22H LINE# 65
|
C:0B34H LINE# 71
|
||||||
C:0A24H LINE# 66
|
C:0B36H LINE# 72
|
||||||
------- ENDPROC DELAY3020MS
|
------- ENDPROC DELAY3020MS
|
||||||
|
------- PROC DELAY500MS
|
||||||
|
------- DO
|
||||||
|
D:0007H SYMBOL i
|
||||||
|
D:0006H SYMBOL j
|
||||||
|
D:0005H SYMBOL k
|
||||||
|
------- ENDDO
|
||||||
|
C:0B37H LINE# 73
|
||||||
|
C:0B37H LINE# 74
|
||||||
|
C:0B37H LINE# 77
|
||||||
|
C:0B38H LINE# 78
|
||||||
|
C:0B39H LINE# 79
|
||||||
|
C:0B3BH LINE# 80
|
||||||
|
C:0B3DH LINE# 81
|
||||||
|
C:0B3FH LINE# 83
|
||||||
|
C:0B3FH LINE# 85
|
||||||
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 5
|
||||||
|
|
||||||
|
|
||||||
|
C:0B3FH LINE# 86
|
||||||
|
C:0B41H LINE# 87
|
||||||
|
C:0B43H LINE# 88
|
||||||
|
C:0B45H LINE# 89
|
||||||
|
------- ENDPROC DELAY500MS
|
||||||
------- PROC DELAY1020US
|
------- PROC DELAY1020US
|
||||||
------- DO
|
------- DO
|
||||||
D:0007H SYMBOL i
|
D:0007H SYMBOL i
|
||||||
D:0006H SYMBOL j
|
D:0006H SYMBOL j
|
||||||
------- ENDDO
|
------- ENDDO
|
||||||
C:0A32H LINE# 68
|
C:0B53H LINE# 91
|
||||||
C:0A32H LINE# 69
|
C:0B53H LINE# 92
|
||||||
C:0A32H LINE# 72
|
C:0B53H LINE# 95
|
||||||
C:0A34H LINE# 73
|
C:0B55H LINE# 96
|
||||||
C:0A36H LINE# 75
|
C:0B57H LINE# 98
|
||||||
C:0A36H LINE# 76
|
C:0B57H LINE# 99
|
||||||
C:0A38H LINE# 77
|
C:0B59H LINE# 100
|
||||||
C:0A3AH LINE# 78
|
C:0B5BH LINE# 101
|
||||||
------- ENDPROC DELAY1020US
|
------- ENDPROC DELAY1020US
|
||||||
------- PROC UART_INIT
|
------- PROC UART_INIT
|
||||||
C:09C6H LINE# 79
|
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|
||||||
C:09C6H LINE# 80
|
C:0AF0H LINE# 103
|
||||||
C:09C9H LINE# 81
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|
||||||
C:09CCH LINE# 82
|
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|
||||||
C:09CFH LINE# 83
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|
||||||
C:09D2H LINE# 84
|
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|
||||||
C:09D5H LINE# 85
|
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|
||||||
C:09D8H LINE# 86
|
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|
||||||
C:09DBH LINE# 87
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C:0B05H LINE# 110
|
||||||
C:09DEH LINE# 88
|
C:0B08H LINE# 111
|
||||||
C:09E0H LINE# 89
|
C:0B0AH LINE# 112
|
||||||
C:09E2H LINE# 90
|
C:0B0CH LINE# 113
|
||||||
------- ENDPROC UART_INIT
|
------- ENDPROC UART_INIT
|
||||||
------- PROC CALLBACKUART
|
------- PROC CALLBACKUART
|
||||||
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|
C:0AC7H LINE# 115
|
||||||
|
C:0AC7H LINE# 116
|
||||||
|
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|
||||||
C:09E3H LINE# 92
|
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|
||||||
C:09E3H LINE# 93
|
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|
||||||
C:09E9H LINE# 94
|
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|
||||||
C:09ECH LINE# 95
|
C:0AEAH LINE# 121
|
||||||
C:09F5H LINE# 96
|
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|
||||||
C:09F7H LINE# 97
|
C:0AEFH LINE# 123
|
||||||
C:09F9H LINE# 98
|
C:0AEFH LINE# 124
|
||||||
C:09FCH LINE# 99
|
|
||||||
C:09FCH LINE# 100
|
|
||||||
------- ENDPROC CALLBACKUART
|
------- ENDPROC CALLBACKUART
|
||||||
------- PROC MAIN
|
------- PROC MAIN
|
||||||
------- DO
|
------- DO
|
||||||
B:0020H.3 SYMBOL flag1
|
D:0007H SYMBOL i
|
||||||
B:0020H.4 SYMBOL flag2
|
B:0020H.6 SYMBOL flag1
|
||||||
|
B:0020H.7 SYMBOL flag2
|
||||||
------- ENDDO
|
------- ENDDO
|
||||||
C:088CH LINE# 101
|
C:0967H LINE# 125
|
||||||
C:088CH LINE# 102
|
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|
||||||
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|
||||||
C:088EH LINE# 104
|
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|
||||||
C:0890H LINE# 105
|
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|
||||||
C:0893H LINE# 107
|
C:096DH LINE# 130
|
||||||
C:0896H LINE# 108
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 6
|
||||||
C:0899H LINE# 109
|
|
||||||
C:089CH LINE# 111
|
|
||||||
C:089FH LINE# 112
|
C:0970H LINE# 132
|
||||||
C:08A2H LINE# 115
|
C:0973H LINE# 133
|
||||||
C:08A4H LINE# 116
|
C:0976H LINE# 134
|
||||||
C:08A6H LINE# 117
|
C:0979H LINE# 136
|
||||||
C:08A8H LINE# 118
|
C:097BH LINE# 137
|
||||||
C:08ABH LINE# 119
|
C:097EH LINE# 140
|
||||||
C:08AEH LINE# 122
|
C:0980H LINE# 141
|
||||||
C:08B1H LINE# 125
|
C:0982H LINE# 142
|
||||||
C:08B1H LINE# 126
|
C:0984H LINE# 143
|
||||||
C:08B4H LINE# 127
|
C:0987H LINE# 144
|
||||||
C:08B6H LINE# 128
|
C:098AH LINE# 147
|
||||||
C:08BFH LINE# 129
|
C:098DH LINE# 149
|
||||||
C:08C2H LINE# 131
|
C:098EH LINE# 150
|
||||||
C:08C2H LINE# 132
|
C:0997H LINE# 151
|
||||||
C:08C5H LINE# 133
|
C:099BH LINE# 152
|
||||||
C:08CBH LINE# 134
|
C:099BH LINE# 153
|
||||||
C:08CDH LINE# 135
|
C:099EH LINE# 154
|
||||||
C:08D6H LINE# 136
|
C:09A0H LINE# 155
|
||||||
C:08D9H LINE# 138
|
C:09A9H LINE# 156
|
||||||
C:08D9H LINE# 139
|
C:09ACH LINE# 158
|
||||||
C:08DCH LINE# 140
|
C:09ACH LINE# 159
|
||||||
|
C:09AFH LINE# 160
|
||||||
|
C:09B5H LINE# 161
|
||||||
|
C:09B7H LINE# 162
|
||||||
|
C:09C0H LINE# 163
|
||||||
|
C:09C3H LINE# 164
|
||||||
|
C:09C5H LINE# 166
|
||||||
|
C:09C5H LINE# 167
|
||||||
|
C:09C8H LINE# 168
|
||||||
------- ENDPROC MAIN
|
------- ENDPROC MAIN
|
||||||
------- PROC UART_ISR
|
------- PROC UART_ISR
|
||||||
------- DO
|
------- DO
|
||||||
D:0021H SYMBOL last_byte
|
D:0021H SYMBOL last_byte
|
||||||
|
D:0022H SYMBOL sec_last_byte
|
||||||
|
D:0023H SYMBOL trd_last_byte
|
||||||
|
D:0024H SYMBOL four_last_byte
|
||||||
|
B:0020H.0 SYMBOL flag_recv
|
||||||
|
B:0020H.1 SYMBOL flag_need_read
|
||||||
|
D:0025H SYMBOL recv_cnt
|
||||||
------- ENDDO
|
------- ENDDO
|
||||||
C:08DEH LINE# 146
|
C:0800H LINE# 178
|
||||||
C:08E7H LINE# 149
|
C:0809H LINE# 188
|
||||||
C:08EAH LINE# 150
|
C:080FH LINE# 189
|
||||||
C:08EAH LINE# 151
|
C:080FH LINE# 190
|
||||||
C:08ECH LINE# 152
|
C:0811H LINE# 191
|
||||||
C:08FCH LINE# 153
|
C:0825H LINE# 194
|
||||||
C:08FEH LINE# 154
|
C:0825H LINE# 195
|
||||||
BL51 BANKED LINKER/LOCATER V6.22 07/13/2019 21:58:43 PAGE 6
|
C:082CH LINE# 196
|
||||||
|
C:082EH LINE# 197
|
||||||
|
C:0831H LINE# 198
|
||||||
|
C:0834H LINE# 199
|
||||||
|
C:0837H LINE# 200
|
||||||
|
C:083AH LINE# 201
|
||||||
|
C:083DH LINE# 203
|
||||||
|
C:083DH LINE# 204
|
||||||
|
C:0851H LINE# 205
|
||||||
|
C:0851H LINE# 206
|
||||||
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 7
|
||||||
|
|
||||||
|
|
||||||
C:0901H LINE# 155
|
C:0853H LINE# 207
|
||||||
C:0901H LINE# 156
|
C:0856H LINE# 208
|
||||||
C:0903H LINE# 157
|
C:0856H LINE# 211
|
||||||
C:090AH LINE# 158
|
C:0859H LINE# 212
|
||||||
C:090DH LINE# 159
|
C:0862H LINE# 213
|
||||||
C:090FH LINE# 160
|
C:0864H LINE# 214
|
||||||
C:0918H LINE# 161
|
C:0866H LINE# 215
|
||||||
C:091BH LINE# 162
|
C:086DH LINE# 216
|
||||||
C:091DH LINE# 163
|
C:086FH LINE# 217
|
||||||
C:091DH LINE# 164
|
C:0872H LINE# 218
|
||||||
C:091DH LINE# 165
|
C:0875H LINE# 219
|
||||||
C:0920H LINE# 166
|
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|
||||||
C:0920H LINE# 167
|
C:087BH LINE# 221
|
||||||
C:0922H LINE# 168
|
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|
||||||
C:0924H LINE# 169
|
C:087EH LINE# 223
|
||||||
C:0924H LINE# 170
|
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|
||||||
|
C:0880H LINE# 226
|
||||||
|
C:0887H LINE# 227
|
||||||
|
C:088AH LINE# 228
|
||||||
|
C:0893H LINE# 229
|
||||||
|
C:089BH LINE# 230
|
||||||
|
C:089BH LINE# 231
|
||||||
|
C:08A4H LINE# 232
|
||||||
|
C:08ACH LINE# 233
|
||||||
|
C:08ACH LINE# 234
|
||||||
|
C:08B5H LINE# 235
|
||||||
|
C:08BDH LINE# 236
|
||||||
|
C:08BDH LINE# 238
|
||||||
|
C:08BFH LINE# 239
|
||||||
|
C:08C8H LINE# 240
|
||||||
|
C:08CBH LINE# 241
|
||||||
|
C:08CDH LINE# 242
|
||||||
|
C:08CDH LINE# 243
|
||||||
|
C:08CDH LINE# 244
|
||||||
|
C:08D0H LINE# 245
|
||||||
|
C:08D0H LINE# 246
|
||||||
|
C:08D2H LINE# 247
|
||||||
|
C:08D4H LINE# 248
|
||||||
|
C:08D4H LINE# 249
|
||||||
------- ENDPROC UART_ISR
|
------- ENDPROC UART_ISR
|
||||||
------- PROC _SENDDATA
|
------- PROC _SENDDATA
|
||||||
D:0007H SYMBOL dat
|
D:0007H SYMBOL dat
|
||||||
C:0A25H LINE# 177
|
C:0B46H LINE# 256
|
||||||
C:0A25H LINE# 178
|
C:0B46H LINE# 257
|
||||||
C:0A25H LINE# 179
|
C:0B46H LINE# 258
|
||||||
C:0A29H LINE# 180
|
C:0B4AH LINE# 259
|
||||||
C:0A2AH LINE# 182
|
C:0B4BH LINE# 261
|
||||||
C:0A2CH LINE# 183
|
C:0B4DH LINE# 262
|
||||||
C:0A2EH LINE# 184
|
C:0B4FH LINE# 263
|
||||||
C:0A31H LINE# 185
|
C:0B52H LINE# 264
|
||||||
------- ENDPROC _SENDDATA
|
------- ENDPROC _SENDDATA
|
||||||
------- PROC _SENDSTRING
|
------- PROC _SENDSTRING
|
||||||
D:0008H SYMBOL s
|
D:000BH SYMBOL s
|
||||||
C:0972H LINE# 192
|
C:0A9BH LINE# 271
|
||||||
C:0978H LINE# 193
|
C:0AA1H LINE# 272
|
||||||
C:0978H LINE# 194
|
C:0AA1H LINE# 273
|
||||||
C:0983H LINE# 195
|
C:0AACH LINE# 274
|
||||||
C:0983H LINE# 196
|
BL51 BANKED LINKER/LOCATER V6.22 02/02/2020 01:51:01 PAGE 8
|
||||||
C:0986H LINE# 197
|
|
||||||
C:099BH LINE# 198
|
|
||||||
C:099DH LINE# 199
|
C:0AACH LINE# 275
|
||||||
|
C:0AAFH LINE# 276
|
||||||
|
C:0AC4H LINE# 277
|
||||||
|
C:0AC6H LINE# 278
|
||||||
------- ENDPROC _SENDSTRING
|
------- ENDPROC _SENDSTRING
|
||||||
|
------- PROC _SENDWIFI
|
||||||
|
D:0008H SYMBOL dat
|
||||||
|
C:0B0DH LINE# 279
|
||||||
|
C:0B13H LINE# 280
|
||||||
|
C:0B1CH LINE# 281
|
||||||
|
C:0B1FH LINE# 282
|
||||||
|
------- ENDPROC _SENDWIFI
|
||||||
------- ENDMOD MAIN
|
------- ENDMOD MAIN
|
||||||
|
|
||||||
------- MODULE ?C?CLDPTR
|
------- MODULE ?C?CLDPTR
|
||||||
C:09FDH PUBLIC ?C?CLDPTR
|
C:0A22H PUBLIC ?C?CLDPTR
|
||||||
------- ENDMOD ?C?CLDPTR
|
------- ENDMOD ?C?CLDPTR
|
||||||
|
|
||||||
|
------- MODULE ?C?MEMSET
|
||||||
|
C:0A3BH PUBLIC ?C?MEMSET
|
||||||
|
------- ENDMOD ?C?MEMSET
|
||||||
|
|
||||||
|
*** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS
|
||||||
|
SEGMENT: ?PR?DELAY500MS?MAIN
|
||||||
|
|
||||||
|
*** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS
|
||||||
|
SEGMENT: ?PR?_SENDWIFI?MAIN
|
||||||
|
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* RESTRICTED VERSION WITH 0800H BYTE CODE SIZE LIMIT; USED: 01B2H BYTE (21%) *
|
* RESTRICTED VERSION WITH 0800H BYTE CODE SIZE LIMIT; USED: 02A7H BYTE (33%) *
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
|
|
||||||
Program Size: data=44.5 xdata=0 code=588
|
Program Size: data=67.0 xdata=0 code=877
|
||||||
LINK/LOCATE RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
|
LINK/LOCATE RUN COMPLETE. 2 WARNING(S), 0 ERROR(S)
|
||||||
|
|
|
||||||
|
|
@ -1,49 +1,69 @@
|
||||||
:03000000020800F3
|
:030000000208DB18
|
||||||
:0C080000787FE4F6D8FD758140020847BF
|
:0C08DB00787FE4F6D8FD758153020922F5
|
||||||
:10092B00415445300D0A000000000000000000009B
|
:1009CA000000415445300D0A0000000000000000FC
|
||||||
:10093B000000000000000000000000000000415417
|
:1009DA00000000000000000000000000000000000D
|
||||||
:10094B002B43495053544152543D22544350222C73
|
:1009EA0041542B43495053544152543D225443508D
|
||||||
:10095B00223139322E3136382E322E313038222C8C
|
:1009FA00222C223139322E3136382E322E313038ED
|
||||||
:07096B00383038300D0A009E
|
:100A0A00222C383038300D0A0041542B43495053B8
|
||||||
:10099E00C100C1021E230000000000000000000084
|
:080A1A00454E443D350D0A0074
|
||||||
:1009AE000000000000000000000000000000000039
|
:100A6700C103C102C1051E360000000000000000DE
|
||||||
:0709BE00000000000122000F
|
:100A7700000000000000000000000000000000006F
|
||||||
:070A3B0053A27F43A28022B9
|
:100A8700000000000000012600013500C100C1017F
|
||||||
:040A420053A27F221A
|
:030A970001250036
|
||||||
:0E0A160000007F7F7EE97D94DDFEDEFCDFFACE
|
:070B5C0053A27F43A2802297
|
||||||
:010A240022AF
|
:040B630053A27F22F8
|
||||||
:080A32007F0B7EF6DEFEDFFC07
|
:0E0B280000007F7F7EE97D94DDFEDEFCDFFABB
|
||||||
:010A3A002299
|
:010B3600229C
|
||||||
:1009C60053877F759850438E40538EFE53890F434D
|
:0E0B370000007F167E037DE3DDFEDEFCDFFAAC
|
||||||
:0D09D6008920758BFD758DFDC2ABD28E2280
|
:010B4500228D
|
||||||
:1009E300200003300213120A427B007A007923129B
|
:080B53007F0B7EF6DEFEDFFCE5
|
||||||
:0A09F3000972C200C202120A3B2280
|
:010B5B002277
|
||||||
:10088C00C203C204120A16120A16120A161209C65A
|
:100AF00053877F759850438E40538EFE53890F4322
|
||||||
:10089C00E4F59175923FD2ACD2AFD29C120A3B12C6
|
:0D0B00008920758BFD758DFDC2ABD28E2254
|
||||||
:1008AC000A32120A3220030ED2037BFF7A09792B0B
|
:100AC700200203300522120B637B007A007936126D
|
||||||
:1008BC00120972120A161209E330031120040ED227
|
:100AD7000A9B7E007F1E7D007B007A007936120A12
|
||||||
:1008CC00047BFF7A097949120972120A161209E39C
|
:090AE7003BC202C205120B5C22A5
|
||||||
:0208DC0080D3C7
|
:10096700E4FFC206C207120B28120B28120B28122B
|
||||||
:030023000208DEF2
|
:100977000AF0F59175923FD2ACD2AFD29C120B5CC4
|
||||||
:0908DE00C0E0C0D075D000C000DC
|
:10098700120B53120B53FFEF04FE74272FF8A60622
|
||||||
:1008E700309833C298E521B40D10E599B40A0BE5A9
|
:100997000FBF0DF320060ED2067BFF7A0979CC1222
|
||||||
:1008F7002264016005D200752200C2987423252264
|
:1009A7000A9B120B28120AC7300613200710D2071A
|
||||||
:10090700F8A6998599210522D3E5226480949D4014
|
:1009B7007BFF7A0979EA120A9B120B28D203120AE3
|
||||||
:0D09170005752200D202309904C299C20178
|
:0309C700C780D115
|
||||||
:07092400D000D0D0D0E0327A
|
:03002300020800D0
|
||||||
:0D0A250030010122EFD201F5992001FD22E0
|
:09080000C0E0C0D075D000C000BA
|
||||||
:100972008B088A09890AAB08AA09A90A1209FD602B
|
:100809002098030208CDC298E521640D7026E59968
|
||||||
:100982001A120A32AB08050AE50AAA097002050919
|
:10081900B40A21E5266401601B20031874372526D4
|
||||||
:0C09920014F91209FDFF120A2580DB2277
|
:10082900F87600D20275260075220075210075231D
|
||||||
:10080C0002088CE493A3F8E493A34003F68001F26E
|
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|
||||||
:10081C0008DFF48029E493A3F85407240CC8C333ED
|
:10084900B42C0AE524B44405D201752505300125E7
|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
:10087C00F0A3C8C582C8CAC583CADFE9DEE780BE5B
|
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|
||||||
:0109C5000031
|
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|
||||||
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|
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|
||||||
:090A0D00E32289828A83E493222A
|
:0708D400D000D0D0D0E032CB
|
||||||
|
:0D0B460030040122EFD204F5992004FD22B5
|
||||||
|
:100A9B008B0B8A0C890DAB0BAA0CA90D120A2260C9
|
||||||
|
:100AAB001A120B53AB0B050DE50DAA0C7002050CBE
|
||||||
|
:0C0ABB0014F9120A22FF120B4680DB2205
|
||||||
|
:100B0D008B088A09890A7BFF7A0A7913120A9B12CC
|
||||||
|
:0B0B1D000B28AB08AA09A90A020A9BDA
|
||||||
|
:1008E700020967E493A3F8E493A34003F68001F2B7
|
||||||
|
:1008F70008DFF48029E493A3F85407240CC8C33312
|
||||||
|
:10090700C4540F4420C8834004F456800146F6DFE0
|
||||||
|
:10091700E4800B0102040810204080900A67E47EFF
|
||||||
|
:10092700019360BCA3FF543F30E509541FFEE493D5
|
||||||
|
:10093700A360010ECF54C025E060A840B8E493A39C
|
||||||
|
:10094700FAE493A3F8E493A3C8C582C8CAC583CAC7
|
||||||
|
:10095700F0A3C8C582C8CAC583CADFE9DEE780BE7F
|
||||||
|
:010A9A00005B
|
||||||
|
:100A2200BB010689828A83E0225002E722BBFE02D2
|
||||||
|
:090A3200E32289828A83E4932205
|
||||||
|
:100A3B00EF4E6012EF60010EEDBB010B89828A83D2
|
||||||
|
:100A4B00F0A3DFFCDEFA2289F05007F709DFFCA9DF
|
||||||
|
:0C0A5B00F022BBFEFCF309DFFCA9F02236
|
||||||
:00000001FF
|
:00000001FF
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
|
|
@ -552,16 +552,16 @@ Image Symbol Table
|
||||||
../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE
|
../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE
|
||||||
24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE
|
24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE
|
||||||
24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE
|
24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE
|
||||||
D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\clk.c 0x00000000 Number 0 clk.o ABSOLUTE
|
D:\\keil_arm_pack\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\clk.c 0x00000000 Number 0 clk.o ABSOLUTE
|
||||||
D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
D:\\keil_arm_pack\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
||||||
D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE
|
D:\\keil_arm_pack\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE
|
||||||
D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\spi.c 0x00000000 Number 0 spi.o ABSOLUTE
|
D:\\keil_arm_pack\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\spi.c 0x00000000 Number 0 spi.o ABSOLUTE
|
||||||
D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\sys.c 0x00000000 Number 0 sys.o ABSOLUTE
|
D:\\keil_arm_pack\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\sys.c 0x00000000 Number 0 sys.o ABSOLUTE
|
||||||
D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\clk.c 0x00000000 Number 0 clk.o ABSOLUTE
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\clk.c 0x00000000 Number 0 clk.o ABSOLUTE
|
||||||
D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE
|
||||||
D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE
|
||||||
D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\spi.c 0x00000000 Number 0 spi.o ABSOLUTE
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\spi.c 0x00000000 Number 0 spi.o ABSOLUTE
|
||||||
D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.c 0x00000000 Number 0 sys.o ABSOLUTE
|
D:\keil_arm_pack\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.c 0x00000000 Number 0 sys.o ABSOLUTE
|
||||||
RTE\Device\M453VG6AE\retarget.c 0x00000000 Number 0 retarget.o ABSOLUTE
|
RTE\Device\M453VG6AE\retarget.c 0x00000000 Number 0 retarget.o ABSOLUTE
|
||||||
RTE\Device\M453VG6AE\startup_M451Series.s 0x00000000 Number 0 startup_m451series.o ABSOLUTE
|
RTE\Device\M453VG6AE\startup_M451Series.s 0x00000000 Number 0 startup_m451series.o ABSOLUTE
|
||||||
RTE\Device\M453VG6AE\system_M451Series.c 0x00000000 Number 0 system_m451series.o ABSOLUTE
|
RTE\Device\M453VG6AE\system_M451Series.c 0x00000000 Number 0 system_m451series.o ABSOLUTE
|
||||||
|
|
@ -679,27 +679,27 @@ Image Symbol Table
|
||||||
i.SystemCoreClockUpdate 0x0000130c Section 0 system_m451series.o(i.SystemCoreClockUpdate)
|
i.SystemCoreClockUpdate 0x0000130c Section 0 system_m451series.o(i.SystemCoreClockUpdate)
|
||||||
i.SystemInit 0x00001370 Section 0 system_m451series.o(i.SystemInit)
|
i.SystemInit 0x00001370 Section 0 system_m451series.o(i.SystemInit)
|
||||||
i.__NVIC_EnableIRQ 0x000013e4 Section 0 main.o(i.__NVIC_EnableIRQ)
|
i.__NVIC_EnableIRQ 0x000013e4 Section 0 main.o(i.__NVIC_EnableIRQ)
|
||||||
__NVIC_EnableIRQ 0x000013e5 Thumb Code 26 main.o(i.__NVIC_EnableIRQ)
|
__NVIC_EnableIRQ 0x000013e5 Thumb Code 34 main.o(i.__NVIC_EnableIRQ)
|
||||||
i._is_digit 0x000013fe Section 0 __printf_wp.o(i._is_digit)
|
i._is_digit 0x00001406 Section 0 __printf_wp.o(i._is_digit)
|
||||||
i.delayAny 0x0000140c Section 0 spi_hal.o(i.delayAny)
|
i.delayAny 0x00001414 Section 0 spi_hal.o(i.delayAny)
|
||||||
i.delay_s 0x0000141a Section 0 24l01.o(i.delay_s)
|
i.delay_s 0x00001422 Section 0 24l01.o(i.delay_s)
|
||||||
i.ferror 0x00001428 Section 0 retarget.o(i.ferror)
|
i.ferror 0x00001430 Section 0 retarget.o(i.ferror)
|
||||||
i.fputc 0x00001430 Section 0 retarget.o(i.fputc)
|
i.fputc 0x00001438 Section 0 retarget.o(i.fputc)
|
||||||
i.main 0x00001440 Section 0 main.o(i.main)
|
i.main 0x00001448 Section 0 main.o(i.main)
|
||||||
i.nrf_read 0x0000147c Section 0 spi_hal.o(i.nrf_read)
|
i.nrf_read 0x00001484 Section 0 spi_hal.o(i.nrf_read)
|
||||||
i.nrf_write 0x00001498 Section 0 spi_hal.o(i.nrf_write)
|
i.nrf_write 0x000014a0 Section 0 spi_hal.o(i.nrf_write)
|
||||||
i.nrf_writebuf 0x000014b6 Section 0 spi_hal.o(i.nrf_writebuf)
|
i.nrf_writebuf 0x000014be Section 0 spi_hal.o(i.nrf_writebuf)
|
||||||
i.spi_disable 0x000014e4 Section 0 spi_hal.o(i.spi_disable)
|
i.spi_disable 0x000014ec Section 0 spi_hal.o(i.spi_disable)
|
||||||
i.spi_enable 0x000014f8 Section 0 spi_hal.o(i.spi_enable)
|
i.spi_enable 0x00001500 Section 0 spi_hal.o(i.spi_enable)
|
||||||
i.spi_read 0x0000150c Section 0 spi_hal.o(i.spi_read)
|
i.spi_read 0x00001514 Section 0 spi_hal.o(i.spi_read)
|
||||||
i.spi_send 0x0000152c Section 0 spi_hal.o(i.spi_send)
|
i.spi_send 0x00001534 Section 0 spi_hal.o(i.spi_send)
|
||||||
i.stackDump 0x0000154c Section 0 retarget.o(i.stackDump)
|
i.stackDump 0x00001554 Section 0 retarget.o(i.stackDump)
|
||||||
stackDump 0x0000154d Thumb Code 70 retarget.o(i.stackDump)
|
stackDump 0x00001555 Thumb Code 70 retarget.o(i.stackDump)
|
||||||
x$fpl$fpinit 0x000015f4 Section 10 fpinit.o(x$fpl$fpinit)
|
x$fpl$fpinit 0x000015fc Section 10 fpinit.o(x$fpl$fpinit)
|
||||||
$v0 0x000015f4 Number 0 fpinit.o(x$fpl$fpinit)
|
$v0 0x000015fc Number 0 fpinit.o(x$fpl$fpinit)
|
||||||
.constdata 0x000015fe Section 40 _printf_hex_int.o(.constdata)
|
.constdata 0x00001606 Section 40 _printf_hex_int.o(.constdata)
|
||||||
uc_hextab 0x000015fe Data 20 _printf_hex_int.o(.constdata)
|
uc_hextab 0x00001606 Data 20 _printf_hex_int.o(.constdata)
|
||||||
lc_hextab 0x00001612 Data 20 _printf_hex_int.o(.constdata)
|
lc_hextab 0x0000161a Data 20 _printf_hex_int.o(.constdata)
|
||||||
.data 0x20000000 Section 12 main.o(.data)
|
.data 0x20000000 Section 12 main.o(.data)
|
||||||
.data 0x2000000c Section 21 24l01.o(.data)
|
.data 0x2000000c Section 21 24l01.o(.data)
|
||||||
ifinit 0x20000020 Data 1 24l01.o(.data)
|
ifinit 0x20000020 Data 1 24l01.o(.data)
|
||||||
|
|
@ -923,24 +923,24 @@ Image Symbol Table
|
||||||
Spi_init 0x00001269 Thumb Code 138 spi_hal.o(i.Spi_init)
|
Spi_init 0x00001269 Thumb Code 138 spi_hal.o(i.Spi_init)
|
||||||
SystemCoreClockUpdate 0x0000130d Thumb Code 74 system_m451series.o(i.SystemCoreClockUpdate)
|
SystemCoreClockUpdate 0x0000130d Thumb Code 74 system_m451series.o(i.SystemCoreClockUpdate)
|
||||||
SystemInit 0x00001371 Thumb Code 104 system_m451series.o(i.SystemInit)
|
SystemInit 0x00001371 Thumb Code 104 system_m451series.o(i.SystemInit)
|
||||||
_is_digit 0x000013ff Thumb Code 14 __printf_wp.o(i._is_digit)
|
_is_digit 0x00001407 Thumb Code 14 __printf_wp.o(i._is_digit)
|
||||||
delayAny 0x0000140d Thumb Code 14 spi_hal.o(i.delayAny)
|
delayAny 0x00001415 Thumb Code 14 spi_hal.o(i.delayAny)
|
||||||
delay_s 0x0000141b Thumb Code 14 24l01.o(i.delay_s)
|
delay_s 0x00001423 Thumb Code 14 24l01.o(i.delay_s)
|
||||||
ferror 0x00001429 Thumb Code 8 retarget.o(i.ferror)
|
ferror 0x00001431 Thumb Code 8 retarget.o(i.ferror)
|
||||||
fputc 0x00001431 Thumb Code 16 retarget.o(i.fputc)
|
fputc 0x00001439 Thumb Code 16 retarget.o(i.fputc)
|
||||||
main 0x00001441 Thumb Code 56 main.o(i.main)
|
main 0x00001449 Thumb Code 56 main.o(i.main)
|
||||||
nrf_read 0x0000147d Thumb Code 28 spi_hal.o(i.nrf_read)
|
nrf_read 0x00001485 Thumb Code 28 spi_hal.o(i.nrf_read)
|
||||||
nrf_write 0x00001499 Thumb Code 30 spi_hal.o(i.nrf_write)
|
nrf_write 0x000014a1 Thumb Code 30 spi_hal.o(i.nrf_write)
|
||||||
nrf_writebuf 0x000014b7 Thumb Code 46 spi_hal.o(i.nrf_writebuf)
|
nrf_writebuf 0x000014bf Thumb Code 46 spi_hal.o(i.nrf_writebuf)
|
||||||
spi_disable 0x000014e5 Thumb Code 14 spi_hal.o(i.spi_disable)
|
spi_disable 0x000014ed Thumb Code 14 spi_hal.o(i.spi_disable)
|
||||||
spi_enable 0x000014f9 Thumb Code 14 spi_hal.o(i.spi_enable)
|
spi_enable 0x00001501 Thumb Code 14 spi_hal.o(i.spi_enable)
|
||||||
spi_read 0x0000150d Thumb Code 28 spi_hal.o(i.spi_read)
|
spi_read 0x00001515 Thumb Code 28 spi_hal.o(i.spi_read)
|
||||||
spi_send 0x0000152d Thumb Code 28 spi_hal.o(i.spi_send)
|
spi_send 0x00001535 Thumb Code 28 spi_hal.o(i.spi_send)
|
||||||
_fp_init 0x000015f5 Thumb Code 10 fpinit.o(x$fpl$fpinit)
|
_fp_init 0x000015fd Thumb Code 10 fpinit.o(x$fpl$fpinit)
|
||||||
__fplib_config_fpu_vfp 0x000015fd Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
__fplib_config_fpu_vfp 0x00001605 Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
||||||
__fplib_config_pureend_doubles 0x000015fd Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
__fplib_config_pureend_doubles 0x00001605 Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
||||||
Region$$Table$$Base 0x00001628 Number 0 anon$$obj.o(Region$$Table)
|
Region$$Table$$Base 0x00001630 Number 0 anon$$obj.o(Region$$Table)
|
||||||
Region$$Table$$Limit 0x00001648 Number 0 anon$$obj.o(Region$$Table)
|
Region$$Table$$Limit 0x00001650 Number 0 anon$$obj.o(Region$$Table)
|
||||||
Axis1 0x20000000 Data 2 main.o(.data)
|
Axis1 0x20000000 Data 2 main.o(.data)
|
||||||
Axis2 0x20000002 Data 2 main.o(.data)
|
Axis2 0x20000002 Data 2 main.o(.data)
|
||||||
Axis3 0x20000004 Data 2 main.o(.data)
|
Axis3 0x20000004 Data 2 main.o(.data)
|
||||||
|
|
@ -972,9 +972,9 @@ Memory Map of the image
|
||||||
|
|
||||||
Image Entry point : 0x00000141
|
Image Entry point : 0x00000141
|
||||||
|
|
||||||
Load Region LR_IROM1 (Base: 0x00000000, Size: 0x000016a0, Max: 0x00040000, ABSOLUTE)
|
Load Region LR_IROM1 (Base: 0x00000000, Size: 0x000016a8, Max: 0x00040000, ABSOLUTE)
|
||||||
|
|
||||||
Execution Region ER_IROM1 (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x00001648, Max: 0x00040000, ABSOLUTE)
|
Execution Region ER_IROM1 (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x00001650, Max: 0x00040000, ABSOLUTE)
|
||||||
|
|
||||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||||
|
|
||||||
|
|
@ -1079,36 +1079,36 @@ Memory Map of the image
|
||||||
0x00001268 0x00001268 0x000000a4 Code RO 289 i.Spi_init spi_hal.o
|
0x00001268 0x00001268 0x000000a4 Code RO 289 i.Spi_init spi_hal.o
|
||||||
0x0000130c 0x0000130c 0x00000064 Code RO 1395 i.SystemCoreClockUpdate system_m451series.o
|
0x0000130c 0x0000130c 0x00000064 Code RO 1395 i.SystemCoreClockUpdate system_m451series.o
|
||||||
0x00001370 0x00001370 0x00000074 Code RO 1396 i.SystemInit system_m451series.o
|
0x00001370 0x00001370 0x00000074 Code RO 1396 i.SystemInit system_m451series.o
|
||||||
0x000013e4 0x000013e4 0x0000001a Code RO 8 i.__NVIC_EnableIRQ main.o
|
0x000013e4 0x000013e4 0x00000022 Code RO 8 i.__NVIC_EnableIRQ main.o
|
||||||
0x000013fe 0x000013fe 0x0000000e Code RO 1474 i._is_digit c_w.l(__printf_wp.o)
|
0x00001406 0x00001406 0x0000000e Code RO 1474 i._is_digit c_w.l(__printf_wp.o)
|
||||||
0x0000140c 0x0000140c 0x0000000e Code RO 290 i.delayAny spi_hal.o
|
0x00001414 0x00001414 0x0000000e Code RO 290 i.delayAny spi_hal.o
|
||||||
0x0000141a 0x0000141a 0x0000000e Code RO 188 i.delay_s 24l01.o
|
0x00001422 0x00001422 0x0000000e Code RO 188 i.delay_s 24l01.o
|
||||||
0x00001428 0x00001428 0x00000008 Code RO 1278 i.ferror retarget.o
|
0x00001430 0x00001430 0x00000008 Code RO 1278 i.ferror retarget.o
|
||||||
0x00001430 0x00001430 0x00000010 Code RO 1280 i.fputc retarget.o
|
0x00001438 0x00001438 0x00000010 Code RO 1280 i.fputc retarget.o
|
||||||
0x00001440 0x00001440 0x0000003c Code RO 10 i.main main.o
|
0x00001448 0x00001448 0x0000003c Code RO 10 i.main main.o
|
||||||
0x0000147c 0x0000147c 0x0000001c Code RO 291 i.nrf_read spi_hal.o
|
0x00001484 0x00001484 0x0000001c Code RO 291 i.nrf_read spi_hal.o
|
||||||
0x00001498 0x00001498 0x0000001e Code RO 293 i.nrf_write spi_hal.o
|
0x000014a0 0x000014a0 0x0000001e Code RO 293 i.nrf_write spi_hal.o
|
||||||
0x000014b6 0x000014b6 0x0000002e Code RO 294 i.nrf_writebuf spi_hal.o
|
0x000014be 0x000014be 0x0000002e Code RO 294 i.nrf_writebuf spi_hal.o
|
||||||
0x000014e4 0x000014e4 0x00000014 Code RO 295 i.spi_disable spi_hal.o
|
0x000014ec 0x000014ec 0x00000014 Code RO 295 i.spi_disable spi_hal.o
|
||||||
0x000014f8 0x000014f8 0x00000014 Code RO 296 i.spi_enable spi_hal.o
|
0x00001500 0x00001500 0x00000014 Code RO 296 i.spi_enable spi_hal.o
|
||||||
0x0000150c 0x0000150c 0x00000020 Code RO 297 i.spi_read spi_hal.o
|
0x00001514 0x00001514 0x00000020 Code RO 297 i.spi_read spi_hal.o
|
||||||
0x0000152c 0x0000152c 0x00000020 Code RO 298 i.spi_send spi_hal.o
|
0x00001534 0x00001534 0x00000020 Code RO 298 i.spi_send spi_hal.o
|
||||||
0x0000154c 0x0000154c 0x000000a8 Code RO 1282 i.stackDump retarget.o
|
0x00001554 0x00001554 0x000000a8 Code RO 1282 i.stackDump retarget.o
|
||||||
0x000015f4 0x000015f4 0x0000000a Code RO 1586 x$fpl$fpinit fz_wm.l(fpinit.o)
|
0x000015fc 0x000015fc 0x0000000a Code RO 1586 x$fpl$fpinit fz_wm.l(fpinit.o)
|
||||||
0x000015fe 0x000015fe 0x00000028 Data RO 1447 .constdata c_w.l(_printf_hex_int.o)
|
0x00001606 0x00001606 0x00000028 Data RO 1447 .constdata c_w.l(_printf_hex_int.o)
|
||||||
0x00001626 0x00001626 0x00000002 PAD
|
0x0000162e 0x0000162e 0x00000002 PAD
|
||||||
0x00001628 0x00001628 0x00000020 Data RO 1652 Region$$Table anon$$obj.o
|
0x00001630 0x00001630 0x00000020 Data RO 1652 Region$$Table anon$$obj.o
|
||||||
|
|
||||||
|
|
||||||
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x00001648, Size: 0x000004f8, Max: 0x00008000, ABSOLUTE)
|
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x00001650, Size: 0x000004f8, Max: 0x00008000, ABSOLUTE)
|
||||||
|
|
||||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||||
|
|
||||||
0x20000000 0x00001648 0x0000000c Data RW 11 .data main.o
|
0x20000000 0x00001650 0x0000000c Data RW 11 .data main.o
|
||||||
0x2000000c 0x00001654 0x00000015 Data RW 190 .data 24l01.o
|
0x2000000c 0x0000165c 0x00000015 Data RW 190 .data 24l01.o
|
||||||
0x20000021 0x00001669 0x00000003 PAD
|
0x20000021 0x00001671 0x00000003 PAD
|
||||||
0x20000024 0x0000166c 0x00000008 Data RW 1283 .data retarget.o
|
0x20000024 0x00001674 0x00000008 Data RW 1283 .data retarget.o
|
||||||
0x2000002c 0x00001674 0x0000002c Data RW 1397 .data system_m451series.o
|
0x2000002c 0x0000167c 0x0000002c Data RW 1397 .data system_m451series.o
|
||||||
0x20000058 - 0x00000040 Zero RW 189 .bss 24l01.o
|
0x20000058 - 0x00000040 Zero RW 189 .bss 24l01.o
|
||||||
0x20000098 - 0x00000060 Zero RW 1528 .bss c_w.l(libspace.o)
|
0x20000098 - 0x00000060 Zero RW 1528 .bss c_w.l(libspace.o)
|
||||||
0x200000f8 - 0x00000000 Zero RW 1385 HEAP startup_m451series.o
|
0x200000f8 - 0x00000000 Zero RW 1385 HEAP startup_m451series.o
|
||||||
|
|
@ -1122,21 +1122,21 @@ Image component sizes
|
||||||
|
|
||||||
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
||||||
|
|
||||||
544 58 0 21 64 5758 24l01.o
|
544 58 0 21 64 5882 24l01.o
|
||||||
144 10 0 0 0 16279 clk.o
|
144 10 0 0 0 16215 clk.o
|
||||||
44 0 0 0 0 1223 gpio.o
|
44 0 0 0 0 1183 gpio.o
|
||||||
368 40 0 0 0 1144 interrupt.o
|
368 40 0 0 0 1168 interrupt.o
|
||||||
666 58 0 12 0 239075 main.o
|
674 58 0 12 0 209316 main.o
|
||||||
532 30 0 0 0 5564 pwm.o
|
532 30 0 0 0 5428 pwm.o
|
||||||
324 132 0 8 0 5801 retarget.o
|
324 132 0 8 0 5893 retarget.o
|
||||||
782 42 0 0 0 3315 spi.o
|
782 42 0 0 0 3243 spi.o
|
||||||
386 46 0 0 0 4745 spi_hal.o
|
386 46 0 0 0 4865 spi_hal.o
|
||||||
116 36 320 0 1024 936 startup_m451series.o
|
116 36 320 0 1024 948 startup_m451series.o
|
||||||
48 0 0 0 0 574 sys.o
|
48 0 0 0 0 558 sys.o
|
||||||
316 54 0 44 0 33267 system_m451series.o
|
316 54 0 44 0 33295 system_m451series.o
|
||||||
|
|
||||||
----------------------------------------------------------------------
|
----------------------------------------------------------------------
|
||||||
4276 506 352 88 1088 317681 Object Totals
|
4284 506 352 88 1088 287994 Object Totals
|
||||||
0 0 32 0 0 0 (incl. Generated)
|
0 0 32 0 0 0 (incl. Generated)
|
||||||
6 0 0 3 0 0 (incl. Padding)
|
6 0 0 3 0 0 (incl. Padding)
|
||||||
|
|
||||||
|
|
@ -1197,15 +1197,15 @@ Image component sizes
|
||||||
|
|
||||||
Code (inc. data) RO Data RW Data ZI Data Debug
|
Code (inc. data) RO Data RW Data ZI Data Debug
|
||||||
|
|
||||||
5310 540 394 88 1184 314181 Grand Totals
|
5318 540 394 88 1184 284494 Grand Totals
|
||||||
5310 540 394 88 1184 314181 ELF Image Totals
|
5318 540 394 88 1184 284494 ELF Image Totals
|
||||||
5310 540 394 88 0 0 ROM Totals
|
5318 540 394 88 0 0 ROM Totals
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
||||||
Total RO Size (Code + RO Data) 5704 ( 5.57kB)
|
Total RO Size (Code + RO Data) 5712 ( 5.58kB)
|
||||||
Total RW Size (RW Data + ZI Data) 1272 ( 1.24kB)
|
Total RW Size (RW Data + ZI Data) 1272 ( 1.24kB)
|
||||||
Total ROM Size (Code + RO Data + RW Data) 5792 ( 5.66kB)
|
Total ROM Size (Code + RO Data + RW Data) 5800 ( 5.66kB)
|
||||||
|
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
||||||
|
|
|
||||||
Binary file not shown.
|
|
@ -1,4 +1,4 @@
|
||||||
--cpu=Cortex-M4.fp
|
--cpu=Cortex-M4.fp.sp
|
||||||
".\objects\main.o"
|
".\objects\main.o"
|
||||||
".\objects\24l01.o"
|
".\objects\24l01.o"
|
||||||
".\objects\spi_hal.o"
|
".\objects\spi_hal.o"
|
||||||
|
|
|
||||||
|
|
@ -7,6 +7,7 @@ LR_IROM1 0x00000000 0x00040000 { ; load region size_region
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
|
.ANY (+XO)
|
||||||
}
|
}
|
||||||
RW_IRAM1 0x20000000 0x00008000 { ; RW data
|
RW_IRAM1 0x20000000 0x00008000 { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,15 @@
|
||||||
|
; *************************************************************
|
||||||
|
; *** Scatter-Loading Description File generated by uVision ***
|
||||||
|
; *************************************************************
|
||||||
|
|
||||||
|
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
|
||||||
|
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
RW_IRAM1 0x20000000 0x00008000 { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -1,6 +1,6 @@
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Auto generated Run-Time-Environment Component Configuration File
|
* Auto generated Run-Time-Environment Configuration File
|
||||||
* *** Do not modify ! ***
|
* *** Do not modify ! ***
|
||||||
*
|
*
|
||||||
* Project: 'roboticarm_controller'
|
* Project: 'roboticarm_controller'
|
||||||
|
|
@ -16,10 +16,16 @@
|
||||||
*/
|
*/
|
||||||
#define CMSIS_device_header "M451Series.h"
|
#define CMSIS_device_header "M451Series.h"
|
||||||
|
|
||||||
|
/* Nuvoton::Device:Driver:CLK:3.01.001 */
|
||||||
#define RTE_Drivers_CLK /* Driver CLK */
|
#define RTE_Drivers_CLK /* Driver CLK */
|
||||||
|
/* Nuvoton::Device:Driver:GPIO:3.01.001 */
|
||||||
#define RTE_Drivers_GPIO /* Driver GPIO */
|
#define RTE_Drivers_GPIO /* Driver GPIO */
|
||||||
|
/* Nuvoton::Device:Driver:PWM:3.01.001 */
|
||||||
#define RTE_Drivers_PWM /* Driver PWM */
|
#define RTE_Drivers_PWM /* Driver PWM */
|
||||||
|
/* Nuvoton::Device:Driver:SPI:3.01.001 */
|
||||||
#define RTE_Drivers_SPI /* Driver SPI */
|
#define RTE_Drivers_SPI /* Driver SPI */
|
||||||
|
/* Nuvoton::Device:Driver:SYS:3.01.001 */
|
||||||
#define RTE_Drivers_SYS /* Driver SYS */
|
#define RTE_Drivers_SYS /* Driver SYS */
|
||||||
|
|
||||||
|
|
||||||
#endif /* RTE_COMPONENTS_H */
|
#endif /* RTE_COMPONENTS_H */
|
||||||
|
|
|
||||||
|
|
@ -77,7 +77,7 @@
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
<IsCurrentTarget>1</IsCurrentTarget>
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
</OPTFL>
|
</OPTFL>
|
||||||
<CpuCode>255</CpuCode>
|
<CpuCode>6</CpuCode>
|
||||||
<DebugOpt>
|
<DebugOpt>
|
||||||
<uSim>0</uSim>
|
<uSim>0</uSim>
|
||||||
<uTrg>1</uTrg>
|
<uTrg>1</uTrg>
|
||||||
|
|
@ -103,7 +103,7 @@
|
||||||
<bEvRecOn>1</bEvRecOn>
|
<bEvRecOn>1</bEvRecOn>
|
||||||
<bSchkAxf>0</bSchkAxf>
|
<bSchkAxf>0</bSchkAxf>
|
||||||
<bTchkAxf>0</bTchkAxf>
|
<bTchkAxf>0</bTchkAxf>
|
||||||
<nTsel>8</nTsel>
|
<nTsel>7</nTsel>
|
||||||
<sDll></sDll>
|
<sDll></sDll>
|
||||||
<sDllPa></sDllPa>
|
<sDllPa></sDllPa>
|
||||||
<sDlgDll></sDlgDll>
|
<sDlgDll></sDlgDll>
|
||||||
|
|
|
||||||
|
|
@ -184,6 +184,7 @@
|
||||||
<hadXRAM>0</hadXRAM>
|
<hadXRAM>0</hadXRAM>
|
||||||
<uocXRam>0</uocXRam>
|
<uocXRam>0</uocXRam>
|
||||||
<RvdsVP>2</RvdsVP>
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
<hadIRAM2>0</hadIRAM2>
|
<hadIRAM2>0</hadIRAM2>
|
||||||
<hadIROM2>0</hadIROM2>
|
<hadIROM2>0</hadIROM2>
|
||||||
<StupSel>8</StupSel>
|
<StupSel>8</StupSel>
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue