diff --git a/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvoptx b/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvoptx index a69f6e4..e95647b 100644 --- a/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvoptx +++ b/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvoptx @@ -77,7 +77,7 @@ 0 1 - 6 + 255 0 1 @@ -103,7 +103,7 @@ 1 0 0 - 7 + 8 diff --git a/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvprojx b/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvprojx index b378367..469e905 100644 --- a/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvprojx +++ b/9G/PWM_DeadZone/KEIL/PWM_DeadZone.uvprojx @@ -184,7 +184,6 @@ 0 0 2 - 0 0 0 8 diff --git a/9G/PWM_DeadZone/KEIL/RTE/_PWM_DeadZone/RTE_Components.h b/9G/PWM_DeadZone/KEIL/RTE/_PWM_DeadZone/RTE_Components.h index c6ca16c..0b0ed7c 100644 --- a/9G/PWM_DeadZone/KEIL/RTE/_PWM_DeadZone/RTE_Components.h +++ b/9G/PWM_DeadZone/KEIL/RTE/_PWM_DeadZone/RTE_Components.h @@ -1,6 +1,6 @@ /* - * Auto generated Run-Time-Environment Configuration File + * Auto generated Run-Time-Environment Component Configuration File * *** Do not modify ! *** * * Project: 'PWM_DeadZone' @@ -16,14 +16,9 @@ */ #define CMSIS_device_header "M451Series.h" -/* Nuvoton::Device:Driver:CLK:3.01.001 */ #define RTE_Drivers_CLK /* Driver CLK */ -/* Nuvoton::Device:Driver:PWM:3.01.001 */ #define RTE_Drivers_PWM /* Driver PWM */ -/* Nuvoton::Device:Driver:SYS:3.01.001 */ #define RTE_Drivers_SYS /* Driver SYS */ -/* Nuvoton::Device:Driver:UART:3.01.001 */ #define RTE_Drivers_UART /* Driver UART */ - #endif /* RTE_COMPONENTS_H */ diff --git a/OLED/M451/OLED_TEST/OLED.uvguix.29019 b/OLED/M451/OLED_TEST/OLED.uvguix.29019 index 9d41042..0e14a5d 100644 --- a/OLED/M451/OLED_TEST/OLED.uvguix.29019 +++ b/OLED/M451/OLED_TEST/OLED.uvguix.29019 @@ -5,10 +5,6 @@
### uVision Project, (C) Keil Software
- - - - System Viewer\CLK @@ -52,7 +48,7 @@ 38003 Registers - 188 122 + 155 155 346 @@ -67,17 +63,11 @@ - - 35141 - Event Statistics - - 200 50 700 - 1506 Symbols - 106 106 106 + 85 85 85 1936 @@ -130,8 +120,8 @@ 2 3 - -32000 - -32040 + -1 + -1 -1 @@ -139,16 +129,16 @@ 0 - 1273 - 2567 - 1047 + 1266 + 2560 + 884 0 - 1497 - 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898 @@ -1888,8 +1878,8 @@ 0 - 2560 - 1080 + 2048 + 864 @@ -3644,7 +3634,7 @@ .\main.c 0 - 120 + 51 131 1 @@ -3669,10 +3659,10 @@ 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\NUC100\Driver\retarget.c + RTE\Device\M451VG6AE\retarget.c 0 - 1 - 1 + 487 + 493 1 0 @@ -3680,23 +3670,23 @@ .\codetab.h 2 - 181 + 194 212 1 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\NUC100\Driver\I2C.h + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\I2C.h 0 - 65 - 76 + 61 + 77 1 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Include\M451Series.h + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Include\M451Series.h 0 5016 5027 @@ -3714,7 +3704,7 @@ 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\i2c.c + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\i2c.c 16 100 110 @@ -3723,16 +3713,7 @@ 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\i2c.h - 0 - 61 - 77 - 1 - - 0 - - - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.h + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.h 16 38 47 @@ -3741,25 +3722,16 @@ 0 - RTE\Device\M451VG6AE\retarget.c + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.c 0 - 487 - 493 - 1 - - 0 - - - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.c - 0 - 123 + 136 154 1 0 - C:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\clk.h + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\clk.h 0 258 269 diff --git a/OLED/M451/OLED_TEST/OLED.uvoptx b/OLED/M451/OLED_TEST/OLED.uvoptx index bfc794e..c17633c 100644 --- a/OLED/M451/OLED_TEST/OLED.uvoptx +++ b/OLED/M451/OLED_TEST/OLED.uvoptx @@ -77,7 +77,7 @@ 0 1 - 6 + 255 0 1 @@ -103,7 +103,7 @@ 1 0 0 - 7 + 8 diff --git a/OLED/M451/OLED_TEST/OLED.uvprojx b/OLED/M451/OLED_TEST/OLED.uvprojx index bba153a..42bad52 100644 --- a/OLED/M451/OLED_TEST/OLED.uvprojx +++ b/OLED/M451/OLED_TEST/OLED.uvprojx @@ -184,7 +184,6 @@ 0 0 2 - 0 0 0 8 diff --git a/OLED/M451/OLED_TEST/RTE/_oled/RTE_Components.h b/OLED/M451/OLED_TEST/RTE/_oled/RTE_Components.h index 7c80aa7..30639e8 100644 --- a/OLED/M451/OLED_TEST/RTE/_oled/RTE_Components.h +++ b/OLED/M451/OLED_TEST/RTE/_oled/RTE_Components.h @@ -1,6 +1,6 @@ /* - * Auto generated Run-Time-Environment Configuration File + * Auto generated Run-Time-Environment Component Configuration File * *** Do not modify ! *** * * Project: 'OLED' @@ -16,18 +16,11 @@ */ #define CMSIS_device_header "M451Series.h" -/* Nuvoton::Device:Driver:CLK:3.01.001 */ #define RTE_Drivers_CLK /* Driver CLK */ -/* Nuvoton::Device:Driver:GPIO:3.01.001 */ #define RTE_Drivers_GPIO /* Driver GPIO */ -/* Nuvoton::Device:Driver:I2C:3.01.001 */ #define RTE_Drivers_I2C /* Driver I2C */ -/* Nuvoton::Device:Driver:SC:3.01.001 */ #define RTE_Drivers_SC /* Driver SC */ -/* Nuvoton::Device:Driver:SYS:3.01.001 */ #define RTE_Drivers_SYS /* Driver SYS */ -/* Nuvoton::Device:Driver:UART:3.01.001 */ #define RTE_Drivers_UART /* Driver UART */ - #endif /* RTE_COMPONENTS_H */ diff --git a/roboticarm_controller/24l01.c b/roboticarm_controller/24l01.c new file mode 100644 index 0000000..c9111f7 --- /dev/null +++ b/roboticarm_controller/24l01.c @@ -0,0 +1,267 @@ +#include "M451Series.h" +#include "24l01.h" +#include "spi_hal.h" + + +uchar Recv_Buf[32] = {0}; +uchar Send_Buf[32] = {0}; +char rfch = 45; +unsigned short RxCnt = 0; +unsigned char TxAddr[]={0x11,0x22,0x33,0x44,0x55};//???? +unsigned char RxAddr[]={0x11,0x22,0x33,0x44,0x55};//???? + + + +enum NRF_Mode Curr_Mode = NRF_RX_Mode; +void delay_s() +{ + int z=0; + for(z=0;z<250;z++) + {} +} + +void delay_mss() +{ + int z = 0; + for(z=0;z<5;z++) + { + delay_s(); + } +} +void NRF_Init(void) +{ + +} + +void NRF_SetUpInterrupt(void) +{ + GPIO_SetMode(PB,BIT15,GPIO_MODE_INPUT); + GPIO_EnableInt(PB,15,GPIO_INT_FALLING); + NVIC->ISER[0]|=(0X01<<2); + +} +int gRecvPkg = 0; + + +//½ÓÊÕ»òÕß·¢ËÍÖÐ¶Ï +void EINT0_IRQHandler() +{ + char trycnt = 5; + gRecvPkg ++; + delay_s(); + switch(Curr_Mode){ + //if now in rx mode mean data been receieved + case NRF_RX_Mode: + //PB9 = 0; + while(trycnt > 0) + { + if(NRF24L01_RxPacket(Recv_Buf) == 0) + { + NRFSetTxMode(); + break; + } + trycnt --; + } + //nrf_write(FLUSH_RX,0xff);//Çå³ýRX FIFO¼Ä´æÆ÷ + //PB9 = 1; + + //read the buffer + break; + //if now in tx mode mean data been sent + case NRF_TX_Mode: + break; + + } + PB->INTSRC |= BIT14; + +} + +void RX_Mode(void) +{ + char sta; + sta = nrf_read(STATUS); + nrf_write(W_REGISTER + STATUS,sta); + + nrf_write(FLUSH_TX,0xff); + nrf_write(FLUSH_RX,0xff); + PB13=0; + Curr_Mode = NRF_RX_Mode; + delay_s(); + nrf_writebuf(W_REGISTER + TX_ADDR,(uchar*)TxAddr,5);//дTX½ÚµãµØÖ· + nrf_writebuf(W_REGISTER + RX_ADDR_P0,(uchar*)RxAddr,5); //ÉèÖÃTX½ÚµãµØÖ·,Ö÷ҪΪÁËʹÄÜACK + nrf_write(W_REGISTER + SETUP_RETR,0x11);//ÉèÖÃ×Ô¶¯ÖØ·¢¼ä¸ôʱ¼ä:500us + 86us;×î´ó×Ô¶¯ÖØ·¢´ÎÊý:10´Î + + nrf_write(W_REGISTER + EN_AA, 0x01); // Enable Auto.Ack:Pipe0 + nrf_write(W_REGISTER + EN_RXADDR, 0x01); // Enable Pipe0 + nrf_write(W_REGISTER + RF_CH, rfch); // Select RF channel 40 + nrf_write(W_REGISTER + RX_PW_P0,RX_DATA_WITDH); + //nrf_write(W_REGISTER+FEATURE, 0x20); + nrf_write(W_REGISTER + RF_SETUP, 0x0f); + nrf_write(W_REGISTER + CONFIG, 0x2f); // Set PWR_UP bit, enable CRC(2 bytes) + + delay_s(); + + PB13=1; + +} +void NRFSwitchMode(char mode) +{ + static char ifinit = 0; + + //TX Mode + if(mode == 1) + { + if (0 == ifinit) + { + NRFSetTxMode(); + ifinit = 1; + return; + } + PB9 = 0; + nrf_write(W_REGISTER + STATUS,0xff); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + nrf_write(FLUSH_TX,0); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + nrf_write(W_REGISTER + CONFIG,0xfe); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + delay_s(); + + PB9 = 1; + } + else + { + PB9 = 0; + nrf_write(W_REGISTER+STATUS,0xff); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + nrf_write(FLUSH_TX,0); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + nrf_write(W_REGISTER + CONFIG,0xff); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + delay_s(); + + PB9 = 1; + } +} +void NRFSetTxMode() +{ + char sta; + sta = nrf_read(STATUS); + nrf_write(W_REGISTER + STATUS,sta); + + nrf_write(FLUSH_TX,0xff); + nrf_write(FLUSH_RX,0xff); + PB14 = 0; + Curr_Mode = NRF_TX_Mode; + delay_s(); + nrf_writebuf(W_REGISTER+TX_ADDR,(uchar*)TxAddr,5);//дTX½ÚµãµØÖ· + nrf_writebuf(W_REGISTER+RX_ADDR_P0,(uchar*)RxAddr,5); //ÉèÖÃTX½ÚµãµØÖ·,Ö÷ҪΪÁËʹÄÜACK + + nrf_write(W_REGISTER+EN_AA,0x01); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð + nrf_write(W_REGISTER+EN_RXADDR,0x01); //ʹÄÜͨµÀ0µÄ½ÓÊÕµØÖ· + nrf_write(W_REGISTER+SETUP_RETR,0x1a);//ÉèÖÃ×Ô¶¯ÖØ·¢¼ä¸ôʱ¼ä:500us + 86us;×î´ó×Ô¶¯ÖØ·¢´ÎÊý:10´Î + nrf_write(W_REGISTER+RF_CH,rfch); //ÉèÖÃRFͨµÀΪ40 + nrf_write(W_REGISTER+RF_SETUP,0x0f); //ÉèÖÃTX·¢Éä²ÎÊý,0dbÔöÒæ,2Mbps,µÍÔëÉùÔöÒ濪Æô + nrf_write(W_REGISTER+CONFIG,0x0e); //ÅäÖûù±¾¹¤×÷ģʽµÄ²ÎÊý;PWR_UP,EN_CRC,16BIT_CRC,½ÓÊÕģʽ,¿ªÆôËùÓÐÖÐ¶Ï + delay_s(); + PB14 = 1; +} + +//Æô¶¯NRF24L01·¢ËÍÒ»´ÎÊý¾Ý +//txbuf:´ý·¢ËÍÊý¾ÝÊ×µØÖ· +//·µ»ØÖµ:·¢ËÍÍê³É×´¿ö + +unsigned char NRF24L01_TxPacket(unsigned char *txbuf) +{ + unsigned char sta; + PB9=0; + delay_s(); + nrf_writebuf(W_TX_PAYLOAD,txbuf,TX_DATA_WITDH);//дÊý¾Ýµ½TX BUF 32¸ö×Ö½Ú + PB9=1; + sta=nrf_read(STATUS); //¶Áȡ״̬¼Ä´æÆ÷µÄÖµ + nrf_write(W_REGISTER+STATUS,sta); //Çå³ýTX_DS»òMAX_RTÖжϱêÖ¾ + if(sta&0x10)//´ïµ½×î´óÖØ·¢´ÎÊý + { + nrf_wf(FLUSH_TX);//Çå³ýTX FIFO¼Ä´æÆ÷ + nrf_write(W_REGISTER+STATUS,sta); //Çå³ýTX_DS»òMAX_RTÖжϱêÖ¾ + sta=nrf_read(STATUS); //¶Áȡ״̬¼Ä´æÆ÷µÄÖµ + + return 0x10; + } + if(sta&0x20)//·¢ËÍÍê³É + { + return 0; + } + return 0xff;//ÆäËûÔ­Òò·¢ËÍʧ°Ü +} + +unsigned char NrfDump() +{ + char ret = 0; + ret=nrf_read(EN_AA); + delay_s(); + ret=nrf_read(EN_RXADDR); + delay_s(); + ret=nrf_read(RF_CH); + delay_s(); + ret=nrf_read(RX_PW_P0); + delay_s(); + ret=nrf_read(RF_SETUP); + delay_s(); + ret=nrf_read(CONFIG); + delay_s(); + ret=nrf_read(CD); + delay_s(); + ret=nrf_read(STATUS); + delay_s(); + return ret; +} + +unsigned char NRF24L01_Read_Buf(unsigned char reg,unsigned char *pBuf,unsigned char len) +{ + unsigned char status,u8_ctr; + spi_enable(); + status=spi_send(reg); + for(u8_ctr=0;u8_ctr + + + + + + + + diff --git a/roboticarm_controller/Listings/roboticarm_controller.map b/roboticarm_controller/Listings/roboticarm_controller.map new file mode 100644 index 0000000..28f1d6d --- /dev/null +++ b/roboticarm_controller/Listings/roboticarm_controller.map @@ -0,0 +1,1206 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.NRF24L01Init) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock + main.o(i.NRF24L01Init) refers to sys.o(i.SYS_ResetModule) for SYS_ResetModule + main.o(i.NRF24L01Init) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock + main.o(i.PWMInit) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock + main.o(i.PWMInit) refers to sys.o(i.SYS_ResetModule) for SYS_ResetModule + main.o(i.PWMInit) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock + main.o(i.PWMInit) refers to pwm.o(i.PWM_ConfigOutputChannel) for PWM_ConfigOutputChannel + main.o(i.PWMInit) refers to pwm.o(i.PWM_EnableOutput) for PWM_EnableOutput + main.o(i.PWMInit) refers to pwm.o(i.PWM_EnablePeriodInt) for PWM_EnablePeriodInt + main.o(i.PWMInit) refers to main.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + main.o(i.PWMInit) refers to pwm.o(i.PWM_Start) for PWM_Start + main.o(i.ParsePackage) refers to main.o(.data) for Axis1 + main.o(i.main) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.main) refers to gpio.o(i.GPIO_SetMode) for GPIO_SetMode + main.o(i.main) refers to spi_hal.o(i.Spi_init) for Spi_init + main.o(i.main) refers to 24l01.o(i.RX_Mode) for RX_Mode + main.o(i.main) refers to main.o(i.PWMInit) for PWMInit + main.o(i.main) refers to 24l01.o(i.NRF24L01_RxPacket) for NRF24L01_RxPacket + main.o(i.main) refers to main.o(i.ParsePackage) for ParsePackage + 24l01.o(i.EINT0_IRQHandler) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.EINT0_IRQHandler) refers to 24l01.o(i.NRF24L01_RxPacket) for NRF24L01_RxPacket + 24l01.o(i.EINT0_IRQHandler) refers to 24l01.o(i.NRFSetTxMode) for NRFSetTxMode + 24l01.o(i.EINT0_IRQHandler) refers to 24l01.o(.data) for gRecvPkg + 24l01.o(i.EINT0_IRQHandler) refers to 24l01.o(.bss) for Recv_Buf + 24l01.o(i.NRF24L01_CD_Detect) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NRF24L01_Monitor) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NRF24L01_Monitor) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.NRF24L01_Read_Buf) refers to spi_hal.o(i.spi_enable) for spi_enable + 24l01.o(i.NRF24L01_Read_Buf) refers to spi_hal.o(i.spi_send) for spi_send + 24l01.o(i.NRF24L01_Read_Buf) refers to spi_hal.o(i.spi_read) for spi_read + 24l01.o(i.NRF24L01_Read_Buf) refers to spi_hal.o(i.spi_disable) for spi_disable + 24l01.o(i.NRF24L01_RxPacket) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NRF24L01_RxPacket) refers to 24l01.o(i.NRF24L01_Read_Buf) for NRF24L01_Read_Buf + 24l01.o(i.NRF24L01_RxPacket) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.NRF24L01_RxPacket) refers to 24l01.o(.data) for RxCnt + 24l01.o(i.NRF24L01_TxPacket) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.NRF24L01_TxPacket) refers to spi_hal.o(i.nrf_writebuf) for nrf_writebuf + 24l01.o(i.NRF24L01_TxPacket) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NRF24L01_TxPacket) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.NRF24L01_TxPacket) refers to spi_hal.o(i.nrf_wf) for nrf_wf + 24l01.o(i.NRFSetTxMode) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NRFSetTxMode) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.NRFSetTxMode) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.NRFSetTxMode) refers to spi_hal.o(i.nrf_writebuf) for nrf_writebuf + 24l01.o(i.NRFSetTxMode) refers to 24l01.o(.data) for Curr_Mode + 24l01.o(i.NRFSwitchMode) refers to 24l01.o(i.NRFSetTxMode) for NRFSetTxMode + 24l01.o(i.NRFSwitchMode) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.NRFSwitchMode) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.NRFSwitchMode) refers to 24l01.o(.data) for ifinit + 24l01.o(i.NRF_SetUpInterrupt) refers to gpio.o(i.GPIO_SetMode) for GPIO_SetMode + 24l01.o(i.NRF_SetUpInterrupt) refers to gpio.o(i.GPIO_EnableInt) for GPIO_EnableInt + 24l01.o(i.NrfDump) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.NrfDump) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.RX_Mode) refers to spi_hal.o(i.nrf_read) for nrf_read + 24l01.o(i.RX_Mode) refers to spi_hal.o(i.nrf_write) for nrf_write + 24l01.o(i.RX_Mode) refers to 24l01.o(i.delay_s) for delay_s + 24l01.o(i.RX_Mode) refers to spi_hal.o(i.nrf_writebuf) for nrf_writebuf + 24l01.o(i.RX_Mode) refers to 24l01.o(.data) for Curr_Mode + 24l01.o(i.delay_mss) refers to 24l01.o(i.delay_s) for delay_s + spi_hal.o(i.NRFWriteTxDate) refers to spi_hal.o(i.spi_send) for spi_send + spi_hal.o(i.Spi_init) refers to gpio.o(i.GPIO_SetMode) for GPIO_SetMode + spi_hal.o(i.Spi_init) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock + spi_hal.o(i.Spi_init) refers to sys.o(i.SYS_ResetModule) for SYS_ResetModule + spi_hal.o(i.Spi_init) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock + spi_hal.o(i.Spi_init) refers to spi.o(i.SPI_Open) for SPI_Open + spi_hal.o(i.Spi_init) refers to spi.o(i.SPI_DisableAutoSS) for SPI_DisableAutoSS + spi_hal.o(i.nrf_read) refers to spi_hal.o(i.spi_enable) for spi_enable + spi_hal.o(i.nrf_read) refers to spi_hal.o(i.spi_send) for spi_send + spi_hal.o(i.nrf_read) refers to spi_hal.o(i.spi_read) for spi_read + spi_hal.o(i.nrf_read) refers to spi_hal.o(i.spi_disable) for spi_disable + spi_hal.o(i.nrf_wf) refers to spi_hal.o(i.spi_enable) for spi_enable + spi_hal.o(i.nrf_wf) refers to spi_hal.o(i.spi_send) for spi_send + spi_hal.o(i.nrf_wf) refers to spi_hal.o(i.spi_disable) for spi_disable + spi_hal.o(i.nrf_write) refers to spi_hal.o(i.spi_enable) for spi_enable + spi_hal.o(i.nrf_write) refers to spi_hal.o(i.spi_send) for spi_send + spi_hal.o(i.nrf_write) refers to spi_hal.o(i.spi_disable) for spi_disable + spi_hal.o(i.nrf_writebuf) refers to spi_hal.o(i.spi_enable) for spi_enable + spi_hal.o(i.nrf_writebuf) refers to spi_hal.o(i.spi_send) for spi_send + spi_hal.o(i.nrf_writebuf) refers to spi_hal.o(i.spi_disable) for spi_disable + spi_hal.o(i.spi_disable) refers to spi_hal.o(i.delayAny) for delayAny + spi_hal.o(i.spi_enable) refers to spi_hal.o(i.delayAny) for delayAny + interrupt.o(i.PWM0P0_IRQHandler) refers to pwm.o(i.PWM_EnableOutput) for PWM_EnableOutput + interrupt.o(i.PWM0P0_IRQHandler) refers to pwm.o(i.PWM_DisableOutput) for PWM_DisableOutput + interrupt.o(i.PWM0P0_IRQHandler) refers to pwm.o(i.PWM_ClearPeriodIntFlag) for PWM_ClearPeriodIntFlag + interrupt.o(i.PWM0P0_IRQHandler) refers to main.o(.data) for Axis1 + interrupt.o(i.PWM1P0_IRQHandler) refers to pwm.o(i.PWM_EnableOutput) for PWM_EnableOutput + interrupt.o(i.PWM1P0_IRQHandler) refers to pwm.o(i.PWM_DisableOutput) for PWM_DisableOutput + interrupt.o(i.PWM1P0_IRQHandler) refers to pwm.o(i.PWM_ClearPeriodIntFlag) for PWM_ClearPeriodIntFlag + interrupt.o(i.PWM1P0_IRQHandler) refers to main.o(.data) for Axis5 + clk.o(i.CLK_DisableCKO) refers to clk.o(i.CLK_DisableModuleClock) for CLK_DisableModuleClock + clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock + clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock + clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_DisablePLL) for CLK_DisablePLL + clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady + clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + clk.o(i.CLK_GetCPUFreq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + clk.o(i.CLK_GetCPUFreq) refers to system_m451series.o(.data) for SystemCoreClock + clk.o(i.CLK_GetHCLKFreq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + clk.o(i.CLK_GetHCLKFreq) refers to system_m451series.o(.data) for SystemCoreClock + clk.o(i.CLK_GetPCLK0Freq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + clk.o(i.CLK_GetPCLK0Freq) refers to system_m451series.o(.data) for SystemCoreClock + clk.o(i.CLK_GetPCLK1Freq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + clk.o(i.CLK_GetPCLK1Freq) refers to system_m451series.o(.data) for SystemCoreClock + clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady + clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_EnablePLL) for CLK_EnablePLL + clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_SetHCLK) for CLK_SetHCLK + clk.o(i.CLK_SetHCLK) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady + clk.o(i.CLK_SetHCLK) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + pwm.o(i.PWM_ConfigCaptureChannel) refers to pwm.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + pwm.o(i.PWM_ConfigCaptureChannel) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + pwm.o(i.PWM_ConfigCaptureChannel) refers to system_m451series.o(.data) for SystemCoreClock + pwm.o(i.PWM_ConfigOutputChannel) refers to pwm.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + pwm.o(i.PWM_ConfigOutputChannel) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate + pwm.o(i.PWM_ConfigOutputChannel) refers to system_m451series.o(.data) for SystemCoreClock + spi.o(i.I2S_EnableMCLK) refers to spi.o(i.I2S_GetSourceClockFreq) for I2S_GetSourceClockFreq + spi.o(i.I2S_GetSourceClockFreq) refers to spi.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + spi.o(i.I2S_GetSourceClockFreq) refers to clk.o(i.CLK_GetHCLKFreq) for CLK_GetHCLKFreq + spi.o(i.I2S_Open) refers to spi.o(i.I2S_GetSourceClockFreq) for I2S_GetSourceClockFreq + spi.o(i.I2S_Open) refers to clk.o(i.CLK_GetHCLKFreq) for CLK_GetHCLKFreq + spi.o(i.SPI_GetBusClock) refers to clk.o(i.CLK_GetHCLKFreq) for CLK_GetHCLKFreq + spi.o(i.SPI_GetBusClock) refers to spi.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + spi.o(i.SPI_Open) refers to clk.o(i.CLK_GetHCLKFreq) for CLK_GetHCLKFreq + spi.o(i.SPI_Open) refers to spi.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + spi.o(i.SPI_SetBusClock) refers to clk.o(i.CLK_GetHCLKFreq) for CLK_GetHCLKFreq + spi.o(i.SPI_SetBusClock) refers to spi.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + retarget.o(.emb_text) refers to retarget.o(i.Hard_Fault_Handler) for Hard_Fault_Handler + retarget.o(i.Hard_Fault_Handler) refers to noretval__2printf.o(.text) for __2printf + retarget.o(i.Hard_Fault_Handler) refers to retarget.o(i.stackDump) for stackDump + retarget.o(i.SendChar) refers to retarget.o(i.SendChar_ToUART) for SendChar_ToUART + retarget.o(i._ttywrch) refers to retarget.o(i.SendChar) for SendChar + retarget.o(i.fgetc) refers to retarget.o(i.GetChar) for GetChar + retarget.o(i.fputc) refers to retarget.o(i.SendChar) for SendChar + retarget.o(i.stackDump) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + retarget.o(i.stackDump) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x + retarget.o(i.stackDump) refers to _printf_hex_int.o(.text) for _printf_longlong_hex + retarget.o(i.stackDump) refers to noretval__2printf.o(.text) for __2printf + startup_m451series.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_m451series.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_m451series.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_m451series.o(RESET) refers to startup_m451series.o(STACK) for __initial_sp + startup_m451series.o(RESET) refers to startup_m451series.o(.text) for Reset_Handler + startup_m451series.o(RESET) refers to retarget.o(.emb_text) for HardFault_Handler + startup_m451series.o(RESET) refers to 24l01.o(i.EINT0_IRQHandler) for EINT0_IRQHandler + startup_m451series.o(RESET) refers to interrupt.o(i.PWM0P0_IRQHandler) for PWM0P0_IRQHandler + startup_m451series.o(RESET) refers to interrupt.o(i.PWM1P0_IRQHandler) for PWM1P0_IRQHandler + startup_m451series.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_m451series.o(.text) refers to system_m451series.o(i.SystemInit) for SystemInit + startup_m451series.o(.text) refers to __main.o(!!!main) for __main + startup_m451series.o(.text) refers to startup_m451series.o(HEAP) for Heap_Mem + startup_m451series.o(.text) refers to startup_m451series.o(STACK) for Stack_Mem + system_m451series.o(i.SystemCoreClockUpdate) refers to system_m451series.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq + system_m451series.o(i.SystemCoreClockUpdate) refers to system_m451series.o(.data) for PllClock + __2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file + __2printf.o(.text) refers to retarget.o(.data) for __stdout + noretval__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file + noretval__2printf.o(.text) refers to retarget.o(.data) for __stdout + __printf.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + _printf_hex_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ll.o(.text) refers to _printf_hex_ll.o(.constdata) for .constdata + _printf_hex_int.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int.o(.text) refers to _printf_hex_int.o(.constdata) for .constdata + _printf_hex_int_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ll.o(.text) refers to _printf_hex_int_ll.o(.constdata) for .constdata + _printf_hex_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ptr.o(.text) refers to _printf_hex_ptr.o(.constdata) for .constdata + _printf_hex_int_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ptr.o(.text) refers to _printf_hex_int_ptr.o(.constdata) for .constdata + _printf_hex_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ll_ptr.o(.text) refers to _printf_hex_ll_ptr.o(.constdata) for .constdata + _printf_hex_int_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ll_ptr.o(.text) refers to _printf_hex_int_ll_ptr.o(.constdata) for .constdata + __printf_flags.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags.o(.text) refers to __printf_flags.o(.constdata) for .constdata + __printf_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss.o(.text) refers to __printf_flags_ss.o(.constdata) for .constdata + __printf_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_flags_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_wp.o(.text) refers to __printf_flags_wp.o(.constdata) for .constdata + __printf_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_flags_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss_wp.o(.text) refers to __printf_flags_ss_wp.o(.constdata) for .constdata + _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) refers (Weak) to _printf_hex_int.o(.text) for _printf_int_hex + _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) refers (Special) to _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) for _printf_percent_end + __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh + _printf_char_file.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common + _printf_char_file.o(.text) refers to retarget.o(i.ferror) for ferror + _printf_char_file.o(.text) refers to retarget.o(i.fputc) for fputc + __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D + __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap + __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 + _printf_char_common.o(.text) refers to __printf_wp.o(.text) for __printf + sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace + sys_stackheap_outer.o(.text) refers to startup_m451series.o(.text) for __user_initial_stackheap + exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000001) for __rt_lib_init_fp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1 + libspace.o(.text) refers to libspace.o(.bss) for __libspace_start + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 + libinit2.o(.ARM.Collect$$libinit$$00000001) refers to fpinit.o(x$fpl$fpinit) for _fp_init + libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown + rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 + argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv + sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard + _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM + _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1 + sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + rt_raise.o(.text) refers to __raise.o(.text) for __raise + rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler + defsig_general.o(.text) refers to retarget.o(i._ttywrch) for _ttywrch + defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing main.o(.rrx_text), (6 bytes). + Removing main.o(i.NRF24L01Init), (84 bytes). + Removing main.o(i.delay_1s), (44 bytes). + Removing 24l01.o(.rev16_text), (4 bytes). + Removing 24l01.o(.revsh_text), (4 bytes). + Removing 24l01.o(.rrx_text), (6 bytes). + Removing 24l01.o(i.NRF24L01_CD_Detect), (40 bytes). + Removing 24l01.o(i.NRF24L01_Monitor), (42 bytes). + Removing 24l01.o(i.NRF24L01_TxPacket), (96 bytes). + Removing 24l01.o(i.NRFSwitchMode), (120 bytes). + Removing 24l01.o(i.NRF_Init), (2 bytes). + Removing 24l01.o(i.NRF_SetUpInterrupt), (52 bytes). + Removing 24l01.o(i.NrfDump), (104 bytes). + Removing 24l01.o(i.delay_mss), (20 bytes). + Removing spi_hal.o(.rev16_text), (4 bytes). + Removing spi_hal.o(.revsh_text), (4 bytes). + Removing spi_hal.o(.rrx_text), (6 bytes). + Removing spi_hal.o(i.NRFWriteTxDate), (38 bytes). + Removing spi_hal.o(i.nrf_wf), (22 bytes). + Removing interrupt.o(.rev16_text), (4 bytes). + Removing interrupt.o(.revsh_text), (4 bytes). + Removing interrupt.o(.rrx_text), (6 bytes). + Removing interrupt.o(.data), (4 bytes). + Removing clk.o(.rev16_text), (4 bytes). + Removing clk.o(.revsh_text), (4 bytes). + Removing clk.o(.rrx_text), (6 bytes). + Removing clk.o(i.CLK_DisableCKO), (16 bytes). + Removing clk.o(i.CLK_DisableModuleClock), (44 bytes). + Removing clk.o(i.CLK_DisablePLL), (24 bytes). + Removing clk.o(i.CLK_DisableSysTick), (10 bytes). + Removing clk.o(i.CLK_DisableXtalRC), (20 bytes). + Removing clk.o(i.CLK_EnableCKO), (48 bytes). + Removing clk.o(i.CLK_EnablePLL), (376 bytes). + Removing clk.o(i.CLK_EnableSysTick), (72 bytes). + Removing clk.o(i.CLK_EnableXtalRC), (20 bytes). + Removing clk.o(i.CLK_GetCPUFreq), (16 bytes). + Removing clk.o(i.CLK_GetHXTFreq), (28 bytes). + Removing clk.o(i.CLK_GetLXTFreq), (24 bytes). + Removing clk.o(i.CLK_GetPCLK0Freq), (40 bytes). + Removing clk.o(i.CLK_GetPCLK1Freq), (40 bytes). + Removing clk.o(i.CLK_GetPLLClockFreq), (100 bytes). + Removing clk.o(i.CLK_Idle), (40 bytes). + Removing clk.o(i.CLK_PowerDown), (40 bytes). + Removing clk.o(i.CLK_SetCoreClock), (176 bytes). + Removing clk.o(i.CLK_SetHCLK), (124 bytes). + Removing clk.o(i.CLK_SetSysTickClockSrc), (24 bytes). + Removing clk.o(i.CLK_WaitClockReady), (40 bytes). + Removing gpio.o(.rev16_text), (4 bytes). + Removing gpio.o(.revsh_text), (4 bytes). + Removing gpio.o(.rrx_text), (6 bytes). + Removing gpio.o(i.GPIO_DisableInt), (24 bytes). + Removing gpio.o(i.GPIO_EnableInt), (26 bytes). + Removing pwm.o(.rev16_text), (4 bytes). + Removing pwm.o(.revsh_text), (4 bytes). + Removing pwm.o(.rrx_text), (6 bytes). + Removing pwm.o(i.PWM_ClearADCTriggerFlag), (12 bytes). + Removing pwm.o(i.PWM_ClearAccInt), (14 bytes). + Removing pwm.o(i.PWM_ClearCaptureIntFlag), (10 bytes). + Removing pwm.o(i.PWM_ClearDACTriggerFlag), (10 bytes). + Removing pwm.o(i.PWM_ClearDutyIntFlag), (16 bytes). + Removing pwm.o(i.PWM_ClearFTDutyIntFlag), (14 bytes). + Removing pwm.o(i.PWM_ClearFaultBrakeIntFlag), (10 bytes). + Removing pwm.o(i.PWM_ClearWrapAroundFlag), (10 bytes). + Removing pwm.o(i.PWM_ClearZeroIntFlag), (10 bytes). + Removing pwm.o(i.PWM_ConfigCaptureChannel), (204 bytes). + Removing pwm.o(i.PWM_ConfigSyncPhase), (54 bytes). + Removing pwm.o(i.PWM_DisableADCTrigger), (44 bytes). + Removing pwm.o(i.PWM_DisableAcc), (22 bytes). + Removing pwm.o(i.PWM_DisableAccInt), (22 bytes). + Removing pwm.o(i.PWM_DisableBrakeNoiseFilter), (20 bytes). + Removing pwm.o(i.PWM_DisableBrakePinInverse), (20 bytes). + Removing pwm.o(i.PWM_DisableCapture), (22 bytes). + Removing pwm.o(i.PWM_DisableCaptureInt), (18 bytes). + Removing pwm.o(i.PWM_DisableDACTrigger), (18 bytes). + Removing pwm.o(i.PWM_DisableDeadZone), (28 bytes). + Removing pwm.o(i.PWM_DisableDutyInt), (20 bytes). + Removing pwm.o(i.PWM_DisableFaultBrakeInt), (16 bytes). + Removing pwm.o(i.PWM_DisableLoadMode), (14 bytes). + Removing pwm.o(i.PWM_DisablePDMA), (22 bytes). + Removing pwm.o(i.PWM_DisablePeriodInt), (18 bytes). + Removing pwm.o(i.PWM_DisableSyncNoiseFilter), (10 bytes). + Removing pwm.o(i.PWM_DisableSyncPhase), (36 bytes). + Removing pwm.o(i.PWM_DisableSyncPinInverse), (10 bytes). + Removing pwm.o(i.PWM_DisableZeroInt), (16 bytes). + Removing pwm.o(i.PWM_EnableADCTrigger), (74 bytes). + Removing pwm.o(i.PWM_EnableAcc), (38 bytes). + Removing pwm.o(i.PWM_EnableAccInt), (22 bytes). + Removing pwm.o(i.PWM_EnableBrakeNoiseFilter), (34 bytes). + Removing pwm.o(i.PWM_EnableBrakePinInverse), (20 bytes). + Removing pwm.o(i.PWM_EnableCapture), (22 bytes). + Removing pwm.o(i.PWM_EnableCaptureInt), (18 bytes). + Removing pwm.o(i.PWM_EnableDACTrigger), (18 bytes). + Removing pwm.o(i.PWM_EnableDeadZone), (50 bytes). + Removing pwm.o(i.PWM_EnableDutyInt), (18 bytes). + Removing pwm.o(i.PWM_EnableFaultBrake), (338 bytes). + Removing pwm.o(i.PWM_EnableFaultBrakeInt), (16 bytes). + Removing pwm.o(i.PWM_EnableLoadMode), (14 bytes). + Removing pwm.o(i.PWM_EnablePDMA), (46 bytes). + Removing pwm.o(i.PWM_EnableSyncNoiseFilter), (24 bytes). + Removing pwm.o(i.PWM_EnableSyncPhase), (36 bytes). + Removing pwm.o(i.PWM_EnableSyncPinInverse), (10 bytes). + Removing pwm.o(i.PWM_EnableZeroInt), (16 bytes). + Removing pwm.o(i.PWM_ForceStop), (8 bytes). + Removing pwm.o(i.PWM_GetADCTriggerFlag), (24 bytes). + Removing pwm.o(i.PWM_GetAccInt), (28 bytes). + Removing pwm.o(i.PWM_GetCaptureIntFlag), (48 bytes). + Removing pwm.o(i.PWM_GetDACTriggerFlag), (12 bytes). + Removing pwm.o(i.PWM_GetDutyIntFlag), (28 bytes). + Removing pwm.o(i.PWM_GetFTDutyIntFlag), (28 bytes). + Removing pwm.o(i.PWM_GetFaultBrakeIntFlag), (22 bytes). + Removing pwm.o(i.PWM_GetPeriodIntFlag), (24 bytes). + Removing pwm.o(i.PWM_GetWrapAroundFlag), (22 bytes). + Removing pwm.o(i.PWM_GetZeroIntFlag), (22 bytes). + Removing pwm.o(i.PWM_SetBrakePinSource), (34 bytes). + Removing pwm.o(i.PWM_SetClockSource), (28 bytes). + Removing pwm.o(i.PWM_Stop), (34 bytes). + Removing spi.o(.rev16_text), (4 bytes). + Removing spi.o(.revsh_text), (4 bytes). + Removing spi.o(.rrx_text), (6 bytes). + Removing spi.o(i.I2S_Close), (10 bytes). + Removing spi.o(i.I2S_DisableInt), (112 bytes). + Removing spi.o(i.I2S_DisableMCLK), (10 bytes). + Removing spi.o(i.I2S_EnableInt), (112 bytes). + Removing spi.o(i.I2S_EnableMCLK), (70 bytes). + Removing spi.o(i.I2S_GetSourceClockFreq), (184 bytes). + Removing spi.o(i.I2S_Open), (296 bytes). + Removing spi.o(i.I2S_SetFIFO), (18 bytes). + Removing spi.o(i.SPI_ClearIntFlag), (98 bytes). + Removing spi.o(i.SPI_ClearRxFIFO), (10 bytes). + Removing spi.o(i.SPI_ClearTxFIFO), (10 bytes). + Removing spi.o(i.SPI_Close), (100 bytes). + Removing spi.o(i.SPI_DisableInt), (182 bytes). + Removing spi.o(i.SPI_EnableAutoSS), (22 bytes). + Removing spi.o(i.SPI_EnableInt), (182 bytes). + Removing spi.o(i.SPI_GetBusClock), (272 bytes). + Removing spi.o(i.SPI_GetIntFlag), (204 bytes). + Removing spi.o(i.SPI_GetStatus), (150 bytes). + Removing spi.o(i.SPI_SetBusClock), (444 bytes). + Removing spi.o(i.SPI_SetFIFO), (18 bytes). + Removing sys.o(.rev16_text), (4 bytes). + Removing sys.o(.revsh_text), (4 bytes). + Removing sys.o(.rrx_text), (6 bytes). + Removing sys.o(i.SYS_ClearResetSrc), (16 bytes). + Removing sys.o(i.SYS_DisableBOD), (18 bytes). + Removing sys.o(i.SYS_EnableBOD), (42 bytes). + Removing sys.o(i.SYS_GetBODStatus), (12 bytes). + Removing sys.o(i.SYS_GetResetSrc), (8 bytes). + Removing sys.o(i.SYS_IsRegLocked), (20 bytes). + Removing sys.o(i.SYS_ReadPDID), (8 bytes). + Removing sys.o(i.SYS_ResetCPU), (18 bytes). + Removing sys.o(i.SYS_ResetChip), (18 bytes). + Removing retarget.o(.rev16_text), (4 bytes). + Removing retarget.o(.revsh_text), (4 bytes). + Removing retarget.o(.rrx_text), (6 bytes). + Removing retarget.o(i.GetChar), (28 bytes). + Removing retarget.o(i.IsDebugFifoEmpty), (16 bytes). + Removing retarget.o(i._ttywrch), (12 bytes). + Removing retarget.o(i.fgetc), (10 bytes). + Removing retarget.o(i.kbhit), (16 bytes). + Removing system_m451series.o(.rev16_text), (4 bytes). + Removing system_m451series.o(.revsh_text), (4 bytes). + Removing system_m451series.o(.rrx_text), (6 bytes). + +164 unused section(s) (total 6856 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + RESET 0x00000000 Section 320 startup_m451series.o(RESET) + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE + ../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE + ../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE + ../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE + ../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE + ../clib/memcpset.s 0x00000000 Number 0 rt_memclr_w.o ABSOLUTE + ../clib/misc.s 0x00000000 Number 0 printf_stubs.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ll_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 noretval__2printf.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_ss.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_ss_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __2printf.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_char_common.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_nopercent.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_intcommon.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_char_file.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent_end.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_x.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_segv_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_formal.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_pvfn_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_stak_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_cppl_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtred_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_outer.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_abrt_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_other.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_general.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_exit.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 __raise.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_inner.o ABSOLUTE + ../clib/signal.s 0x00000000 Number 0 defsig.o ABSOLUTE + ../clib/stdlib.c 0x00000000 Number 0 exit.o ABSOLUTE + ../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE + 24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE + 24l01.c 0x00000000 Number 0 24l01.o ABSOLUTE + D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\clk.c 0x00000000 Number 0 clk.o ABSOLUTE + D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE + D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE + D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\spi.c 0x00000000 Number 0 spi.o ABSOLUTE + D:\\programs\\mdk\\ARM\\PACK\\Nuvoton\\NuMicro_DFP\\1.2.0\\Device\\M451\\Driver\\sys.c 0x00000000 Number 0 sys.o ABSOLUTE + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\clk.c 0x00000000 Number 0 clk.o ABSOLUTE + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\gpio.c 0x00000000 Number 0 gpio.o ABSOLUTE + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\pwm.c 0x00000000 Number 0 pwm.o ABSOLUTE + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\spi.c 0x00000000 Number 0 spi.o ABSOLUTE + D:\programs\mdk\ARM\PACK\Nuvoton\NuMicro_DFP\1.2.0\Device\M451\Driver\sys.c 0x00000000 Number 0 sys.o ABSOLUTE + RTE\Device\M453VG6AE\retarget.c 0x00000000 Number 0 retarget.o ABSOLUTE + RTE\Device\M453VG6AE\startup_M451Series.s 0x00000000 Number 0 startup_m451series.o ABSOLUTE + RTE\Device\M453VG6AE\system_M451Series.c 0x00000000 Number 0 system_m451series.o ABSOLUTE + RTE\\Device\\M453VG6AE\\retarget.c 0x00000000 Number 0 retarget.o ABSOLUTE + RTE\\Device\\M453VG6AE\\system_M451Series.c 0x00000000 Number 0 system_m451series.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + interrupt.c 0x00000000 Number 0 interrupt.o ABSOLUTE + interrupt.c 0x00000000 Number 0 interrupt.o ABSOLUTE + main.c 0x00000000 Number 0 main.o ABSOLUTE + main.c 0x00000000 Number 0 main.o ABSOLUTE + spi_hal.c 0x00000000 Number 0 spi_hal.o ABSOLUTE + spi_hal.c 0x00000000 Number 0 spi_hal.o ABSOLUTE + !!!main 0x00000140 Section 8 __main.o(!!!main) + !!!scatter 0x00000148 Section 52 __scatter.o(!!!scatter) + !!handler_copy 0x0000017c Section 26 __scatter_copy.o(!!handler_copy) + !!handler_zi 0x00000198 Section 28 __scatter_zi.o(!!handler_zi) + .ARM.Collect$$_printf_percent$$00000000 0x000001b4 Section 0 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) + .ARM.Collect$$_printf_percent$$0000000C 0x000001b4 Section 6 _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) + .ARM.Collect$$_printf_percent$$00000017 0x000001ba Section 4 _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) + .ARM.Collect$$libinit$$00000000 0x000001be Section 2 libinit.o(.ARM.Collect$$libinit$$00000000) + .ARM.Collect$$libinit$$00000001 0x000001c0 Section 4 libinit2.o(.ARM.Collect$$libinit$$00000001) + .ARM.Collect$$libinit$$00000004 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + .ARM.Collect$$libinit$$0000000A 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) + .ARM.Collect$$libinit$$0000000C 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + .ARM.Collect$$libinit$$0000000E 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + .ARM.Collect$$libinit$$00000011 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000011) + .ARM.Collect$$libinit$$00000013 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + .ARM.Collect$$libinit$$00000015 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + .ARM.Collect$$libinit$$00000017 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + .ARM.Collect$$libinit$$00000019 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + .ARM.Collect$$libinit$$0000001B 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + .ARM.Collect$$libinit$$0000001D 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + .ARM.Collect$$libinit$$0000001F 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + .ARM.Collect$$libinit$$00000021 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + .ARM.Collect$$libinit$$00000023 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + .ARM.Collect$$libinit$$00000025 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + .ARM.Collect$$libinit$$0000002C 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) + .ARM.Collect$$libinit$$0000002E 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + .ARM.Collect$$libinit$$00000030 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + .ARM.Collect$$libinit$$00000032 0x000001c4 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + .ARM.Collect$$libinit$$00000033 0x000001c4 Section 2 libinit2.o(.ARM.Collect$$libinit$$00000033) + .ARM.Collect$$libshutdown$$00000000 0x000001c6 Section 2 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + .ARM.Collect$$libshutdown$$00000002 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + .ARM.Collect$$libshutdown$$00000004 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + .ARM.Collect$$libshutdown$$00000007 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + .ARM.Collect$$libshutdown$$0000000A 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + .ARM.Collect$$libshutdown$$0000000C 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + .ARM.Collect$$libshutdown$$0000000F 0x000001c8 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + .ARM.Collect$$libshutdown$$00000010 0x000001c8 Section 2 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + .ARM.Collect$$rtentry$$00000000 0x000001ca Section 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + .ARM.Collect$$rtentry$$00000002 0x000001ca Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + .ARM.Collect$$rtentry$$00000004 0x000001ca Section 6 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + .ARM.Collect$$rtentry$$00000009 0x000001d0 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) + .ARM.Collect$$rtentry$$0000000A 0x000001d0 Section 4 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + .ARM.Collect$$rtentry$$0000000C 0x000001d4 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) + .ARM.Collect$$rtentry$$0000000D 0x000001d4 Section 8 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) + .ARM.Collect$$rtexit$$00000000 0x000001dc Section 2 rtexit.o(.ARM.Collect$$rtexit$$00000000) + .ARM.Collect$$rtexit$$00000002 0x000001de Section 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) + .ARM.Collect$$rtexit$$00000003 0x000001de Section 4 rtexit2.o(.ARM.Collect$$rtexit$$00000003) + .ARM.Collect$$rtexit$$00000004 0x000001e2 Section 6 rtexit2.o(.ARM.Collect$$rtexit$$00000004) + .emb_text 0x000001e8 Section 28 retarget.o(.emb_text) + $v0 0x000001e8 Number 0 retarget.o(.emb_text) + .text 0x00000204 Section 116 startup_m451series.o(.text) + $v0 0x00000204 Number 0 startup_m451series.o(.text) + Default_Handler 0x00000249 Thumb Code 2 startup_m451series.o(.text) + .text 0x00000278 Section 0 noretval__2printf.o(.text) + .text 0x00000290 Section 0 _printf_hex_int.o(.text) + .text 0x000002e8 Section 0 __printf_wp.o(.text) + .text 0x000003f6 Section 78 rt_memclr_w.o(.text) + .text 0x00000444 Section 0 heapauxi.o(.text) + .text 0x0000044a Section 0 _printf_intcommon.o(.text) + .text 0x000004fc Section 0 _printf_char_file.o(.text) + .text 0x00000520 Section 0 _printf_char_common.o(.text) + _printf_input_char 0x00000521 Thumb Code 10 _printf_char_common.o(.text) + .text 0x00000550 Section 74 sys_stackheap_outer.o(.text) + .text 0x0000059a Section 0 exit.o(.text) + .text 0x000005ac Section 8 libspace.o(.text) + .text 0x000005b4 Section 0 sys_exit.o(.text) + .text 0x000005c0 Section 2 use_no_semi.o(.text) + .text 0x000005c2 Section 0 indicate_semi.o(.text) + i.CLK_EnableModuleClock 0x000005c2 Section 0 clk.o(i.CLK_EnableModuleClock) + i.CLK_GetHCLKFreq 0x000005f0 Section 0 clk.o(i.CLK_GetHCLKFreq) + i.CLK_GetPLLClockFreq 0x00000600 Section 0 pwm.o(i.CLK_GetPLLClockFreq) + CLK_GetPLLClockFreq 0x00000601 Thumb Code 84 pwm.o(i.CLK_GetPLLClockFreq) + i.CLK_GetPLLClockFreq 0x00000664 Section 0 spi.o(i.CLK_GetPLLClockFreq) + CLK_GetPLLClockFreq 0x00000665 Thumb Code 84 spi.o(i.CLK_GetPLLClockFreq) + i.CLK_GetPLLClockFreq 0x000006c8 Section 0 system_m451series.o(i.CLK_GetPLLClockFreq) + CLK_GetPLLClockFreq 0x000006c9 Thumb Code 84 system_m451series.o(i.CLK_GetPLLClockFreq) + i.CLK_SetModuleClock 0x0000072c Section 0 clk.o(i.CLK_SetModuleClock) + i.EINT0_IRQHandler 0x00000780 Section 0 24l01.o(i.EINT0_IRQHandler) + i.GPIO_SetMode 0x000007e0 Section 0 gpio.o(i.GPIO_SetMode) + i.Hard_Fault_Handler 0x0000080c Section 0 retarget.o(i.Hard_Fault_Handler) + __tagsym$$used 0x0000080d Number 0 retarget.o(i.Hard_Fault_Handler) + i.NRF24L01_Read_Buf 0x00000838 Section 0 24l01.o(i.NRF24L01_Read_Buf) + i.NRF24L01_RxPacket 0x0000086c Section 0 24l01.o(i.NRF24L01_RxPacket) + i.NRFSetTxMode 0x000008b4 Section 0 24l01.o(i.NRFSetTxMode) + i.PWM0P0_IRQHandler 0x0000094c Section 0 interrupt.o(i.PWM0P0_IRQHandler) + i.PWM1P0_IRQHandler 0x000009cc Section 0 interrupt.o(i.PWM1P0_IRQHandler) + i.PWMInit 0x00000a14 Section 0 main.o(i.PWMInit) + i.PWM_ClearPeriodIntFlag 0x00000b60 Section 0 pwm.o(i.PWM_ClearPeriodIntFlag) + i.PWM_ConfigOutputChannel 0x00000b6c Section 0 pwm.o(i.PWM_ConfigOutputChannel) + i.PWM_DisableOutput 0x00000cdc Section 0 pwm.o(i.PWM_DisableOutput) + i.PWM_EnableOutput 0x00000ce8 Section 0 pwm.o(i.PWM_EnableOutput) + i.PWM_EnablePeriodInt 0x00000cf4 Section 0 pwm.o(i.PWM_EnablePeriodInt) + i.PWM_Start 0x00000d08 Section 0 pwm.o(i.PWM_Start) + i.ParsePackage 0x00000d10 Section 0 main.o(i.ParsePackage) + i.RX_Mode 0x00000d98 Section 0 24l01.o(i.RX_Mode) + i.SPI_DisableAutoSS 0x00000e38 Section 0 spi.o(i.SPI_DisableAutoSS) + i.SPI_Open 0x00000e44 Section 0 spi.o(i.SPI_Open) + i.SYS_ResetModule 0x000010e4 Section 0 sys.o(i.SYS_ResetModule) + i.SendChar 0x00001114 Section 0 retarget.o(i.SendChar) + i.SendChar_ToUART 0x00001120 Section 0 retarget.o(i.SendChar_ToUART) + i.Spi_init 0x00001150 Section 0 spi_hal.o(i.Spi_init) + i.SystemCoreClockUpdate 0x000011f4 Section 0 system_m451series.o(i.SystemCoreClockUpdate) + i.SystemInit 0x00001258 Section 0 system_m451series.o(i.SystemInit) + i.__NVIC_EnableIRQ 0x000012cc Section 0 main.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000012cd Thumb Code 26 main.o(i.__NVIC_EnableIRQ) + i._is_digit 0x000012e6 Section 0 __printf_wp.o(i._is_digit) + i.delayAny 0x000012f4 Section 0 spi_hal.o(i.delayAny) + i.delay_s 0x00001302 Section 0 24l01.o(i.delay_s) + i.ferror 0x00001310 Section 0 retarget.o(i.ferror) + i.fputc 0x00001318 Section 0 retarget.o(i.fputc) + i.main 0x00001328 Section 0 main.o(i.main) + i.nrf_read 0x00001360 Section 0 spi_hal.o(i.nrf_read) + i.nrf_write 0x0000137c Section 0 spi_hal.o(i.nrf_write) + i.nrf_writebuf 0x0000139a Section 0 spi_hal.o(i.nrf_writebuf) + i.spi_disable 0x000013c8 Section 0 spi_hal.o(i.spi_disable) + i.spi_enable 0x000013dc Section 0 spi_hal.o(i.spi_enable) + i.spi_read 0x000013f0 Section 0 spi_hal.o(i.spi_read) + i.spi_send 0x00001410 Section 0 spi_hal.o(i.spi_send) + i.stackDump 0x00001430 Section 0 retarget.o(i.stackDump) + stackDump 0x00001431 Thumb Code 70 retarget.o(i.stackDump) + x$fpl$fpinit 0x000014d8 Section 10 fpinit.o(x$fpl$fpinit) + $v0 0x000014d8 Number 0 fpinit.o(x$fpl$fpinit) + .constdata 0x000014e2 Section 40 _printf_hex_int.o(.constdata) + uc_hextab 0x000014e2 Data 20 _printf_hex_int.o(.constdata) + lc_hextab 0x000014f6 Data 20 _printf_hex_int.o(.constdata) + .data 0x20000000 Section 12 main.o(.data) + .data 0x2000000c Section 21 24l01.o(.data) + ifinit 0x20000020 Data 1 24l01.o(.data) + .data 0x20000024 Section 8 retarget.o(.data) + .data 0x2000002c Section 44 system_m451series.o(.data) + .bss 0x20000058 Section 64 24l01.o(.bss) + .bss 0x20000098 Section 96 libspace.o(.bss) + HEAP 0x200000f8 Section 0 startup_m451series.o(HEAP) + STACK 0x200000f8 Section 1024 startup_m451series.o(STACK) + Heap_Mem 0x200000f8 Data 0 startup_m451series.o(HEAP) + Stack_Mem 0x200000f8 Data 1024 startup_m451series.o(STACK) + __initial_sp 0x200004f8 Data 0 startup_m451series.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv4$E$P$D$K$B$S$7EM$VFPi3$EXTD16$VFPS$VFMA$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$ROPI$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + __Vectors 0x00000000 Data 4 startup_m451series.o(RESET) + _printf_flags 0x00000000 Number 0 printf_stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 printf_stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 printf_stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 printf_stubs.o ABSOLUTE + __ARM_exceptions_init - Undefined Weak Reference + __alloca_initialize - Undefined Weak Reference + __arm_preinit_ - Undefined Weak Reference + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + __rt_locale - Undefined Weak Reference + __sigvec_lookup - Undefined Weak Reference + _atexit_init - Undefined Weak Reference + _call_atexit_fns - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _fp_trap_init - Undefined Weak Reference + _fp_trap_shutdown - Undefined Weak Reference + _get_lc_collate - Undefined Weak Reference + _get_lc_ctype - Undefined Weak Reference + _get_lc_monetary - Undefined Weak Reference + _get_lc_numeric - Undefined Weak Reference + _get_lc_time - Undefined Weak Reference + _getenv_init - Undefined Weak Reference + _handle_redirection - Undefined Weak Reference + _init_alloc - Undefined Weak Reference + _init_user_alloc - Undefined Weak Reference + _initio - Undefined Weak Reference + _printf_post_padding - Undefined Weak Reference + _printf_pre_padding - Undefined Weak Reference + _printf_truncate_unsigned - Undefined Weak Reference + _rand_init - Undefined Weak Reference + _signal_finish - Undefined Weak Reference + _signal_init - Undefined Weak Reference + _terminate_alloc - Undefined Weak Reference + _terminate_user_alloc - Undefined Weak Reference + _terminateio - Undefined Weak Reference + __Vectors_End 0x00000140 Data 0 startup_m451series.o(RESET) + __Vectors_Size 0x00000140 Number 0 startup_m451series.o ABSOLUTE + __main 0x00000141 Thumb Code 8 __main.o(!!!main) + __scatterload 0x00000149 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_rt2 0x00000149 Thumb Code 44 __scatter.o(!!!scatter) + __scatterload_rt2_thumb_only 0x00000149 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_null 0x00000157 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_copy 0x0000017d Thumb Code 26 __scatter_copy.o(!!handler_copy) + __scatterload_zeroinit 0x00000199 Thumb Code 28 __scatter_zi.o(!!handler_zi) + _printf_percent 0x000001b5 Thumb Code 0 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) + _printf_x 0x000001b5 Thumb Code 0 _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) + _printf_percent_end 0x000001bb Thumb Code 0 _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) + __rt_lib_init 0x000001bf Thumb Code 0 libinit.o(.ARM.Collect$$libinit$$00000000) + __rt_lib_init_fp_1 0x000001c1 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000001) + __rt_lib_init_alloca_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + __rt_lib_init_argv_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) + __rt_lib_init_atexit_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + __rt_lib_init_clock_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + __rt_lib_init_cpp_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + __rt_lib_init_exceptions_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + __rt_lib_init_fp_trap_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + __rt_lib_init_getenv_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + __rt_lib_init_heap_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) + __rt_lib_init_lc_collate_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000011) + __rt_lib_init_lc_ctype_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + __rt_lib_init_lc_monetary_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + __rt_lib_init_lc_numeric_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + __rt_lib_init_lc_time_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + __rt_lib_init_preinit_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + __rt_lib_init_rand_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + __rt_lib_init_return 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000033) + __rt_lib_init_signal_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + __rt_lib_init_stdio_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + __rt_lib_init_user_alloc_1 0x000001c5 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + __rt_lib_shutdown 0x000001c7 Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + __rt_lib_shutdown_cpp_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + __rt_lib_shutdown_fp_trap_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + __rt_lib_shutdown_heap_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + __rt_lib_shutdown_return 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + __rt_lib_shutdown_signal_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + __rt_lib_shutdown_stdio_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + __rt_lib_shutdown_user_alloc_1 0x000001c9 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + __rt_entry 0x000001cb Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + __rt_entry_presh_1 0x000001cb Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + __rt_entry_sh 0x000001cb Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + __rt_entry_li 0x000001d1 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + __rt_entry_postsh_1 0x000001d1 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) + __rt_entry_main 0x000001d5 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) + __rt_entry_postli_1 0x000001d5 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) + __rt_exit 0x000001dd Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000) + __rt_exit_ls 0x000001df Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003) + __rt_exit_prels_1 0x000001df Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) + __rt_exit_exit 0x000001e3 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004) + HardFault_Handler 0x000001e9 Thumb Code 24 retarget.o(.emb_text) + Reset_Handler 0x00000205 Thumb Code 50 startup_m451series.o(.text) + NMI_Handler 0x00000237 Thumb Code 2 startup_m451series.o(.text) + MemManage_Handler 0x0000023b Thumb Code 2 startup_m451series.o(.text) + BusFault_Handler 0x0000023d Thumb Code 2 startup_m451series.o(.text) + UsageFault_Handler 0x0000023f Thumb Code 2 startup_m451series.o(.text) + SVC_Handler 0x00000241 Thumb Code 2 startup_m451series.o(.text) + DebugMon_Handler 0x00000243 Thumb Code 2 startup_m451series.o(.text) + PendSV_Handler 0x00000245 Thumb Code 2 startup_m451series.o(.text) + SysTick_Handler 0x00000247 Thumb Code 2 startup_m451series.o(.text) + ACMP01_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + ADC00_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + ADC01_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + ADC02_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + ADC03_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + BOD_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + BRAKE0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + BRAKE1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + CAN0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + CLKFAIL_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + DAC_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + EINT1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + EINT2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + EINT3_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + EINT4_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + EINT5_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPA_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPB_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPC_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPD_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPE_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + GPF_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + I2C0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + I2C1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + IRC_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PDMA_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PWM0P1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PWM0P2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PWM1P1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PWM1P2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + PWRWU_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + RAMPE_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + RTC_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + SC0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + SPI0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + SPI1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + SPI2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TAMPER_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TK_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TMR0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TMR1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TMR2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + TMR3_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + UART0_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + UART1_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + UART2_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + UART3_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + USBD_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + USBH_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + USBOTG_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + WDT_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + WWDT_IRQHandler 0x00000249 Thumb Code 0 startup_m451series.o(.text) + __user_initial_stackheap 0x0000024d Thumb Code 10 startup_m451series.o(.text) + __2printf 0x00000279 Thumb Code 20 noretval__2printf.o(.text) + _printf_int_hex 0x00000291 Thumb Code 84 _printf_hex_int.o(.text) + _printf_longlong_hex 0x00000291 Thumb Code 0 _printf_hex_int.o(.text) + __printf 0x000002e9 Thumb Code 270 __printf_wp.o(.text) + __aeabi_memclr4 0x000003f7 Thumb Code 0 rt_memclr_w.o(.text) + __aeabi_memclr8 0x000003f7 Thumb Code 0 rt_memclr_w.o(.text) + __rt_memclr_w 0x000003f7 Thumb Code 78 rt_memclr_w.o(.text) + _memset_w 0x000003fb Thumb Code 0 rt_memclr_w.o(.text) + __use_two_region_memory 0x00000445 Thumb Code 2 heapauxi.o(.text) + __rt_heap_escrow$2region 0x00000447 Thumb Code 2 heapauxi.o(.text) + __rt_heap_expand$2region 0x00000449 Thumb Code 2 heapauxi.o(.text) + _printf_int_common 0x0000044b Thumb Code 178 _printf_intcommon.o(.text) + _printf_char_file 0x000004fd Thumb Code 32 _printf_char_file.o(.text) + _printf_char_common 0x0000052b Thumb Code 32 _printf_char_common.o(.text) + __user_setup_stackheap 0x00000551 Thumb Code 74 sys_stackheap_outer.o(.text) + exit 0x0000059b Thumb Code 18 exit.o(.text) + __user_libspace 0x000005ad Thumb Code 8 libspace.o(.text) + __user_perproc_libspace 0x000005ad Thumb Code 0 libspace.o(.text) + __user_perthread_libspace 0x000005ad Thumb Code 0 libspace.o(.text) + _sys_exit 0x000005b5 Thumb Code 8 sys_exit.o(.text) + __I$use$semihosting 0x000005c1 Thumb Code 0 use_no_semi.o(.text) + __use_no_semihosting_swi 0x000005c1 Thumb Code 2 use_no_semi.o(.text) + CLK_EnableModuleClock 0x000005c3 Thumb Code 44 clk.o(i.CLK_EnableModuleClock) + __semihosting_library_function 0x000005c3 Thumb Code 0 indicate_semi.o(.text) + CLK_GetHCLKFreq 0x000005f1 Thumb Code 12 clk.o(i.CLK_GetHCLKFreq) + CLK_SetModuleClock 0x0000072d Thumb Code 78 clk.o(i.CLK_SetModuleClock) + EINT0_IRQHandler 0x00000781 Thumb Code 82 24l01.o(i.EINT0_IRQHandler) + GPIO_SetMode 0x000007e1 Thumb Code 44 gpio.o(i.GPIO_SetMode) + Hard_Fault_Handler 0x0000080d Thumb Code 18 retarget.o(i.Hard_Fault_Handler) + NRF24L01_Read_Buf 0x00000839 Thumb Code 50 24l01.o(i.NRF24L01_Read_Buf) + NRF24L01_RxPacket 0x0000086d Thumb Code 68 24l01.o(i.NRF24L01_RxPacket) + NRFSetTxMode 0x000008b5 Thumb Code 132 24l01.o(i.NRFSetTxMode) + PWM0P0_IRQHandler 0x0000094d Thumb Code 108 interrupt.o(i.PWM0P0_IRQHandler) + PWM1P0_IRQHandler 0x000009cd Thumb Code 60 interrupt.o(i.PWM1P0_IRQHandler) + PWMInit 0x00000a15 Thumb Code 312 main.o(i.PWMInit) + PWM_ClearPeriodIntFlag 0x00000b61 Thumb Code 12 pwm.o(i.PWM_ClearPeriodIntFlag) + PWM_ConfigOutputChannel 0x00000b6d Thumb Code 354 pwm.o(i.PWM_ConfigOutputChannel) + PWM_DisableOutput 0x00000cdd Thumb Code 12 pwm.o(i.PWM_DisableOutput) + PWM_EnableOutput 0x00000ce9 Thumb Code 12 pwm.o(i.PWM_EnableOutput) + PWM_EnablePeriodInt 0x00000cf5 Thumb Code 20 pwm.o(i.PWM_EnablePeriodInt) + PWM_Start 0x00000d09 Thumb Code 8 pwm.o(i.PWM_Start) + ParsePackage 0x00000d11 Thumb Code 112 main.o(i.ParsePackage) + RX_Mode 0x00000d99 Thumb Code 140 24l01.o(i.RX_Mode) + SPI_DisableAutoSS 0x00000e39 Thumb Code 10 spi.o(i.SPI_DisableAutoSS) + SPI_Open 0x00000e45 Thumb Code 646 spi.o(i.SPI_Open) + SYS_ResetModule 0x000010e5 Thumb Code 48 sys.o(i.SYS_ResetModule) + SendChar 0x00001115 Thumb Code 12 retarget.o(i.SendChar) + SendChar_ToUART 0x00001121 Thumb Code 44 retarget.o(i.SendChar_ToUART) + Spi_init 0x00001151 Thumb Code 138 spi_hal.o(i.Spi_init) + SystemCoreClockUpdate 0x000011f5 Thumb Code 74 system_m451series.o(i.SystemCoreClockUpdate) + SystemInit 0x00001259 Thumb Code 104 system_m451series.o(i.SystemInit) + _is_digit 0x000012e7 Thumb Code 14 __printf_wp.o(i._is_digit) + delayAny 0x000012f5 Thumb Code 14 spi_hal.o(i.delayAny) + delay_s 0x00001303 Thumb Code 14 24l01.o(i.delay_s) + ferror 0x00001311 Thumb Code 8 retarget.o(i.ferror) + fputc 0x00001319 Thumb Code 16 retarget.o(i.fputc) + main 0x00001329 Thumb Code 52 main.o(i.main) + nrf_read 0x00001361 Thumb Code 28 spi_hal.o(i.nrf_read) + nrf_write 0x0000137d Thumb Code 30 spi_hal.o(i.nrf_write) + nrf_writebuf 0x0000139b Thumb Code 46 spi_hal.o(i.nrf_writebuf) + spi_disable 0x000013c9 Thumb Code 14 spi_hal.o(i.spi_disable) + spi_enable 0x000013dd Thumb Code 14 spi_hal.o(i.spi_enable) + spi_read 0x000013f1 Thumb Code 28 spi_hal.o(i.spi_read) + spi_send 0x00001411 Thumb Code 28 spi_hal.o(i.spi_send) + _fp_init 0x000014d9 Thumb Code 10 fpinit.o(x$fpl$fpinit) + __fplib_config_fpu_vfp 0x000014e1 Thumb Code 0 fpinit.o(x$fpl$fpinit) + __fplib_config_pureend_doubles 0x000014e1 Thumb Code 0 fpinit.o(x$fpl$fpinit) + Region$$Table$$Base 0x0000150c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0000152c Number 0 anon$$obj.o(Region$$Table) + Axis1 0x20000000 Data 2 main.o(.data) + Axis2 0x20000002 Data 2 main.o(.data) + Axis3 0x20000004 Data 2 main.o(.data) + Axis4 0x20000006 Data 2 main.o(.data) + Axis5 0x20000008 Data 2 main.o(.data) + Axis6 0x2000000a Data 2 main.o(.data) + rfch 0x2000000c Data 1 24l01.o(.data) + RxCnt 0x2000000e Data 2 24l01.o(.data) + TxAddr 0x20000010 Data 5 24l01.o(.data) + RxAddr 0x20000015 Data 5 24l01.o(.data) + Curr_Mode 0x2000001a Data 1 24l01.o(.data) + gRecvPkg 0x2000001c Data 4 24l01.o(.data) + __stdout 0x20000024 Data 4 retarget.o(.data) + __stdin 0x20000028 Data 4 retarget.o(.data) + SystemCoreClock 0x2000002c Data 4 system_m451series.o(.data) + CyclesPerUs 0x20000030 Data 4 system_m451series.o(.data) + PllClock 0x20000034 Data 4 system_m451series.o(.data) + gau32ClkSrcTbl 0x20000038 Data 32 system_m451series.o(.data) + Recv_Buf 0x20000058 Data 32 24l01.o(.bss) + Send_Buf 0x20000078 Data 32 24l01.o(.bss) + __libspace_start 0x20000098 Data 96 libspace.o(.bss) + __temporary_stack_top$libspace 0x200000f8 Data 0 libspace.o(.bss) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x00000141 + + Load Region LR_IROM1 (Base: 0x00000000, Size: 0x00001584, Max: 0x00040000, ABSOLUTE) + + Execution Region ER_IROM1 (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x0000152c, Max: 0x00040000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00000000 0x00000000 0x00000140 Data RO 1380 RESET startup_m451series.o + 0x00000140 0x00000140 0x00000008 Code RO 1484 * !!!main c_w.l(__main.o) + 0x00000148 0x00000148 0x00000034 Code RO 1648 !!!scatter c_w.l(__scatter.o) + 0x0000017c 0x0000017c 0x0000001a Code RO 1650 !!handler_copy c_w.l(__scatter_copy.o) + 0x00000196 0x00000196 0x00000002 PAD + 0x00000198 0x00000198 0x0000001c Code RO 1652 !!handler_zi c_w.l(__scatter_zi.o) + 0x000001b4 0x000001b4 0x00000000 Code RO 1479 .ARM.Collect$$_printf_percent$$00000000 c_w.l(_printf_percent.o) + 0x000001b4 0x000001b4 0x00000006 Code RO 1478 .ARM.Collect$$_printf_percent$$0000000C c_w.l(_printf_x.o) + 0x000001ba 0x000001ba 0x00000004 Code RO 1491 .ARM.Collect$$_printf_percent$$00000017 c_w.l(_printf_percent_end.o) + 0x000001be 0x000001be 0x00000002 Code RO 1520 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o) + 0x000001c0 0x000001c0 0x00000004 Code RO 1526 .ARM.Collect$$libinit$$00000001 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1529 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1532 .ARM.Collect$$libinit$$0000000A c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1534 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1536 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1539 .ARM.Collect$$libinit$$00000011 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1541 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1543 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1545 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1547 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1549 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1551 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1553 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1555 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1557 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1559 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1563 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1565 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1567 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000000 Code RO 1569 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o) + 0x000001c4 0x000001c4 0x00000002 Code RO 1570 .ARM.Collect$$libinit$$00000033 c_w.l(libinit2.o) + 0x000001c6 0x000001c6 0x00000002 Code RO 1590 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1603 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1605 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1608 .ARM.Collect$$libshutdown$$00000007 c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1611 .ARM.Collect$$libshutdown$$0000000A c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1613 .ARM.Collect$$libshutdown$$0000000C c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000000 Code RO 1616 .ARM.Collect$$libshutdown$$0000000F c_w.l(libshutdown2.o) + 0x000001c8 0x000001c8 0x00000002 Code RO 1617 .ARM.Collect$$libshutdown$$00000010 c_w.l(libshutdown2.o) + 0x000001ca 0x000001ca 0x00000000 Code RO 1486 .ARM.Collect$$rtentry$$00000000 c_w.l(__rtentry.o) + 0x000001ca 0x000001ca 0x00000000 Code RO 1493 .ARM.Collect$$rtentry$$00000002 c_w.l(__rtentry2.o) + 0x000001ca 0x000001ca 0x00000006 Code RO 1505 .ARM.Collect$$rtentry$$00000004 c_w.l(__rtentry4.o) + 0x000001d0 0x000001d0 0x00000000 Code RO 1495 .ARM.Collect$$rtentry$$00000009 c_w.l(__rtentry2.o) + 0x000001d0 0x000001d0 0x00000004 Code RO 1496 .ARM.Collect$$rtentry$$0000000A c_w.l(__rtentry2.o) + 0x000001d4 0x000001d4 0x00000000 Code RO 1498 .ARM.Collect$$rtentry$$0000000C c_w.l(__rtentry2.o) + 0x000001d4 0x000001d4 0x00000008 Code RO 1499 .ARM.Collect$$rtentry$$0000000D c_w.l(__rtentry2.o) + 0x000001dc 0x000001dc 0x00000002 Code RO 1524 .ARM.Collect$$rtexit$$00000000 c_w.l(rtexit.o) + 0x000001de 0x000001de 0x00000000 Code RO 1572 .ARM.Collect$$rtexit$$00000002 c_w.l(rtexit2.o) + 0x000001de 0x000001de 0x00000004 Code RO 1573 .ARM.Collect$$rtexit$$00000003 c_w.l(rtexit2.o) + 0x000001e2 0x000001e2 0x00000006 Code RO 1574 .ARM.Collect$$rtexit$$00000004 c_w.l(rtexit2.o) + 0x000001e8 0x000001e8 0x0000001c Code RO 1265 .emb_text retarget.o + 0x00000204 0x00000204 0x00000074 Code RO 1381 .text startup_m451series.o + 0x00000278 0x00000278 0x00000018 Code RO 1433 .text c_w.l(noretval__2printf.o) + 0x00000290 0x00000290 0x00000058 Code RO 1440 .text c_w.l(_printf_hex_int.o) + 0x000002e8 0x000002e8 0x0000010e Code RO 1466 .text c_w.l(__printf_wp.o) + 0x000003f6 0x000003f6 0x0000004e Code RO 1480 .text c_w.l(rt_memclr_w.o) + 0x00000444 0x00000444 0x00000006 Code RO 1482 .text c_w.l(heapauxi.o) + 0x0000044a 0x0000044a 0x000000b2 Code RO 1487 .text c_w.l(_printf_intcommon.o) + 0x000004fc 0x000004fc 0x00000024 Code RO 1489 .text c_w.l(_printf_char_file.o) + 0x00000520 0x00000520 0x00000030 Code RO 1507 .text c_w.l(_printf_char_common.o) + 0x00000550 0x00000550 0x0000004a Code RO 1509 .text c_w.l(sys_stackheap_outer.o) + 0x0000059a 0x0000059a 0x00000012 Code RO 1513 .text c_w.l(exit.o) + 0x000005ac 0x000005ac 0x00000008 Code RO 1521 .text c_w.l(libspace.o) + 0x000005b4 0x000005b4 0x0000000c Code RO 1582 .text c_w.l(sys_exit.o) + 0x000005c0 0x000005c0 0x00000002 Code RO 1593 .text c_w.l(use_no_semi.o) + 0x000005c2 0x000005c2 0x00000000 Code RO 1595 .text c_w.l(indicate_semi.o) + 0x000005c2 0x000005c2 0x0000002c Code RO 411 i.CLK_EnableModuleClock clk.o + 0x000005ee 0x000005ee 0x00000002 PAD + 0x000005f0 0x000005f0 0x00000010 Code RO 416 i.CLK_GetHCLKFreq clk.o + 0x00000600 0x00000600 0x00000064 Code RO 605 i.CLK_GetPLLClockFreq pwm.o + 0x00000664 0x00000664 0x00000064 Code RO 1033 i.CLK_GetPLLClockFreq spi.o + 0x000006c8 0x000006c8 0x00000064 Code RO 1388 i.CLK_GetPLLClockFreq system_m451series.o + 0x0000072c 0x0000072c 0x00000054 Code RO 426 i.CLK_SetModuleClock clk.o + 0x00000780 0x00000780 0x00000060 Code RO 169 i.EINT0_IRQHandler 24l01.o + 0x000007e0 0x000007e0 0x0000002c Code RO 571 i.GPIO_SetMode gpio.o + 0x0000080c 0x0000080c 0x0000002c Code RO 1267 i.Hard_Fault_Handler retarget.o + 0x00000838 0x00000838 0x00000032 Code RO 172 i.NRF24L01_Read_Buf 24l01.o + 0x0000086a 0x0000086a 0x00000002 PAD + 0x0000086c 0x0000086c 0x00000048 Code RO 173 i.NRF24L01_RxPacket 24l01.o + 0x000008b4 0x000008b4 0x00000098 Code RO 175 i.NRFSetTxMode 24l01.o + 0x0000094c 0x0000094c 0x00000080 Code RO 366 i.PWM0P0_IRQHandler interrupt.o + 0x000009cc 0x000009cc 0x00000048 Code RO 367 i.PWM1P0_IRQHandler interrupt.o + 0x00000a14 0x00000a14 0x0000014c Code RO 5 i.PWMInit main.o + 0x00000b60 0x00000b60 0x0000000c Code RO 613 i.PWM_ClearPeriodIntFlag pwm.o + 0x00000b6c 0x00000b6c 0x00000170 Code RO 617 i.PWM_ConfigOutputChannel pwm.o + 0x00000cdc 0x00000cdc 0x0000000c Code RO 631 i.PWM_DisableOutput pwm.o + 0x00000ce8 0x00000ce8 0x0000000c Code RO 651 i.PWM_EnableOutput pwm.o + 0x00000cf4 0x00000cf4 0x00000014 Code RO 653 i.PWM_EnablePeriodInt pwm.o + 0x00000d08 0x00000d08 0x00000008 Code RO 671 i.PWM_Start pwm.o + 0x00000d10 0x00000d10 0x00000088 Code RO 6 i.ParsePackage main.o + 0x00000d98 0x00000d98 0x000000a0 Code RO 180 i.RX_Mode 24l01.o + 0x00000e38 0x00000e38 0x0000000a Code RO 1046 i.SPI_DisableAutoSS spi.o + 0x00000e42 0x00000e42 0x00000002 PAD + 0x00000e44 0x00000e44 0x000002a0 Code RO 1053 i.SPI_Open spi.o + 0x000010e4 0x000010e4 0x00000030 Code RO 1196 i.SYS_ResetModule sys.o + 0x00001114 0x00001114 0x0000000c Code RO 1269 i.SendChar retarget.o + 0x00001120 0x00001120 0x00000030 Code RO 1270 i.SendChar_ToUART retarget.o + 0x00001150 0x00001150 0x000000a4 Code RO 283 i.Spi_init spi_hal.o + 0x000011f4 0x000011f4 0x00000064 Code RO 1389 i.SystemCoreClockUpdate system_m451series.o + 0x00001258 0x00001258 0x00000074 Code RO 1390 i.SystemInit system_m451series.o + 0x000012cc 0x000012cc 0x0000001a Code RO 7 i.__NVIC_EnableIRQ main.o + 0x000012e6 0x000012e6 0x0000000e Code RO 1468 i._is_digit c_w.l(__printf_wp.o) + 0x000012f4 0x000012f4 0x0000000e Code RO 284 i.delayAny spi_hal.o + 0x00001302 0x00001302 0x0000000e Code RO 182 i.delay_s 24l01.o + 0x00001310 0x00001310 0x00000008 Code RO 1272 i.ferror retarget.o + 0x00001318 0x00001318 0x00000010 Code RO 1274 i.fputc retarget.o + 0x00001328 0x00001328 0x00000038 Code RO 9 i.main main.o + 0x00001360 0x00001360 0x0000001c Code RO 285 i.nrf_read spi_hal.o + 0x0000137c 0x0000137c 0x0000001e Code RO 287 i.nrf_write spi_hal.o + 0x0000139a 0x0000139a 0x0000002e Code RO 288 i.nrf_writebuf spi_hal.o + 0x000013c8 0x000013c8 0x00000014 Code RO 289 i.spi_disable spi_hal.o + 0x000013dc 0x000013dc 0x00000014 Code RO 290 i.spi_enable spi_hal.o + 0x000013f0 0x000013f0 0x00000020 Code RO 291 i.spi_read spi_hal.o + 0x00001410 0x00001410 0x00000020 Code RO 292 i.spi_send spi_hal.o + 0x00001430 0x00001430 0x000000a8 Code RO 1276 i.stackDump retarget.o + 0x000014d8 0x000014d8 0x0000000a Code RO 1580 x$fpl$fpinit fz_wm.l(fpinit.o) + 0x000014e2 0x000014e2 0x00000028 Data RO 1441 .constdata c_w.l(_printf_hex_int.o) + 0x0000150a 0x0000150a 0x00000002 PAD + 0x0000150c 0x0000150c 0x00000020 Data RO 1646 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x0000152c, Size: 0x000004f8, Max: 0x00008000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x20000000 0x0000152c 0x0000000c Data RW 10 .data main.o + 0x2000000c 0x00001538 0x00000015 Data RW 184 .data 24l01.o + 0x20000021 0x0000154d 0x00000003 PAD + 0x20000024 0x00001550 0x00000008 Data RW 1277 .data retarget.o + 0x2000002c 0x00001558 0x0000002c Data RW 1391 .data system_m451series.o + 0x20000058 - 0x00000040 Zero RW 183 .bss 24l01.o + 0x20000098 - 0x00000060 Zero RW 1522 .bss c_w.l(libspace.o) + 0x200000f8 - 0x00000000 Zero RW 1379 HEAP startup_m451series.o + 0x200000f8 - 0x00000400 Zero RW 1378 STACK startup_m451series.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 544 58 0 21 64 5758 24l01.o + 144 10 0 0 0 16279 clk.o + 44 0 0 0 0 1223 gpio.o + 200 32 0 0 0 1048 interrupt.o + 550 48 0 12 0 238565 main.o + 532 30 0 0 0 5564 pwm.o + 324 132 0 8 0 5801 retarget.o + 782 42 0 0 0 3315 spi.o + 386 46 0 0 0 4745 spi_hal.o + 116 36 320 0 1024 936 startup_m451series.o + 48 0 0 0 0 574 sys.o + 316 54 0 44 0 33267 system_m451series.o + + ---------------------------------------------------------------------- + 3992 488 352 88 1088 317075 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 6 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 8 0 0 0 0 68 __main.o + 284 0 0 0 0 156 __printf_wp.o + 0 0 0 0 0 0 __rtentry.o + 12 0 0 0 0 0 __rtentry2.o + 6 0 0 0 0 0 __rtentry4.o + 52 8 0 0 0 0 __scatter.o + 26 0 0 0 0 0 __scatter_copy.o + 28 0 0 0 0 0 __scatter_zi.o + 48 6 0 0 0 96 _printf_char_common.o + 36 4 0 0 0 80 _printf_char_file.o + 88 4 40 0 0 88 _printf_hex_int.o + 178 0 0 0 0 88 _printf_intcommon.o + 0 0 0 0 0 0 _printf_percent.o + 4 0 0 0 0 0 _printf_percent_end.o + 6 0 0 0 0 0 _printf_x.o + 18 0 0 0 0 80 exit.o + 6 0 0 0 0 152 heapauxi.o + 0 0 0 0 0 0 indicate_semi.o + 2 0 0 0 0 0 libinit.o + 6 0 0 0 0 0 libinit2.o + 2 0 0 0 0 0 libshutdown.o + 2 0 0 0 0 0 libshutdown2.o + 8 4 0 0 96 68 libspace.o + 24 4 0 0 0 84 noretval__2printf.o + 78 0 0 0 0 80 rt_memclr_w.o + 2 0 0 0 0 0 rtexit.o + 10 0 0 0 0 0 rtexit2.o + 12 4 0 0 0 68 sys_exit.o + 74 0 0 0 0 80 sys_stackheap_outer.o + 2 0 0 0 0 68 use_no_semi.o + 10 0 0 0 0 116 fpinit.o + + ---------------------------------------------------------------------- + 1034 34 42 0 96 1372 Library Totals + 2 0 2 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 1022 34 40 0 96 1256 c_w.l + 10 0 0 0 0 116 fz_wm.l + + ---------------------------------------------------------------------- + 1034 34 42 0 96 1372 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 5026 522 394 88 1184 313675 Grand Totals + 5026 522 394 88 1184 313675 ELF Image Totals + 5026 522 394 88 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 5420 ( 5.29kB) + Total RW Size (RW Data + ZI Data) 1272 ( 1.24kB) + Total ROM Size (Code + RO Data + RW Data) 5508 ( 5.38kB) + +============================================================================== + diff --git a/roboticarm_controller/Objects/roboticarm_controller.axf b/roboticarm_controller/Objects/roboticarm_controller.axf new file mode 100644 index 0000000..5f358b7 Binary files /dev/null and b/roboticarm_controller/Objects/roboticarm_controller.axf differ diff --git a/roboticarm_controller/Objects/roboticarm_controller.lnp b/roboticarm_controller/Objects/roboticarm_controller.lnp new file mode 100644 index 0000000..910aa18 --- /dev/null +++ b/roboticarm_controller/Objects/roboticarm_controller.lnp @@ -0,0 +1,17 @@ +--cpu=Cortex-M4.fp +".\objects\main.o" +".\objects\24l01.o" +".\objects\spi_hal.o" +".\objects\interrupt.o" +".\objects\clk.o" +".\objects\gpio.o" +".\objects\pwm.o" +".\objects\spi.o" +".\objects\sys.o" +".\objects\retarget.o" +".\objects\startup_m451series.o" +".\objects\system_m451series.o" +--strict --scatter ".\Objects\roboticarm_controller.sct" +--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols +--info sizes --info totals --info unused --info veneers +--list ".\Listings\roboticarm_controller.map" -o .\Objects\roboticarm_controller.axf \ No newline at end of file diff --git a/roboticarm_controller/Objects/roboticarm_controller.sct b/roboticarm_controller/Objects/roboticarm_controller.sct new file mode 100644 index 0000000..9af005d --- /dev/null +++ b/roboticarm_controller/Objects/roboticarm_controller.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00040000 { ; load region size_region + ER_IROM1 0x00000000 0x00040000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/roboticarm_controller/RTE/Device/M453VG6AE/retarget.c b/roboticarm_controller/RTE/Device/M453VG6AE/retarget.c new file mode 100644 index 0000000..3aeb8aa --- /dev/null +++ b/roboticarm_controller/RTE/Device/M453VG6AE/retarget.c @@ -0,0 +1,678 @@ +/**************************************************************************//** + * @file retarget.c + * @version V3.00 + * $Revision: 13 $ + * $Date: 15/08/11 10:26a $ + * @brief M451 Series Debug Port and Semihost Setting Source File + * + * @note + * Copyright (C) 2011~2015 Nuvoton Technology Corp. All rights reserved. + * + ******************************************************************************/ + + +#include +#include "M451Series.h" + +#if defined ( __CC_ARM ) +#if (__ARMCC_VERSION < 400000) +#else +/* Insist on keeping widthprec, to avoid X propagation by benign code in C-lib */ +#pragma import _printf_widthprec +#endif +#endif + +/*---------------------------------------------------------------------------------------------------------*/ +/* Global variables */ +/*---------------------------------------------------------------------------------------------------------*/ +#if !(defined(__ICCARM__) && (__VER__ >= 6010000)) +struct __FILE +{ + int handle; /* Add whatever you need here */ +}; +#endif +FILE __stdout; +FILE __stdin; + +enum { r0, r1, r2, r3, r12, lr, pc, psr}; + +/** + * @brief Helper function to dump register while hard fault occurred + * @param[in] stack pointer points to the dumped registers in SRAM + * @return None + * @details This function is implement to print r0, r1, r2, r3, r12, lr, pc, psr + */ +static void stackDump(uint32_t stack[]) +{ + printf("r0 = 0x%x\n", stack[r0]); + printf("r1 = 0x%x\n", stack[r1]); + printf("r2 = 0x%x\n", stack[r2]); + printf("r3 = 0x%x\n", stack[r3]); + printf("r12 = 0x%x\n", stack[r12]); + printf("lr = 0x%x\n", stack[lr]); + printf("pc = 0x%x\n", stack[pc]); + printf("psr = 0x%x\n", stack[psr]); +} + +/** + * @brief Hard fault handler + * @param[in] stack pointer points to the dumped registers in SRAM + * @return None + * @details Replace while(1) at the end of this function with chip reset if WDT is not enabled for end product + */ +void Hard_Fault_Handler(uint32_t stack[]) +{ + printf("In Hard Fault Handler\n"); + + stackDump(stack); + // Replace while(1) with chip reset if WDT is not enabled for end product + while(1); + //SYS->IPRST0 = SYS_IPRST0_CHIPRST_Msk; +} + + + +/*---------------------------------------------------------------------------------------------------------*/ +/* Routine to write a char */ +/*---------------------------------------------------------------------------------------------------------*/ + +#if defined(DEBUG_ENABLE_SEMIHOST) +/* The static buffer is used to speed up the semihost */ +static char g_buf[16]; +static char g_buf_len = 0; + +# if defined(__ICCARM__) + +void SH_End(void) +{ + asm("MOVS R0,#1 \n" //; Set return value to 1 + "BX lr \n" //; Return + ); +} + +void SH_ICE(void) +{ + asm("CMP R2,#0 \n" + "BEQ SH_End \n" + "STR R0,[R2] \n" //; Save the return value to *pn32Out_R0 + ); +} + +/** + * + * @brief The function to process semihosted command + * @param[in] n32In_R0 : semihost register 0 + * @param[in] n32In_R1 : semihost register 1 + * @param[out] pn32Out_R0: semihost register 0 + * @retval 0: No ICE debug + * @retval 1: ICE debug + * + */ +int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0) +{ + asm("BKPT 0xAB \n" //; This instruction will cause ICE trap or system HardFault + "B SH_ICE \n" + "SH_HardFault: \n" //; Captured by HardFault + "MOVS R0,#0 \n" //; Set return value to 0 + "BX lr \n" //; Return + ); + + return 1; //; Return 1 when it is trap by ICE +} + +/** + * @brief Get LR value and branch to Hard_Fault_Handler function + * @param None + * @return None + * @details This function is use to get LR value and branch to Hard_Fault_Handler function. + */ +void Get_LR_and_Branch(void) +{ + asm("MOV R1, LR \n" //; LR current value + "B Hard_Fault_Handler \n" + ); +} + +/** + * @brief Get MSP value and branch to Get_LR_and_Branch function + * @param None + * @return None + * @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function. + */ +void Stack_Use_MSP(void) +{ + asm("MRS R0, MSP \n" //; read MSP + "B Get_LR_and_Branch \n" + ); +} + +/** + * @brief Get stack pointer value and branch to Get_LR_and_Branch function + * @param None + * @return None + * @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function. + */ +void HardFault_Handler_Ret(void) +{ + asm("MOVS r0, #4 \n" + "MOV r1, LR \n" + "TST r0, r1 \n" //; check LR bit 2 + "BEQ Stack_Use_MSP \n" //; stack use MSP + "MRS R0, PSP \n" //; stack use PSP, read PSP + "B Get_LR_and_Branch \n" + ); +} + +/** + * @brief This function is implemented to support semihost + * @param None + * @returns None + * @details This function is implement to support semihost message print. + * + */ +void SP_Read_Ready(void) +{ + asm("LDR R1, [R0, #24] \n" //; Get previous PC + "LDRH R3, [R1] \n" //; Get instruction + "LDR R2, [pc, #8] \n" //; The special BKPT instruction + "CMP R3, R2 \n" //; Test if the instruction at previous PC is BKPT + "BNE HardFault_Handler_Ret \n" //; Not BKPT + "ADDS R1, #4 \n" //; Skip BKPT and next line + "STR R1, [R0, #24] \n" //; Save previous PC + "BX lr \n" //; Return + "DCD 0xBEAB \n" //; BKPT instruction code + "B HardFault_Handler_Ret \n" + ); +} + +/** + * @brief Get stack pointer value and branch to Get_LR_and_Branch function + * @param None + * @return None + * @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function. + */ +void SP_is_PSP(void) +{ + asm( + "MRS R0, PSP \n" //; stack use PSP, read PSP + "B Get_LR_and_Branch \n" + + ); +} + +/** + * @brief This HardFault handler is implemented to support semihost + * + * @param None + * + * @returns None + * + * @details This function is implement to support semihost message print. + * + */ +void HardFault_Handler (void) +{ + asm("MOV R0, lr \n" + "LSLS R0, #29 \n" //; Check bit 2 + "BMI SP_is_PSP \n" //; previous stack is PSP + "MRS R0, MSP \n" //; previous stack is MSP, read MSP + "B SP_Read_Ready \n" + ); + + while(1); +} + +# else + +/** + * @brief This HardFault handler is implemented to support semihost + * @param None + * @returns None + * @details This function is implement to support semihost message print. + * + */ +__asm int32_t HardFault_Handler(void) +{ + MOV R0, LR + LSLS R0, #29 //; Check bit 2 + BMI SP_is_PSP //; previous stack is PSP + MRS R0, MSP //; previous stack is MSP, read MSP + B SP_Read_Ready +SP_is_PSP + MRS R0, PSP //; Read PSP + +SP_Read_Ready + LDR R1, [R0, #24] //; Get previous PC + LDRH R3, [R1] //; Get instruction + LDR R2, =0xBEAB //; The special BKPT instruction + CMP R3, R2 //; Test if the instruction at previous PC is BKPT + BNE HardFault_Handler_Ret //; Not BKPT + + ADDS R1, #4 //; Skip BKPT and next line + STR R1, [R0, #24] //; Save previous PC + + BX LR //; Return +HardFault_Handler_Ret + + /* TODO: Implement your own hard fault handler here. */ + MOVS r0, #4 + MOV r1, LR + TST r0, r1 //; check LR bit 2 + BEQ Stack_Use_MSP //; stack use MSP + MRS R0, PSP ;stack use PSP //; stack use PSP, read PSP + B Get_LR_and_Branch +Stack_Use_MSP + MRS R0, MSP ; stack use MSP //; read MSP +Get_LR_and_Branch + MOV R1, LR ; LR current value //; LR current value + LDR R2,=__cpp(Hard_Fault_Handler) //; branch to Hard_Fault_Handler + BX R2 + + B . + + ALIGN +} + +/** + * + * @brief The function to process semihosted command + * @param[in] n32In_R0 : semihost register 0 + * @param[in] n32In_R1 : semihost register 1 + * @param[out] pn32Out_R0: semihost register 0 + * @retval 0: No ICE debug + * @retval 1: ICE debug + * + */ +__asm int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0) +{ + BKPT 0xAB //; Wait ICE or HardFault + //; ICE will step over BKPT directly + //; HardFault will step BKPT and the next line + B SH_ICE + +SH_HardFault //; Captured by HardFault + MOVS R0, #0 //; Set return value to 0 + BX lr //; Return + +SH_ICE //; Captured by ICE + //; Save return value + CMP R2, #0 + BEQ SH_End + STR R0, [R2] //; Save the return value to *pn32Out_R0 + +SH_End + MOVS R0, #1 //; Set return value to 1 + BX lr //; Return +} +#endif + +#else + +# if defined(__ICCARM__) + +void Get_LR_and_Branch(void) +{ + asm("MOV R1, LR \n" //; LR current value + "B Hard_Fault_Handler \n" + ); +} + +void Stack_Use_MSP(void) +{ + asm("MRS R0, MSP \n" //; read MSP + "B Get_LR_and_Branch \n" + ); +} + +/** + * @brief This HardFault handler is implemented to show r0, r1, r2, r3, r12, lr, pc, psr + * + * @param None + * + * @returns None + * + * @details This function is implement to print r0, r1, r2, r3, r12, lr, pc, psr. + * + */ +void HardFault_Handler(void) +{ + asm("MOVS r0, #4 \n" + "MOV r1, LR \n" + "TST r0, r1 \n" //; check LR bit 2 + "BEQ Stack_Use_MSP \n" //; stack use MSP + "MRS R0, PSP \n" //; stack use PSP, read PSP + "B Get_LR_and_Branch \n" + ); + + while(1); +} + +# else + +/** + * @brief This HardFault handler is implemented to show r0, r1, r2, r3, r12, lr, pc, psr + * + * @param None + * + * @return None + * + * @details The function extracts the location of stack frame and passes it to Hard_Fault_Handler function as a pointer + * + */ +__asm int32_t HardFault_Handler(void) +{ + MOVS r0, #4 + MOV r1, LR + TST r0, r1 //; check LR bit 2 + BEQ Stack_Use_MSP //; stack use MSP + MRS R0, PSP //; stack use PSP, read PSP + B Get_LR_and_Branch +Stack_Use_MSP + MRS R0, MSP //; read MSP +Get_LR_and_Branch + MOV R1, LR //; LR current value + LDR R2,=__cpp(Hard_Fault_Handler) //; branch to Hard_Fault_Handler + BX R2 +} + +#endif + +#endif + + +/** + * @brief Routine to send a char + * + * @param[in] ch Character to send to debug port. + * + * @returns Send value from UART debug port + * + * @details Send a target char to UART debug port . + */ +#ifndef NONBLOCK_PRINTF +void SendChar_ToUART(int ch) +{ + while(DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk); + + DEBUG_PORT->DAT = ch; + if(ch == '\n') + { + while(DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk); + DEBUG_PORT->DAT = '\r'; + } +} + +#else +/* Non-block implement of send char */ +#define BUF_SIZE 2048 +void SendChar_ToUART(int ch) +{ + static uint8_t u8Buf[BUF_SIZE] = {0}; + static int32_t i32Head = 0; + static int32_t i32Tail = 0; + int32_t i32Tmp; + + /* Only flush the data in buffer to UART when ch == 0 */ + if(ch) + { + // Push char + i32Tmp = i32Head+1; + if(i32Tmp > BUF_SIZE) i32Tmp = 0; + if(i32Tmp != i32Tail) + { + u8Buf[i32Head] = ch; + i32Head = i32Tmp; + } + + if(ch == '\n') + { + i32Tmp = i32Head+1; + if(i32Tmp > BUF_SIZE) i32Tmp = 0; + if(i32Tmp != i32Tail) + { + u8Buf[i32Head] = '\r'; + i32Head = i32Tmp; + } + } + } + else + { + if(i32Tail == i32Head) + return; + } + + // pop char + do + { + i32Tmp = i32Tail + 1; + if(i32Tmp > BUF_SIZE) i32Tmp = 0; + + if((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk) == 0) + { + DEBUG_PORT->DAT = u8Buf[i32Tail]; + i32Tail = i32Tmp; + } + else + break; // FIFO full + }while(i32Tail != i32Head); +} +#endif + +/** + * @brief Routine to send a char + * + * @param[in] ch Character to send to debug port. + * + * @returns Send value from UART debug port or semihost + * + * @details Send a target char to UART debug port or semihost. + */ +void SendChar(int ch) +{ +#if defined(DEBUG_ENABLE_SEMIHOST) + g_buf[g_buf_len++] = ch; + g_buf[g_buf_len] = '\0'; + if(g_buf_len + 1 >= sizeof(g_buf) || ch == '\n' || ch == '\0') + { + /* Send the char */ + if(SH_DoCommand(0x04, (int)g_buf, NULL) != 0) + { + g_buf_len = 0; + return; + } + else + { + int i; + + for(i = 0; i < g_buf_len; i++) + SendChar_ToUART(g_buf[i]); + g_buf_len = 0; + } + } +#else + SendChar_ToUART(ch); +#endif +} + +/** + * @brief Routine to get a char + * + * @param None + * + * @returns Get value from UART debug port or semihost + * + * @details Wait UART debug port or semihost to input a char. + */ +char GetChar(void) +{ +#ifdef DEBUG_ENABLE_SEMIHOST +# if defined (__CC_ARM) + int nRet; + while(SH_DoCommand(0x101, 0, &nRet) != 0) + { + if(nRet != 0) + { + SH_DoCommand(0x07, 0, &nRet); + return (char)nRet; + } + } +# else + int nRet; + while(SH_DoCommand(0x7, 0, &nRet) != 0) + { + if(nRet != 0) + return (char)nRet; + } +# endif + return (0); +#else + + while(1) + { + if((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) == 0) + { + return (DEBUG_PORT->DAT); + } + } + +#endif +} + +/** + * @brief Check any char input from UART + * + * @param None + * + * @retval 1: No any char input + * @retval 0: Have some char input + * + * @details Check UART RSR RX EMPTY or not to determine if any char input from UART + */ + +int kbhit(void) +{ + return !((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) == 0); +} +/** + * @brief Check if debug message finished + * + * @param None + * + * @retval 1: Message is finished + * @retval 0: Message is transmitting. + * + * @details Check if message finished (FIFO empty of debug port) + */ + +int IsDebugFifoEmpty(void) +{ + return ((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) != 0); +} + +/** + * @brief C library retargetting + * + * @param[in] ch Character to send to debug port. + * + * @returns None + * + * @details Check if message finished (FIFO empty of debug port) + */ + +void _ttywrch(int ch) +{ + SendChar(ch); + return; +} + + +/** + * @brief Write character to stream + * + * @param[in] ch Character to be written. The character is passed as its int promotion. + * @param[in] stream Pointer to a FILE object that identifies the stream where the character is to be written. + * + * @returns If there are no errors, the same character that has been written is returned. + * If an error occurs, EOF is returned and the error indicator is set (see ferror). + * + * @details Writes a character to the stream and advances the position indicator.\n + * The character is written at the current position of the stream as indicated \n + * by the internal position indicator, which is then advanced one character. + * + * @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/fputc/. + * + * + */ + +int fputc(int ch, FILE *stream) +{ + SendChar(ch); + return ch; +} + + +/** + * @brief Get character from UART debug port or semihosting input + * + * @param[in] stream Pointer to a FILE object that identifies the stream on which the operation is to be performed. + * + * @returns The character read from UART debug port or semihosting + * + * @details For get message from debug port or semihosting. + * + */ + +int fgetc(FILE *stream) +{ + return (GetChar()); +} + +/** + * @brief Check error indicator + * + * @param[in] stream Pointer to a FILE object that identifies the stream. + * + * @returns If the error indicator associated with the stream was set, the function returns a nonzero value. + * Otherwise, it returns a zero value. + * + * @details Checks if the error indicator associated with stream is set, returning a value different + * from zero if it is. This indicator is generally set by a previous operation on the stream that failed. + * + * @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/ferror/. + * + */ + +int ferror(FILE *stream) +{ + return EOF; +} + +#ifdef DEBUG_ENABLE_SEMIHOST +# ifdef __ICCARM__ +void __exit(int return_code) +{ + + /* Check if link with ICE */ + if(SH_DoCommand(0x18, 0x20026, NULL) == 0) + { + /* Make sure all message is print out */ + while(IsDebugFifoEmpty() == 0); + } +label: + goto label; /* endless loop */ +} +# else +void _sys_exit(int return_code) +{ + + /* Check if link with ICE */ + if(SH_DoCommand(0x18, 0x20026, NULL) == 0) + { + /* Make sure all message is print out */ + while(IsDebugFifoEmpty() == 0); + } +label: + goto label; /* endless loop */ +} +# endif +#endif diff --git a/roboticarm_controller/RTE/Device/M453VG6AE/startup_M451Series.s b/roboticarm_controller/RTE/Device/M453VG6AE/startup_M451Series.s new file mode 100644 index 0000000..c083f20 --- /dev/null +++ b/roboticarm_controller/RTE/Device/M453VG6AE/startup_M451Series.s @@ -0,0 +1,376 @@ +;/****************************************************************************** +; * @file startup_M451Series.s +; * @version V0.10 +; * $Revision: 5 $ +; * $Date: 14/12/24 10:20a $ +; * @brief CMSIS Cortex-M4 Core Device Startup File for M451 Series MCU +; * +; * @note +; * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved. +;*****************************************************************************/ +;/* +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + + ; User may overwrite stack size setting by pre-defined symbol + IF :LNOT: :DEF: Stack_Size +Stack_Size EQU 0x00000400 + ENDIF + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + + IF :LNOT: :DEF: Heap_Size +Heap_Size EQU 0x00000000 + ENDIF + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD BOD_IRQHandler ; 0: Brown Out detection + DCD IRC_IRQHandler ; 1: Internal RC + DCD PWRWU_IRQHandler ; 2: Power down wake up + DCD RAMPE_IRQHandler ; 3: RAM parity error + DCD CLKFAIL_IRQHandler ; 4: Clock detection fail + DCD Default_Handler ; 5: Reserved + DCD RTC_IRQHandler ; 6: Real Time Clock + DCD TAMPER_IRQHandler ; 7: Tamper detection + DCD WDT_IRQHandler ; 8: Watchdog timer + DCD WWDT_IRQHandler ; 9: Window watchdog timer + DCD EINT0_IRQHandler ; 10: External Input 0 + DCD EINT1_IRQHandler ; 11: External Input 1 + DCD EINT2_IRQHandler ; 12: External Input 2 + DCD EINT3_IRQHandler ; 13: External Input 3 + DCD EINT4_IRQHandler ; 14: External Input 4 + DCD EINT5_IRQHandler ; 15: External Input 5 + DCD GPA_IRQHandler ; 16: GPIO Port A + DCD GPB_IRQHandler ; 17: GPIO Port B + DCD GPC_IRQHandler ; 18: GPIO Port C + DCD GPD_IRQHandler ; 19: GPIO Port D + DCD GPE_IRQHandler ; 20: GPIO Port E + DCD GPF_IRQHandler ; 21: GPIO Port F + DCD SPI0_IRQHandler ; 22: SPI0 + DCD SPI1_IRQHandler ; 23: SPI1 + DCD BRAKE0_IRQHandler ; 24: + DCD PWM0P0_IRQHandler ; 25: + DCD PWM0P1_IRQHandler ; 26: + DCD PWM0P2_IRQHandler ; 27: + DCD BRAKE1_IRQHandler ; 28: + DCD PWM1P0_IRQHandler ; 29: + DCD PWM1P1_IRQHandler ; 30: + DCD PWM1P2_IRQHandler ; 31: + DCD TMR0_IRQHandler ; 32: Timer 0 + DCD TMR1_IRQHandler ; 33: Timer 1 + DCD TMR2_IRQHandler ; 34: Timer 2 + DCD TMR3_IRQHandler ; 35: Timer 3 + DCD UART0_IRQHandler ; 36: UART0 + DCD UART1_IRQHandler ; 37: UART1 + DCD I2C0_IRQHandler ; 38: I2C0 + DCD I2C1_IRQHandler ; 39: I2C1 + DCD PDMA_IRQHandler ; 40: Peripheral DMA + DCD DAC_IRQHandler ; 41: DAC + DCD ADC00_IRQHandler ; 42: ADC0 interrupt source 0 + DCD ADC01_IRQHandler ; 43: ADC0 interrupt source 1 + DCD ACMP01_IRQHandler ; 44: ACMP0 and ACMP1 + DCD Default_Handler ; 45: Reserved + DCD ADC02_IRQHandler ; 46: ADC0 interrupt source 2 + DCD ADC03_IRQHandler ; 47: ADC0 interrupt source 3 + DCD UART2_IRQHandler ; 48: UART2 + DCD UART3_IRQHandler ; 49: UART3 + DCD Default_Handler ; 50: Reserved + DCD SPI2_IRQHandler ; 51: SPI2 + DCD Default_Handler ; 52: Reserved + DCD USBD_IRQHandler ; 53: USB device + DCD USBH_IRQHandler ; 54: USB host + DCD USBOTG_IRQHandler ; 55: USB OTG + DCD CAN0_IRQHandler ; 56: CAN0 + DCD Default_Handler ; 57: Reserved + DCD SC0_IRQHandler ; 58: + DCD Default_Handler ; 59: Reserved. + DCD Default_Handler ; 60: + DCD Default_Handler ; 61: + DCD Default_Handler ; 62: + DCD TK_IRQHandler ; 63: + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =0x40000100 + ; Unlock Register + LDR R1, =0x59 + STR R1, [R0] + LDR R1, =0x16 + STR R1, [R0] + LDR R1, =0x88 + STR R1, [R0] + + ; Init POR + LDR R2, =0x40000024 + LDR R1, =0x00005AA5 + STR R1, [R2] + + ; Select INV Type + LDR R2, =0x40000200 + LDR R1, [R2] + BIC R1, R1, #0x1000 + STR R1, [R2] + + ; Lock register + MOVS R1, #0 + STR R1, [R0] + + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler\ + PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler\ + PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT BOD_IRQHandler [WEAK] + EXPORT IRC_IRQHandler [WEAK] + EXPORT PWRWU_IRQHandler [WEAK] + EXPORT RAMPE_IRQHandler [WEAK] + EXPORT CLKFAIL_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + EXPORT WWDT_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT EINT4_IRQHandler [WEAK] + EXPORT EINT5_IRQHandler [WEAK] + EXPORT GPA_IRQHandler [WEAK] + EXPORT GPB_IRQHandler [WEAK] + EXPORT GPC_IRQHandler [WEAK] + EXPORT GPD_IRQHandler [WEAK] + EXPORT GPE_IRQHandler [WEAK] + EXPORT GPF_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT BRAKE0_IRQHandler [WEAK] + EXPORT PWM0P0_IRQHandler [WEAK] + EXPORT PWM0P1_IRQHandler [WEAK] + EXPORT PWM0P2_IRQHandler [WEAK] + EXPORT BRAKE1_IRQHandler [WEAK] + EXPORT PWM1P0_IRQHandler [WEAK] + EXPORT PWM1P1_IRQHandler [WEAK] + EXPORT PWM1P2_IRQHandler [WEAK] + EXPORT TMR0_IRQHandler [WEAK] + EXPORT TMR1_IRQHandler [WEAK] + EXPORT TMR2_IRQHandler [WEAK] + EXPORT TMR3_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT PDMA_IRQHandler [WEAK] + EXPORT DAC_IRQHandler [WEAK] + EXPORT ADC00_IRQHandler [WEAK] + EXPORT ADC01_IRQHandler [WEAK] + EXPORT ACMP01_IRQHandler [WEAK] + EXPORT ADC02_IRQHandler [WEAK] + EXPORT ADC03_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USBD_IRQHandler [WEAK] + EXPORT USBH_IRQHandler [WEAK] + EXPORT USBOTG_IRQHandler [WEAK] + EXPORT CAN0_IRQHandler [WEAK] + EXPORT SC0_IRQHandler [WEAK] + EXPORT TK_IRQHandler [WEAK] + +BOD_IRQHandler +IRC_IRQHandler +PWRWU_IRQHandler +RAMPE_IRQHandler +CLKFAIL_IRQHandler +RTC_IRQHandler +TAMPER_IRQHandler +WDT_IRQHandler +WWDT_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +EINT4_IRQHandler +EINT5_IRQHandler +GPA_IRQHandler +GPB_IRQHandler +GPC_IRQHandler +GPD_IRQHandler +GPE_IRQHandler +GPF_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +BRAKE0_IRQHandler +PWM0P0_IRQHandler +PWM0P1_IRQHandler +PWM0P2_IRQHandler +BRAKE1_IRQHandler +PWM1P0_IRQHandler +PWM1P1_IRQHandler +PWM1P2_IRQHandler +TMR0_IRQHandler +TMR1_IRQHandler +TMR2_IRQHandler +TMR3_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +PDMA_IRQHandler +DAC_IRQHandler +ADC00_IRQHandler +ADC01_IRQHandler +ACMP01_IRQHandler +ADC02_IRQHandler +ADC03_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +SPI2_IRQHandler +USBD_IRQHandler +USBH_IRQHandler +USBOTG_IRQHandler +CAN0_IRQHandler +SC0_IRQHandler +TK_IRQHandler + B . + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap PROC + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + ENDP + + ALIGN + + ENDIF + + + END +;/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/ diff --git a/roboticarm_controller/RTE/Device/M453VG6AE/system_M451Series.c b/roboticarm_controller/RTE/Device/M453VG6AE/system_M451Series.c new file mode 100644 index 0000000..daf91b9 --- /dev/null +++ b/roboticarm_controller/RTE/Device/M453VG6AE/system_M451Series.c @@ -0,0 +1,109 @@ +/****************************************************************************** + * @file system_M451Series.c + * @version V0.10 + * $Revision: 11 $ + * $Date: 15/09/02 10:02a $ + * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for M451 Series MCU + * + * @note + * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +#include "M451Series.h" + + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------- + Clock Variable definitions + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/ +uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */ +uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */ +uint32_t gau32ClkSrcTbl[] = {__HXT, __LXT, 0, __LIRC, 0, 0, 0, __HIRC}; + +/*---------------------------------------------------------------------------- + Clock functions + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */ +{ +#if 1 + uint32_t u32Freq, u32ClkSrc; + uint32_t u32HclkDiv; + + /* Update PLL Clock */ + PllClock = CLK_GetPLLClockFreq(); + + u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLKSEL_Msk; + + if(u32ClkSrc == CLK_CLKSEL0_HCLKSEL_PLL) + { + /* Use PLL clock */ + u32Freq = PllClock; + } + else + { + /* Use the clock sources directly */ + u32Freq = gau32ClkSrcTbl[u32ClkSrc]; + } + + u32HclkDiv = (CLK->CLKDIV0 & CLK_CLKDIV0_HCLKDIV_Msk) + 1; + + /* Update System Core Clock */ + SystemCoreClock = u32Freq / u32HclkDiv; + + + //if(SystemCoreClock == 0) + // __BKPT(0); + + CyclesPerUs = (SystemCoreClock + 500000) / 1000000; +#endif +} + +/** + * Initialize the system + * + * @param None + * @return None + * + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit(void) +{ + /* ToDo: add code to initialize the system + do not use global variables because this function is called before + reaching pre-main. RW section maybe overwritten afterwards. */ + + SYS_UnlockReg(); + /* One-time POR18 */ + if((SYS->PDID >> 12) == 0x945) + { + M32(GCR_BASE+0x14) |= BIT7; + } + /* Force to use INV type with HXT */ + CLK->PWRCTL &= ~CLK_PWRCTL_HXTSELTYP_Msk; + SYS_LockReg(); + + +#ifdef EBI_INIT + extern void SYS_Init(); + extern void EBI_Init(); + + SYS_UnlockReg(); + SYS_Init(); + EBI_Init(); + SYS_LockReg(); +#endif + + /* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10 * 2) | /* set CP10 Full Access */ + (3UL << 11 * 2)); /* set CP11 Full Access */ +#endif + +} +/*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/ diff --git a/roboticarm_controller/RTE/_Target_1/RTE_Components.h b/roboticarm_controller/RTE/_Target_1/RTE_Components.h new file mode 100644 index 0000000..d082d1e --- /dev/null +++ b/roboticarm_controller/RTE/_Target_1/RTE_Components.h @@ -0,0 +1,25 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'roboticarm_controller' + * Target: 'Target 1' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "M451Series.h" + +#define RTE_Drivers_CLK /* Driver CLK */ +#define RTE_Drivers_GPIO /* Driver GPIO */ +#define RTE_Drivers_PWM /* Driver PWM */ +#define RTE_Drivers_SPI /* Driver SPI */ +#define RTE_Drivers_SYS /* Driver SYS */ + +#endif /* RTE_COMPONENTS_H */ diff --git a/roboticarm_controller/global.h b/roboticarm_controller/global.h new file mode 100644 index 0000000..0f771c1 --- /dev/null +++ b/roboticarm_controller/global.h @@ -0,0 +1,14 @@ +#ifndef __GLOBAL__ +#define __GLOBAL__ + +#include "stdio.h" +#include "stdint.h" + +extern short Axis1; +extern short Axis2; +extern short Axis3; +extern short Axis4; +extern short Axis5; +extern short Axis6; + +#endif \ No newline at end of file diff --git a/roboticarm_controller/interrupt.c b/roboticarm_controller/interrupt.c new file mode 100644 index 0000000..4ebde1e --- /dev/null +++ b/roboticarm_controller/interrupt.c @@ -0,0 +1,50 @@ +#include "M451Series.h" +#include "global.h" + + +void PWM0P0_IRQHandler(void) +{ + static uint32_t lastStep = 0; + + if(Axis1 != 0){ + PWM_EnableOutput(PWM0, PWM_CH_0_MASK); + } + else{ + PWM_DisableOutput(PWM0, PWM_CH_0_MASK); + } + if(Axis2 != 0){ + PWM_EnableOutput(PWM0, PWM_CH_1_MASK); + } + else{ + PWM_DisableOutput(PWM0, PWM_CH_1_MASK); + } + if(Axis3 != 0){ + PWM_EnableOutput(PWM0, PWM_CH_3_MASK); + } + else{ + PWM_DisableOutput(PWM0, PWM_CH_3_MASK); + } + if(Axis4 != 0){ + PWM_EnableOutput(PWM0, PWM_CH_4_MASK); + }else{ + PWM_DisableOutput(PWM0, PWM_CH_4_MASK); + } + + // Clear channel 0 period interrupt flag + PWM_ClearPeriodIntFlag(PWM0, 0); +} + +void PWM1P0_IRQHandler(void){ + if(Axis5 != 0){ + PWM_EnableOutput(PWM1, PWM_CH_0_MASK); + }else{ + PWM_DisableOutput(PWM1, PWM_CH_0_MASK); + } + if(Axis6 != 0){ + PWM_EnableOutput(PWM1, PWM_CH_1_MASK); + }else{ + PWM_DisableOutput(PWM1, PWM_CH_1_MASK); + } + PWM_ClearPeriodIntFlag(PWM1, 0); + +} diff --git a/roboticarm_controller/main.c b/roboticarm_controller/main.c new file mode 100644 index 0000000..e419caf --- /dev/null +++ b/roboticarm_controller/main.c @@ -0,0 +1,124 @@ +#include "M451Series.h" +#include "spi_hal.h" +#include "24l01.h" + + +short Axis1 = 0; +short Axis2 = 0; +short Axis3 = 0; +short Axis4 = 0; +short Axis5 = 0; +short Axis6 = 0; + +void NRF24L01Init(){ + + + CLK_EnableModuleClock(SPI0_MODULE); + + SYS_ResetModule(SPI0_RST); + + /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */ + /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */ + CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, NULL); + + /* Set PB multi-function pins for spi */ + SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB5MFP_Msk | SYS_GPB_MFPL_PB6MFP_Msk | SYS_GPB_MFPL_PB7MFP_Msk); + SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0 | SYS_GPB_MFPL_PB6MFP_SPI0_MISO0|SYS_GPB_MFPL_PB7MFP_SPI0_CLK); + + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB13MFP_Msk | SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB15MFP_Msk); + SYS->GPB_MFPL |= (SYS_GPB_MFPH_PB13MFP_GPIO | SYS_GPB_MFPH_PB14MFP_GPIO|SYS_GPB_MFPH_PB15MFP_GPIO); + +} + +void PWMInit (){ + + CLK_EnableModuleClock(PWM0_MODULE); + + SYS_ResetModule(PWM0_RST); + + CLK_EnableModuleClock(PWM1_MODULE); + + SYS_ResetModule(PWM1_RST); + /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */ + /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */ + CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, NULL); + CLK_SetModuleClock(PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, NULL); + + /* Set PC multi-function pins for PWM0 Channel0~3 */ + SYS->GPC_MFPH = (SYS->GPC_MFPH & (~SYS_GPC_MFPH_PC9MFP_Msk)); + SYS->GPC_MFPH |= SYS_GPC_MFPH_PC9MFP_PWM1_CH0; + + SYS->GPC_MFPH = (SYS->GPC_MFPH & (~SYS_GPC_MFPH_PC10MFP_Msk)); + SYS->GPC_MFPH |= SYS_GPC_MFPH_PC10MFP_PWM1_CH1; + + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC0MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_PWM0_CH0; + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC1MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC1MFP_PWM0_CH1; + + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC3MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC3MFP_PWM0_CH3; + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC4MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC4MFP_PWM0_CH4; + + // PWM0 channel 0 frequency is 100Hz, duty 30%, + PWM_ConfigOutputChannel(PWM0, 0, 20, 50); + // PWM0 channel 2 frequency is 300Hz, duty 50% + PWM_ConfigOutputChannel(PWM0, 1, 20, 50); + // PWM0 channel 0 frequency is 100Hz, duty 30%, + PWM_ConfigOutputChannel(PWM0, 3, 20, 30); + // PWM0 channel 2 frequency is 300Hz, duty 50% + PWM_ConfigOutputChannel(PWM0, 4, 20, 50); + + // PWM0 channel 0 frequency is 100Hz, duty 30%, + PWM_ConfigOutputChannel(PWM1, 0, 20, 50); + // PWM0 channel 2 frequency is 300Hz, duty 50% + PWM_ConfigOutputChannel(PWM1, 1, 20, 50); + + // Enable output of PWM0 channel 0~3 + PWM_EnableOutput(PWM0, 0xF); + // Enable PWM0 channel 0 period interrupt, use channel 0 to measure time. + PWM_EnablePeriodInt(PWM0, 0, 0); + NVIC_EnableIRQ(PWM0P0_IRQn); + + // Start + PWM_Start(PWM1, 0x3); + PWM_EnablePeriodInt(PWM1, 0, 0); + NVIC_EnableIRQ(PWM1P0_IRQn); + // Start + PWM_Start(PWM0, 0x1F); + PWM_Start(PWM1, 0x1F); +} + + +void delay_1s(){ + for(volatile unsigned int x = 0;x < 100; x++){ + for(volatile unsigned int z = 0; z <100; z++){ + z = z; + } + } +} + +int ParsePackage(unsigned char *dat){ + if( (dat[0] == 0xAA) && (dat[1] == 0xAF) && (dat[2] == 0x03) && (dat[3] == 0x1b)){ + Axis1 = (*(dat + 4)*256 + (*(dat + 5))); + Axis2 = (*(dat + 6)*256 + (*(dat + 7))); + Axis3 = (*(dat + 8)*256 + (*(dat + 9))); + Axis4 = (*(dat + 10)*256 + (*(dat + 11))); + Axis5 = (*(dat + 12)*256 + (*(dat + 13))); + Axis6 = (*(dat + 14)*256 + (*(dat + 15))); + } +} +int main(){ + unsigned char recv[32] = {0}; + GPIO_SetMode(PC,BIT9,GPIO_MODE_INPUT); //IRQ + + Spi_init(); + RX_Mode(); + PWMInit (); + while(1){ + if(NRF24L01_RxPacket(recv) == 0) { + ParsePackage(recv); + } + } +} diff --git a/roboticarm_controller/roboticarm_controller.uvoptx b/roboticarm_controller/roboticarm_controller.uvoptx new file mode 100644 index 0000000..09842b3 --- /dev/null +++ b/roboticarm_controller/roboticarm_controller.uvoptx @@ -0,0 +1,338 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 8 + + + + + + + + + + + NULink\Nu_Link.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + Nu_Link + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M451_AP_256 -FS00 -FL040000 -FP0($$Device:M453VG6AE$Flash\M451_AP_256.FLM)) + + + + + + 0 + 1 + Axis1 + + + 1 + 1 + Axis2 + + + 2 + 1 + Axis3 + + + 3 + 1 + Axis4 + + + 4 + 1 + Axis5 + + + 5 + 1 + Axis6 + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + System Viewer\SPI0 + 35905 + + + + + + + Source Group 1 + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\24l01.c + 24l01.c + 0 + 0 + + + 1 + 3 + 5 + 0 + 0 + 0 + .\24l01.h + 24l01.h + 0 + 0 + + + 1 + 4 + 5 + 0 + 0 + 0 + .\spi_hal.h + spi_hal.h + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + .\spi_hal.c + spi_hal.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + .\interrupt.c + interrupt.c + 0 + 0 + + + 1 + 7 + 5 + 0 + 0 + 0 + .\global.h + global.h + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/roboticarm_controller/roboticarm_controller.uvprojx b/roboticarm_controller/roboticarm_controller.uvprojx new file mode 100644 index 0000000..595839f --- /dev/null +++ b/roboticarm_controller/roboticarm_controller.uvprojx @@ -0,0 +1,505 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Target 1 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + M453VG6AE + Nuvoton + Nuvoton.NuMicro_DFP.1.2.0 + http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack + IRAM(0x20000000,0x8000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M451_AP_256 -FS00 -FL040000 -FP0($$Device:M453VG6AE$Flash\M451_AP_256.FLM)) + 0 + $$Device:M453VG6AE$Device\M451\Include\M451Series.h + + + + + + + + + + $$Device:M453VG6AE$SVD\Nuvoton\M451_v1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + roboticarm_controller + 1 + 0 + 0 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM4 + SARMCM3.DLL + + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\Objects\roboticarm_controller.sct + + + + + + + + + + + Source Group 1 + + + main.c + 1 + .\main.c + + + 24l01.c + 1 + .\24l01.c + + + 24l01.h + 5 + .\24l01.h + + + spi_hal.h + 5 + .\spi_hal.h + + + spi_hal.c + 1 + .\spi_hal.c + + + interrupt.c + 1 + .\interrupt.c + + + global.h + 5 + .\global.h + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\M453VG6AE\retarget.c + + + + + + + + RTE\Device\M453VG6AE\startup_M451Series.s + + + + + + + + RTE\Device\M453VG6AE\system_M451Series.c + + + + + + + + + + diff --git a/roboticarm_controller/spi_hal.c b/roboticarm_controller/spi_hal.c new file mode 100644 index 0000000..b6560e7 --- /dev/null +++ b/roboticarm_controller/spi_hal.c @@ -0,0 +1,135 @@ +#include "M451Series.h" +#include "spi_hal.h" + +void Spi_init() +{ + /* Set PB multi-function pins for spi */ + SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB5MFP_Msk | SYS_GPB_MFPL_PB6MFP_Msk | SYS_GPB_MFPL_PB7MFP_Msk); + SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0 | SYS_GPB_MFPL_PB6MFP_SPI0_MISO0|SYS_GPB_MFPL_PB7MFP_SPI0_CLK); + + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB13MFP_Msk | SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB15MFP_Msk); + SYS->GPB_MFPL |= (SYS_GPB_MFPH_PB13MFP_GPIO | SYS_GPB_MFPH_PB14MFP_GPIO|SYS_GPB_MFPH_PB15MFP_GPIO); + + //SYS->GPC_MFP|=((0x01<<0)|(0x01<<1)|(0x01<<2)|(0x01<<3)); + GPIO_SetMode(PB,BIT14,GPIO_MODE_OUTPUT); // CSN + GPIO_SetMode(PB,BIT13,GPIO_MODE_OUTPUT); // CE + GPIO_SetMode(PB,BIT15,GPIO_MODE_INPUT); //IRQ + + PB14 = 1; + PB13= 0; + + CLK_EnableModuleClock(SPI0_MODULE); + + SYS_ResetModule(SPI0_RST); + + /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */ + /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */ + CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL2_SPI0SEL_PCLK0, NULL); + + SPI_Open(SPI0,SPI_MASTER,SPI_MODE_0,8,40000); + + SPI_DisableAutoSS(SPI0); +} + +void delayAny(){ + for(int x = 0;x < 15;x++){ + x = x;; + } +} +void spi_enable() +{ + PB14= 0; + delayAny(); + + //SPI_SET_SS_LOW(SPI0); +} +void spi_disable() +{ + delayAny(); + + PB14 = 1; +//SPI_SET_SS_HIGH(SPI0); +} + +/* + +*/ +uchar spi_send(unsigned char data) +{ + SPI_WRITE_TX(SPI0,data); + while(SPI_IS_BUSY(SPI0) == 1) ; + return SPI_READ_RX(SPI0); +} +/* + +*/ +uchar spi_read() +{ + uchar ret; + SPI_WRITE_TX(SPI0, 0x0); + while(SPI_IS_BUSY(SPI0) == 1) ; + ret= SPI_READ_RX(SPI0); + //SPI0->CNTRL.IF=1; + return ret; +} + +uchar nrf_read(uchar adress) +{ + uchar ret; + spi_enable(); + spi_send(adress); + + ret= spi_read(); + spi_disable(); + return ret; +} + + + +uchar nrf_wf(unsigned char dat) +{ + uchar ret; + spi_enable(); + spi_send(dat); + spi_disable(); + return ret; +} + +uchar nrf_write(uchar adress,uchar data) +{ + uchar ret; + spi_enable(); + spi_send(adress); + spi_send(data); + spi_disable(); + return ret; +} + +/*****************SPI??TXFIFO?????**********************************/ +uchar NRFWriteTxDate(uchar RegAddr,uchar *TxDate,uchar DateLen) +{ + uchar BackDate,i; + BackDate=spi_send(RegAddr); + for(i=0;iGPC_MFPL &= ~(SYS_GPB_MFPL_PB5MFP_Msk | SYS_GPB_MFPL_PB6MFP_Msk | SYS_GPB_MFPL_PB7MFP_Msk); + SYS->GPD_MFPL |= (SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0 | SYS_GPB_MFPL_PB6MFP_SPI0_MISO0|SYS_GPB_MFPL_PB7MFP_SPI0_CLK); + + SYS->GPC_MFPH &= ~(SYS_GPB_MFPH_PB13MFP_Msk | SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB15MFP_Msk); + SYS->GPD_MFPL |= (SYS_GPB_MFPH_PB13MFP_GPIO | SYS_GPB_MFPL_PB6MFP_SPI0_MISO0|SYS_GPB_MFPL_PB7MFP_SPI0_CLK); + + /* Set PC multi-function pins for PWM0 Channel0~3 */ + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC0MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_PWM0_CH0; + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC1MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC1MFP_PWM0_CH1; + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC2MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC2MFP_PWM0_CH2; + SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC3MFP_Msk)); + SYS->GPC_MFPL |= SYS_GPC_MFPL_PC3MFP_PWM0_CH3; + + +} void PWMInit (){ CLK_EnableModuleClock(PWM0_MODULE); @@ -80,6 +100,8 @@ void PWMInit (){ // Start PWM_Start(PWM0, 0xF); } + + void I2CInit(){ /* Enable I2C0 module clock */ @@ -219,24 +241,17 @@ void EADC_FunctionTest() g_u32AdcIntFlag = 0; g_u32COVNUMFlag = 0; EADC_START_CONV(EADC, (0x1 << 7)); - - /* Disable the sample module 7 interrupt */ //EADC_DISABLE_SAMPLE_MODULE_INT(EADC, 0, (0x1 << 7)); - /* Get the conversion result of the sample module */ for(u32SAMPLECount = 0; u32SAMPLECount < 4; u32SAMPLECount++) i32ConversionData[u32SAMPLECount] = EADC_GET_CONV_DATA(EADC, (u32SAMPLECount + 4)); - x = EADC_GET_DATA_VALID_FLAG(EADC, 0xF0); /* Wait conversion done */ while(EADC_GET_DATA_VALID_FLAG(EADC, 0xF0) != 0xF0){ x = EADC_GET_DATA_VALID_FLAG(EADC, 0xF0); x++; - } - - - + } /* Get the conversion result of the sample module */ for(u32SAMPLECount = 4; u32SAMPLECount < 8; u32SAMPLECount++) i32ConversionData[u32SAMPLECount] = EADC_GET_CONV_DATA(EADC, u32SAMPLECount); @@ -247,8 +262,6 @@ void EADC_FunctionTest() print_Line(0, dat); for(g_u32COVNUMFlag = 0; (g_u32COVNUMFlag) < 8; g_u32COVNUMFlag++) printf("Conversion result of channel %d: 0x%X (%d)\n", (g_u32COVNUMFlag % 4), i32ConversionData[g_u32COVNUMFlag], i32ConversionData[g_u32COVNUMFlag]); - - } } diff --git a/steppernew/steper.uvoptx b/steppernew/steper.uvoptx index b32ab58..b72543f 100644 --- a/steppernew/steper.uvoptx +++ b/steppernew/steper.uvoptx @@ -143,56 +143,7 @@ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M451_AP_256 -FS00 -FL040000 -FP0($$Device:M451VG6AE$Flash\M451_AP_256.FLM)) - - - 0 - 0 - 81 - 1 -
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- 0 - 0 - 0 - 0 - 0 - 1 - .\main.cpp - - \\steper\main.cpp\78 - - - 2 - 0 - 77 - 1 -
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- 0 - 0 - 0 - 0 - 0 - 1 - .\main.cpp - - \\steper\main.cpp\77 - - + 0